Commit 73f7065b authored by Mauro Carvalho Chehab's avatar Mauro Carvalho Chehab Committed by Mauro Carvalho Chehab

[media] drx-j: get rid of the other typedefs at bsp_types.h

Most of the work were done by those small scripts:

for i in *; do sed s,pDRXFrequency_t,"s32 *",g <$i >a && mv a $i; done
for i in *; do sed s,DRXFrequency_t,"s32",g <$i >a && mv a $i; done
for i in *; do sed s,pDRXSymbolrate_t,"u32 *",g <$i >a && mv a $i; done
for i in *; do sed s,DRXSymbolrate_t,"u32",g <$i >a && mv a $i; done
for i in *; do sed s,FALSE,false,g <$i >a && mv a $i; done
for i in *; do sed s,TRUE,true,g <$i >a && mv a $i; done
for i in *; do sed s,Bool_t,bool,g <$i >a && mv a $i; done
for i in *; do sed s,pbool,"bool *",g <$i >a && mv a $i; done

The only remaining things there are the return values.
Acked-by: default avatarDevin Heitmueller <dheitmueller@kernellabs.com>
Signed-off-by: default avatarMauro Carvalho Chehab <m.chehab@samsung.com>
parent 43a431e4
......@@ -94,19 +94,19 @@ TYPEDEFS
typedef struct {
char *name; /* Tuner brand & type name */
DRXFrequency_t minFreqRF; /* Lowest RF input frequency, in kHz */
DRXFrequency_t maxFreqRF; /* Highest RF input frequency, in kHz */
s32 minFreqRF; /* Lowest RF input frequency, in kHz */
s32 maxFreqRF; /* Highest RF input frequency, in kHz */
u8 subMode; /* Index to sub-mode in use */
pTUNERSubMode_t subModeDescriptions; /* Pointer to description of sub-modes */
u8 subModes; /* Number of available sub-modes */
/* The following fields will be either 0, NULL or FALSE and do not need
/* The following fields will be either 0, NULL or false and do not need
initialisation */
void *selfCheck; /* gives proof of initialization */
Bool_t programmed; /* only valid if selfCheck is OK */
DRXFrequency_t RFfrequency; /* only valid if programmed */
DRXFrequency_t IFfrequency; /* only valid if programmed */
bool programmed; /* only valid if selfCheck is OK */
s32 RFfrequency; /* only valid if programmed */
s32 IFfrequency; /* only valid if programmed */
void *myUserData; /* pointer to associated demod instance */
u16 myCapabilities; /* value for storing application flags */
......@@ -123,14 +123,14 @@ TYPEDEFS
typedef DRXStatus_t(*TUNERSetFrequencyFunc_t) (pTUNERInstance_t tuner,
TUNERMode_t mode,
DRXFrequency_t
s32
frequency);
typedef DRXStatus_t(*TUNERGetFrequencyFunc_t) (pTUNERInstance_t tuner,
TUNERMode_t mode,
pDRXFrequency_t
s32 *
RFfrequency,
pDRXFrequency_t
s32 *
IFfrequency);
typedef DRXStatus_t(*TUNERLockStatusFunc_t) (pTUNERInstance_t tuner,
......@@ -182,12 +182,12 @@ Exported FUNCTIONS
DRXStatus_t DRXBSP_TUNER_SetFrequency(pTUNERInstance_t tuner,
TUNERMode_t mode,
DRXFrequency_t frequency);
s32 frequency);
DRXStatus_t DRXBSP_TUNER_GetFrequency(pTUNERInstance_t tuner,
TUNERMode_t mode,
pDRXFrequency_t RFfrequency,
pDRXFrequency_t IFfrequency);
s32 *RFfrequency,
s32 *IFfrequency);
DRXStatus_t DRXBSP_TUNER_LockStatus(pTUNERInstance_t tuner,
pTUNERLockStatus_t lockStat);
......
......@@ -28,88 +28,15 @@
POSSIBILITY OF SUCH DAMAGE.
*/
/**
* \file $Id: bsp_types.h,v 1.5 2009/08/06 12:55:57 carlo Exp $
*
* \brief General type definitions for board support packages
*
* This file contains type definitions that are needed for almost any
* board support package.
* The definitions are host and project independent.
*
*/
#include <linux/kernel.h>
#ifndef __BSP_TYPES_H__
#define __BSP_TYPES_H__
/*-------------------------------------------------------------------------
INCLUDES
-------------------------------------------------------------------------*/
#ifdef __cplusplus
extern "C" {
#endif
/*-------------------------------------------------------------------------
TYPEDEFS
-------------------------------------------------------------------------*/
/**
* \typedef s32 DRXFrequency_t
* \brief type definition of frequency
*/
typedef s32 DRXFrequency_t;
/**
* \typedef DRXFrequency_t *pDRXFrequency_t
* \brief type definition of a pointer to a frequency
*/
typedef DRXFrequency_t *pDRXFrequency_t;
/**
* \typedef u32 DRXSymbolrate_t
* \brief type definition of symbol rate
*/
typedef u32 DRXSymbolrate_t;
/**
* \typedef DRXSymbolrate_t *pDRXSymbolrate_t
* \brief type definition of a pointer to a symbol rate
*/
typedef DRXSymbolrate_t *pDRXSymbolrate_t;
/*-------------------------------------------------------------------------
DEFINES
-------------------------------------------------------------------------*/
/**
* \def NULL
* \brief Define NULL for target.
*/
#ifndef NULL
#define NULL (0)
#endif
/*-------------------------------------------------------------------------
ENUM
-------------------------------------------------------------------------*/
/*
* Boolean datatype. Only define if not already defined TRUE or FALSE.
*/
#if defined (TRUE) || defined (FALSE)
typedef int Bool_t;
#else
/**
* \enum Bool_t
* \brief Boolean type
*/
typedef enum {
FALSE = 0,
TRUE
} Bool_t;
#endif
typedef Bool_t *pBool_t;
/**
* \enum DRXStatus_t
* \brief Various return statusses
......@@ -125,18 +52,4 @@ ENUM
/**< unavailable functionality */
} DRXStatus_t, *pDRXStatus_t;
/*-------------------------------------------------------------------------
STRUCTS
-------------------------------------------------------------------------*/
/**
Exported FUNCTIONS
-------------------------------------------------------------------------*/
/*-------------------------------------------------------------------------
THE END
-------------------------------------------------------------------------*/
#ifdef __cplusplus
}
#endif
#endif /* __BSP_TYPES_H__ */
......@@ -242,7 +242,7 @@ static int drx39xxj_set_frontend(struct dvb_frontend *fe)
}
/* Just for giggles, let's shut off the LNA again.... */
uioData.uio = DRX_UIO1;
uioData.value = FALSE;
uioData.value = false;
result = DRX_Ctrl(demod, DRX_CTRL_UIO_WRITE, &uioData);
if (result != DRX_STS_OK) {
printk(KERN_ERR "Failed to disable LNA!\n");
......@@ -271,7 +271,7 @@ static int drx39xxj_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
{
struct drx39xxj_state *state = fe->demodulator_priv;
DRXDemodInstance_t *demod = state->demod;
Bool_t i2c_gate_state;
bool i2c_gate_state;
DRXStatus_t result;
#ifdef DJH_DEBUG
......@@ -280,9 +280,9 @@ static int drx39xxj_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
#endif
if (enable)
i2c_gate_state = TRUE;
i2c_gate_state = true;
else
i2c_gate_state = FALSE;
i2c_gate_state = false;
if (state->i2c_gate_open == enable) {
/* We're already in the desired state */
......@@ -371,9 +371,9 @@ struct dvb_frontend *drx39xxj_attach(struct i2c_adapter *i2c)
sizeof(DRXCommonAttr_t));
demod->myCommonAttr->microcode = DRXJ_MC_MAIN;
#if 0
demod->myCommonAttr->verifyMicrocode = FALSE;
demod->myCommonAttr->verifyMicrocode = false;
#endif
demod->myCommonAttr->verifyMicrocode = TRUE;
demod->myCommonAttr->verifyMicrocode = true;
demod->myCommonAttr->intermediateFreq = 5000;
demod->myExtAttr = demodExtAttr;
......@@ -401,7 +401,7 @@ struct dvb_frontend *drx39xxj_attach(struct i2c_adapter *i2c)
}
uioData.uio = DRX_UIO1;
uioData.value = FALSE;
uioData.value = false;
result = DRX_Ctrl(demod, DRX_CTRL_UIO_WRITE, &uioData);
if (result != DRX_STS_OK) {
printk(KERN_ERR "Failed to disable LNA!\n");
......
......@@ -25,7 +25,7 @@ DRXStatus_t DRXBSP_TUNER_Close(pTUNERInstance_t tuner)
DRXStatus_t DRXBSP_TUNER_SetFrequency(pTUNERInstance_t tuner,
TUNERMode_t mode,
DRXFrequency_t centerFrequency)
s32 centerFrequency)
{
return DRX_STS_OK;
}
......@@ -33,8 +33,8 @@ DRXStatus_t DRXBSP_TUNER_SetFrequency(pTUNERInstance_t tuner,
DRXStatus_t
DRXBSP_TUNER_GetFrequency(pTUNERInstance_t tuner,
TUNERMode_t mode,
pDRXFrequency_t RFfrequency,
pDRXFrequency_t IFfrequency)
s32 *RFfrequency,
s32 *IFfrequency)
{
return DRX_STS_OK;
}
......
This source diff could not be displayed because it is too large. You can view the blob instead.
......@@ -204,7 +204,7 @@ TYPEDEFS
typedef struct {
DRXStandard_t standard; /* standard to which these settings apply */
u16 reference; /* pre SAW reference value, range 0 .. 31 */
Bool_t usePreSaw; /* TRUE algorithms must use pre SAW sense */
bool usePreSaw; /* true algorithms must use pre SAW sense */
} DRXJCfgPreSaw_t, *pDRXJCfgPreSaw_t;
/* DRXJ_CFG_AFE_GAIN */
......@@ -279,8 +279,8 @@ TYPEDEFS
* set MPEG output clock rate
*/
typedef struct {
Bool_t disableTEIHandling; /**< if TRUE pass (not change) TEI bit */
Bool_t bitReverseMpegOutout; /**< if TRUE, parallel: msb on MD0; serial: lsb out first */
bool disableTEIHandling; /**< if true pass (not change) TEI bit */
bool bitReverseMpegOutout; /**< if true, parallel: msb on MD0; serial: lsb out first */
DRXJMpegOutputClockRate_t mpegOutputClockRate;
/**< set MPEG output clock rate that overwirtes the derived one from symbol rate */
DRXJMpegStartWidth_t mpegStartWidth; /**< set MPEG output start width */
......@@ -341,12 +341,12 @@ TYPEDEFS
typedef struct {
DRXJAgcStatus_t agc;
Bool_t eqLock;
Bool_t symTimingLock;
Bool_t phaseLock;
Bool_t freqLock;
Bool_t digGainLock;
Bool_t anaGainLock;
bool eqLock;
bool symTimingLock;
bool phaseLock;
bool freqLock;
bool digGainLock;
bool anaGainLock;
u8 state;
} DRXJCfgOOBMisc_t, *pDRXJCfgOOBMisc_t;
......@@ -407,8 +407,8 @@ TYPEDEFS
*
*/
typedef struct {
Bool_t enableCVBSOutput; /* TRUE= enabled */
Bool_t enableSIFOutput; /* TRUE= enabled */
bool enableCVBSOutput; /* true= enabled */
bool enableSIFOutput; /* true= enabled */
DRXJSIFAttenuation_t sifAttenuation;
} DRXJCfgAtvOutput_t, *pDRXJCfgAtvOutput_t;
......@@ -447,25 +447,25 @@ TYPEDEFS
*/
typedef struct {
/* device capabilties (determined during DRX_Open()) */
Bool_t hasLNA; /**< TRUE if LNA (aka PGA) present */
Bool_t hasOOB; /**< TRUE if OOB supported */
Bool_t hasNTSC; /**< TRUE if NTSC supported */
Bool_t hasBTSC; /**< TRUE if BTSC supported */
Bool_t hasSMATX; /**< TRUE if mat_tx is available */
Bool_t hasSMARX; /**< TRUE if mat_rx is available */
Bool_t hasGPIO; /**< TRUE if GPIO is available */
Bool_t hasIRQN; /**< TRUE if IRQN is available */
bool hasLNA; /**< true if LNA (aka PGA) present */
bool hasOOB; /**< true if OOB supported */
bool hasNTSC; /**< true if NTSC supported */
bool hasBTSC; /**< true if BTSC supported */
bool hasSMATX; /**< true if mat_tx is available */
bool hasSMARX; /**< true if mat_rx is available */
bool hasGPIO; /**< true if GPIO is available */
bool hasIRQN; /**< true if IRQN is available */
/* A1/A2/A... */
u8 mfx; /**< metal fix */
/* tuner settings */
Bool_t mirrorFreqSpectOOB;/**< tuner inversion (TRUE = tuner mirrors the signal */
bool mirrorFreqSpectOOB;/**< tuner inversion (true = tuner mirrors the signal */
/* standard/channel settings */
DRXStandard_t standard; /**< current standard information */
DRXConstellation_t constellation;
/**< current constellation */
DRXFrequency_t frequency; /**< center signal frequency in KHz */
s32 frequency; /**< center signal frequency in KHz */
DRXBandwidth_t currBandwidth;
/**< current channel bandwidth */
DRXMirror_t mirror; /**< current channel mirror */
......@@ -478,7 +478,7 @@ TYPEDEFS
u16 fecRsPlen; /**< defines RS BER measurement period */
u16 fecRsPrescale; /**< ReedSolomon Measurement Prescale */
u16 fecRsPeriod; /**< ReedSolomon Measurement period */
Bool_t resetPktErrAcc; /**< Set a flag to reset accumulated packet error */
bool resetPktErrAcc; /**< Set a flag to reset accumulated packet error */
u16 pktErrAccStart; /**< Set a flag to reset accumulated packet error */
/* HI configuration */
......@@ -496,7 +496,7 @@ TYPEDEFS
/* IQM fs frequecy shift and inversion */
u32 iqmFsRateOfs; /**< frequency shifter setting after setchannel */
Bool_t posImage; /**< Ture: positive image */
bool posImage; /**< Ture: positive image */
/* IQM RC frequecy shift */
u32 iqmRcRateOfs; /**< frequency shifter setting after setchannel */
......@@ -506,11 +506,11 @@ TYPEDEFS
s16 atvTopEqu1[DRXJ_COEF_IDX_MAX]; /**< shadow of ATV_TOP_EQU1__A */
s16 atvTopEqu2[DRXJ_COEF_IDX_MAX]; /**< shadow of ATV_TOP_EQU2__A */
s16 atvTopEqu3[DRXJ_COEF_IDX_MAX]; /**< shadow of ATV_TOP_EQU3__A */
Bool_t phaseCorrectionBypass;/**< flag: TRUE=bypass */
bool phaseCorrectionBypass;/**< flag: true=bypass */
s16 atvTopVidPeak; /**< shadow of ATV_TOP_VID_PEAK__A */
u16 atvTopNoiseTh; /**< shadow of ATV_TOP_NOISE_TH__A */
Bool_t enableCVBSOutput; /**< flag CVBS ouput enable */
Bool_t enableSIFOutput; /**< flag SIF ouput enable */
bool enableCVBSOutput; /**< flag CVBS ouput enable */
bool enableSIFOutput; /**< flag SIF ouput enable */
DRXJSIFAttenuation_t sifAttenuation;
/**< current SIF att setting */
/* Agc configuration for QAM and VSB */
......@@ -536,16 +536,16 @@ TYPEDEFS
/**< allocated version list */
/* smart antenna configuration */
Bool_t smartAntInverted;
bool smartAntInverted;
/* Tracking filter setting for OOB */
u16 oobTrkFilterCfg[8];
Bool_t oobPowerOn;
bool oobPowerOn;
/* MPEG static bitrate setting */
u32 mpegTsStaticBitrate; /**< bitrate static MPEG output */
Bool_t disableTEIhandling; /**< MPEG TS TEI handling */
Bool_t bitReverseMpegOutout;/**< MPEG output bit order */
bool disableTEIhandling; /**< MPEG TS TEI handling */
bool bitReverseMpegOutout;/**< MPEG output bit order */
DRXJMpegOutputClockRate_t mpegOutputClockRate;
/**< MPEG output clock rate */
DRXJMpegStartWidth_t mpegStartWidth;
......@@ -561,7 +561,7 @@ TYPEDEFS
u32 currSymbolRate;
/* pin-safe mode */
Bool_t pdrSafeMode; /**< PDR safe mode activated */
bool pdrSafeMode; /**< PDR safe mode activated */
u16 pdrSafeRestoreValGpio;
u16 pdrSafeRestoreValVSync;
u16 pdrSafeRestoreValSmaRx;
......@@ -631,7 +631,7 @@ DEFINES
* Fcentre = Fpc + DRXJ_NTSC_CARRIER_FREQ_OFFSET
*
*/
#define DRXJ_NTSC_CARRIER_FREQ_OFFSET ((DRXFrequency_t)(1750))
#define DRXJ_NTSC_CARRIER_FREQ_OFFSET ((s32)(1750))
/**
* \def DRXJ_PAL_SECAM_BG_CARRIER_FREQ_OFFSET
......@@ -647,7 +647,7 @@ DEFINES
* care of this.
*
*/
#define DRXJ_PAL_SECAM_BG_CARRIER_FREQ_OFFSET ((DRXFrequency_t)(2375))
#define DRXJ_PAL_SECAM_BG_CARRIER_FREQ_OFFSET ((s32)(2375))
/**
* \def DRXJ_PAL_SECAM_DKIL_CARRIER_FREQ_OFFSET
......@@ -663,7 +663,7 @@ DEFINES
* care of this.
*
*/
#define DRXJ_PAL_SECAM_DKIL_CARRIER_FREQ_OFFSET ((DRXFrequency_t)(2775))
#define DRXJ_PAL_SECAM_DKIL_CARRIER_FREQ_OFFSET ((s32)(2775))
/**
* \def DRXJ_PAL_SECAM_LP_CARRIER_FREQ_OFFSET
......@@ -678,7 +678,7 @@ DEFINES
* In case the tuner module is NOT used the application programmer must take
* care of this.
*/
#define DRXJ_PAL_SECAM_LP_CARRIER_FREQ_OFFSET ((DRXFrequency_t)(-3255))
#define DRXJ_PAL_SECAM_LP_CARRIER_FREQ_OFFSET ((s32)(-3255))
/**
* \def DRXJ_FM_CARRIER_FREQ_OFFSET
......@@ -694,7 +694,7 @@ DEFINES
* Ffm = Fsc + DRXJ_FM_CARRIER_FREQ_OFFSET
*
*/
#define DRXJ_FM_CARRIER_FREQ_OFFSET ((DRXFrequency_t)(-3000))
#define DRXJ_FM_CARRIER_FREQ_OFFSET ((s32)(-3000))
/* Revision types -------------------------------------------------------*/
......
......@@ -7331,8 +7331,8 @@ extern "C" {
#define SCU_RAM_AGC_CLP_CTRL_MODE_NARROW_POW__W 1
#define SCU_RAM_AGC_CLP_CTRL_MODE_NARROW_POW__M 0x1
#define SCU_RAM_AGC_CLP_CTRL_MODE_NARROW_POW__PRE 0x0
#define SCU_RAM_AGC_CLP_CTRL_MODE_NARROW_POW_FALSE 0x0
#define SCU_RAM_AGC_CLP_CTRL_MODE_NARROW_POW_TRUE 0x1
#define SCU_RAM_AGC_CLP_CTRL_MODE_NARROW_POW_false 0x0
#define SCU_RAM_AGC_CLP_CTRL_MODE_NARROW_POW_true 0x1
#define SCU_RAM_AGC_CLP_CTRL_MODE_FAST_CLP_BP__B 1
#define SCU_RAM_AGC_CLP_CTRL_MODE_FAST_CLP_BP__W 1
......@@ -8130,8 +8130,8 @@ extern "C" {
#define SCU_RAM_ATV_DETECT_DETECT__W 1
#define SCU_RAM_ATV_DETECT_DETECT__M 0x1
#define SCU_RAM_ATV_DETECT_DETECT__PRE 0x0
#define SCU_RAM_ATV_DETECT_DETECT_FALSE 0x0
#define SCU_RAM_ATV_DETECT_DETECT_TRUE 0x1
#define SCU_RAM_ATV_DETECT_DETECT_false 0x0
#define SCU_RAM_ATV_DETECT_DETECT_true 0x1
#define SCU_RAM_ATV_DETECT_TH__A 0x831F4A
#define SCU_RAM_ATV_DETECT_TH__W 8
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment