Commit 74e656d6 authored by Guenter Roeck's avatar Guenter Roeck Committed by Greg Kroah-Hartman

staging: typec: Type-C Port Controller Interface driver (tcpci)

The port controller interface driver interconnects the Type-C Port
Manager with a Type-C Port Controller Interface (TCPCI) compliant
port controller.
Signed-off-by: default avatarGuenter Roeck <groeck@chromium.org>
Signed-off-by: default avatarGuenter Roeck <linux@roeck-us.net>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent f0690a25
...@@ -8,4 +8,15 @@ config TYPEC_TCPM ...@@ -8,4 +8,15 @@ config TYPEC_TCPM
The Type-C Port Controller Manager provides a USB PD and USB Type-C The Type-C Port Controller Manager provides a USB PD and USB Type-C
state machine for use with Type-C Port Controllers. state machine for use with Type-C Port Controllers.
if TYPEC_TCPM
config TYPEC_TCPCI
tristate "Type-C Port Controller Interface driver"
depends on I2C
select REGMAP_I2C
help
Type-C Port Controller driver for TCPCI-compliant controller.
endif
endmenu endmenu
obj-$(CONFIG_TYPEC_TCPM) += tcpm.o obj-$(CONFIG_TYPEC_TCPM) += tcpm.o
obj-$(CONFIG_TYPEC_TCPCI) += tcpci.o
...@@ -8,5 +8,8 @@ tcpm: ...@@ -8,5 +8,8 @@ tcpm:
- Add support for USB PD 3.0. While not mandatory, at least fast role swap - Add support for USB PD 3.0. While not mandatory, at least fast role swap
as well as authentication support would be very desirable. as well as authentication support would be very desirable.
tcpci:
- Test with real hardware
Please send patches to Guenter Roeck <linux@roeck-us.net> and copy Please send patches to Guenter Roeck <linux@roeck-us.net> and copy
Heikki Krogerus <heikki.krogerus@linux.intel.com>. Heikki Krogerus <heikki.krogerus@linux.intel.com>.
/*
* Copyright 2015-2017 Google, Inc
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* USB Type-C Port Controller Interface.
*/
#include <linux/delay.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/interrupt.h>
#include <linux/regmap.h>
#include <linux/usb/typec.h>
#include "pd.h"
#include "tcpci.h"
#include "tcpm.h"
#define PD_RETRY_COUNT 3
struct tcpci {
struct device *dev;
struct i2c_client *client;
struct tcpm_port *port;
struct regmap *regmap;
bool controls_vbus;
struct tcpc_dev tcpc;
};
static inline struct tcpci *tcpc_to_tcpci(struct tcpc_dev *tcpc)
{
return container_of(tcpc, struct tcpci, tcpc);
}
static int tcpci_read16(struct tcpci *tcpci, unsigned int reg,
unsigned int *val)
{
return regmap_raw_read(tcpci->regmap, reg, val, sizeof(u16));
}
static int tcpci_write16(struct tcpci *tcpci, unsigned int reg, u16 val)
{
return regmap_raw_write(tcpci->regmap, reg, &val, sizeof(u16));
}
static int tcpci_set_cc(struct tcpc_dev *tcpc, enum typec_cc_status cc)
{
struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
unsigned int reg;
int ret;
switch (cc) {
case TYPEC_CC_RA:
reg = (TCPC_ROLE_CTRL_CC_RA << TCPC_ROLE_CTRL_CC1_SHIFT) |
(TCPC_ROLE_CTRL_CC_RA << TCPC_ROLE_CTRL_CC2_SHIFT);
break;
case TYPEC_CC_RD:
reg = (TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC1_SHIFT) |
(TCPC_ROLE_CTRL_CC_RD << TCPC_ROLE_CTRL_CC2_SHIFT);
break;
case TYPEC_CC_RP_DEF:
reg = (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) |
(TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT) |
(TCPC_ROLE_CTRL_RP_VAL_DEF <<
TCPC_ROLE_CTRL_RP_VAL_SHIFT);
break;
case TYPEC_CC_RP_1_5:
reg = (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) |
(TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT) |
(TCPC_ROLE_CTRL_RP_VAL_1_5 <<
TCPC_ROLE_CTRL_RP_VAL_SHIFT);
break;
case TYPEC_CC_RP_3_0:
reg = (TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC1_SHIFT) |
(TCPC_ROLE_CTRL_CC_RP << TCPC_ROLE_CTRL_CC2_SHIFT) |
(TCPC_ROLE_CTRL_RP_VAL_3_0 <<
TCPC_ROLE_CTRL_RP_VAL_SHIFT);
break;
case TYPEC_CC_OPEN:
default:
reg = (TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC1_SHIFT) |
(TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC2_SHIFT);
break;
}
ret = regmap_write(tcpci->regmap, TCPC_ROLE_CTRL, reg);
if (ret < 0)
return ret;
return 0;
}
static int tcpci_start_drp_toggling(struct tcpc_dev *tcpc,
enum typec_cc_status cc)
{
struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
unsigned int reg = TCPC_ROLE_CTRL_DRP;
switch (cc) {
default:
case TYPEC_CC_RP_DEF:
reg |= (TCPC_ROLE_CTRL_RP_VAL_DEF <<
TCPC_ROLE_CTRL_RP_VAL_SHIFT);
break;
case TYPEC_CC_RP_1_5:
reg |= (TCPC_ROLE_CTRL_RP_VAL_1_5 <<
TCPC_ROLE_CTRL_RP_VAL_SHIFT);
break;
case TYPEC_CC_RP_3_0:
reg |= (TCPC_ROLE_CTRL_RP_VAL_3_0 <<
TCPC_ROLE_CTRL_RP_VAL_SHIFT);
break;
}
return regmap_write(tcpci->regmap, TCPC_ROLE_CTRL, reg);
}
static enum typec_cc_status tcpci_to_typec_cc(unsigned int cc, bool sink)
{
switch (cc) {
case 0x1:
return sink ? TYPEC_CC_RP_DEF : TYPEC_CC_RA;
case 0x2:
return sink ? TYPEC_CC_RP_1_5 : TYPEC_CC_RD;
case 0x3:
if (sink)
return TYPEC_CC_RP_3_0;
case 0x0:
default:
return TYPEC_CC_OPEN;
}
}
static int tcpci_get_cc(struct tcpc_dev *tcpc,
enum typec_cc_status *cc1, enum typec_cc_status *cc2)
{
struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
unsigned int reg;
int ret;
ret = regmap_read(tcpci->regmap, TCPC_CC_STATUS, &reg);
if (ret < 0)
return ret;
*cc1 = tcpci_to_typec_cc((reg >> TCPC_CC_STATUS_CC1_SHIFT) &
TCPC_CC_STATUS_CC1_MASK,
reg & TCPC_CC_STATUS_TERM);
*cc2 = tcpci_to_typec_cc((reg >> TCPC_CC_STATUS_CC2_SHIFT) &
TCPC_CC_STATUS_CC2_MASK,
reg & TCPC_CC_STATUS_TERM);
return 0;
}
static int tcpci_set_polarity(struct tcpc_dev *tcpc,
enum typec_cc_polarity polarity)
{
struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
int ret;
ret = regmap_write(tcpci->regmap, TCPC_TCPC_CTRL,
(polarity == TYPEC_POLARITY_CC2) ?
TCPC_TCPC_CTRL_ORIENTATION : 0);
if (ret < 0)
return ret;
return 0;
}
static int tcpci_set_vconn(struct tcpc_dev *tcpc, bool enable)
{
struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
int ret;
ret = regmap_write(tcpci->regmap, TCPC_POWER_CTRL,
enable ? TCPC_POWER_CTRL_VCONN_ENABLE : 0);
if (ret < 0)
return ret;
return 0;
}
static int tcpci_set_roles(struct tcpc_dev *tcpc, bool attached,
enum typec_role role, enum typec_data_role data)
{
struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
unsigned int reg;
int ret;
reg = PD_REV20 << TCPC_MSG_HDR_INFO_REV_SHIFT;
if (role == TYPEC_SOURCE)
reg |= TCPC_MSG_HDR_INFO_PWR_ROLE;
if (data == TYPEC_HOST)
reg |= TCPC_MSG_HDR_INFO_DATA_ROLE;
ret = regmap_write(tcpci->regmap, TCPC_MSG_HDR_INFO, reg);
if (ret < 0)
return ret;
return 0;
}
static int tcpci_set_pd_rx(struct tcpc_dev *tcpc, bool enable)
{
struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
unsigned int reg = 0;
int ret;
if (enable)
reg = TCPC_RX_DETECT_SOP | TCPC_RX_DETECT_HARD_RESET;
ret = regmap_write(tcpci->regmap, TCPC_RX_DETECT, reg);
if (ret < 0)
return ret;
return 0;
}
static int tcpci_get_vbus(struct tcpc_dev *tcpc)
{
struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
unsigned int reg;
int ret;
ret = regmap_read(tcpci->regmap, TCPC_POWER_STATUS, &reg);
if (ret < 0)
return ret;
return !!(reg & TCPC_POWER_STATUS_VBUS_PRES);
}
static int tcpci_set_vbus(struct tcpc_dev *tcpc, bool source, bool sink)
{
struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
int ret;
/* Disable both source and sink first before enabling anything */
if (!source) {
ret = regmap_write(tcpci->regmap, TCPC_COMMAND,
TCPC_CMD_DISABLE_SRC_VBUS);
if (ret < 0)
return ret;
}
if (!sink) {
ret = regmap_write(tcpci->regmap, TCPC_COMMAND,
TCPC_CMD_DISABLE_SINK_VBUS);
if (ret < 0)
return ret;
}
if (source) {
ret = regmap_write(tcpci->regmap, TCPC_COMMAND,
TCPC_CMD_SRC_VBUS_DEFAULT);
if (ret < 0)
return ret;
}
if (sink) {
ret = regmap_write(tcpci->regmap, TCPC_COMMAND,
TCPC_CMD_SINK_VBUS);
if (ret < 0)
return ret;
}
return 0;
}
static int tcpci_pd_transmit(struct tcpc_dev *tcpc,
enum tcpm_transmit_type type,
const struct pd_message *msg)
{
struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
unsigned int reg, cnt, header;
int ret;
cnt = msg ? pd_header_cnt(msg->header) * 4 : 0;
ret = regmap_write(tcpci->regmap, TCPC_TX_BYTE_CNT, cnt + 2);
if (ret < 0)
return ret;
header = msg ? msg->header : 0;
ret = tcpci_write16(tcpci, TCPC_TX_HDR, header);
if (ret < 0)
return ret;
if (cnt > 0) {
ret = regmap_raw_write(tcpci->regmap, TCPC_TX_DATA,
&msg->payload, cnt);
if (ret < 0)
return ret;
}
reg = (PD_RETRY_COUNT << TCPC_TRANSMIT_RETRY_SHIFT) |
(type << TCPC_TRANSMIT_TYPE_SHIFT);
ret = regmap_write(tcpci->regmap, TCPC_TRANSMIT, reg);
if (ret < 0)
return ret;
return 0;
}
static int tcpci_init(struct tcpc_dev *tcpc)
{
struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
unsigned long timeout = jiffies + msecs_to_jiffies(2000); /* XXX */
unsigned int reg;
int ret;
while (time_before_eq(jiffies, timeout)) {
ret = regmap_read(tcpci->regmap, TCPC_POWER_STATUS, &reg);
if (ret < 0)
return ret;
if (!(reg & TCPC_POWER_STATUS_UNINIT))
break;
usleep_range(10000, 20000);
}
if (time_after(jiffies, timeout))
return -ETIMEDOUT;
/* Clear all events */
ret = tcpci_write16(tcpci, TCPC_ALERT, 0xffff);
if (ret < 0)
return ret;
if (tcpci->controls_vbus)
reg = TCPC_POWER_STATUS_VBUS_PRES;
else
reg = 0;
ret = regmap_write(tcpci->regmap, TCPC_POWER_STATUS_MASK, reg);
if (ret < 0)
return ret;
reg = TCPC_ALERT_TX_SUCCESS | TCPC_ALERT_TX_FAILED |
TCPC_ALERT_TX_DISCARDED | TCPC_ALERT_RX_STATUS |
TCPC_ALERT_RX_HARD_RST | TCPC_ALERT_CC_STATUS;
if (tcpci->controls_vbus)
reg |= TCPC_ALERT_POWER_STATUS;
return tcpci_write16(tcpci, TCPC_ALERT_MASK, reg);
}
static irqreturn_t tcpci_irq(int irq, void *dev_id)
{
struct tcpci *tcpci = dev_id;
unsigned int status, reg;
tcpci_read16(tcpci, TCPC_ALERT, &status);
/*
* Clear alert status for everything except RX_STATUS, which shouldn't
* be cleared until we have successfully retrieved message.
*/
if (status & ~TCPC_ALERT_RX_STATUS)
tcpci_write16(tcpci, TCPC_ALERT,
status & ~TCPC_ALERT_RX_STATUS);
if (status & TCPC_ALERT_CC_STATUS)
tcpm_cc_change(tcpci->port);
if (status & TCPC_ALERT_POWER_STATUS) {
regmap_read(tcpci->regmap, TCPC_POWER_STATUS_MASK, &reg);
/*
* If power status mask has been reset, then the TCPC
* has reset.
*/
if (reg == 0xff)
tcpm_tcpc_reset(tcpci->port);
else
tcpm_vbus_change(tcpci->port);
}
if (status & TCPC_ALERT_RX_STATUS) {
struct pd_message msg;
unsigned int cnt;
regmap_read(tcpci->regmap, TCPC_RX_BYTE_CNT, &cnt);
tcpci_read16(tcpci, TCPC_RX_HDR, &reg);
msg.header = reg;
if (WARN_ON(cnt > sizeof(msg.payload)))
cnt = sizeof(msg.payload);
if (cnt > 0)
regmap_raw_read(tcpci->regmap, TCPC_RX_DATA,
&msg.payload, cnt);
/* Read complete, clear RX status alert bit */
tcpci_write16(tcpci, TCPC_ALERT, TCPC_ALERT_RX_STATUS);
tcpm_pd_receive(tcpci->port, &msg);
}
if (status & TCPC_ALERT_RX_HARD_RST)
tcpm_pd_hard_reset(tcpci->port);
if (status & TCPC_ALERT_TX_SUCCESS)
tcpm_pd_transmit_complete(tcpci->port, TCPC_TX_SUCCESS);
else if (status & TCPC_ALERT_TX_DISCARDED)
tcpm_pd_transmit_complete(tcpci->port, TCPC_TX_DISCARDED);
else if (status & TCPC_ALERT_TX_FAILED)
tcpm_pd_transmit_complete(tcpci->port, TCPC_TX_FAILED);
return IRQ_HANDLED;
}
static const struct regmap_config tcpci_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.max_register = 0x7F, /* 0x80 .. 0xFF are vendor defined */
};
const struct tcpc_config tcpci_tcpc_config = {
.type = TYPEC_PORT_DFP,
.default_role = TYPEC_SINK,
};
static int tcpci_parse_config(struct tcpci *tcpci)
{
tcpci->controls_vbus = true; /* XXX */
/* TODO: Populate struct tcpc_config from ACPI/device-tree */
tcpci->tcpc.config = &tcpci_tcpc_config;
return 0;
}
static int tcpci_probe(struct i2c_client *client,
const struct i2c_device_id *i2c_id)
{
struct tcpci *tcpci;
int err;
tcpci = devm_kzalloc(&client->dev, sizeof(*tcpci), GFP_KERNEL);
if (!tcpci)
return -ENOMEM;
tcpci->client = client;
tcpci->dev = &client->dev;
i2c_set_clientdata(client, tcpci);
tcpci->regmap = devm_regmap_init_i2c(client, &tcpci_regmap_config);
if (IS_ERR(tcpci->regmap))
return PTR_ERR(tcpci->regmap);
tcpci->tcpc.init = tcpci_init;
tcpci->tcpc.get_vbus = tcpci_get_vbus;
tcpci->tcpc.set_vbus = tcpci_set_vbus;
tcpci->tcpc.set_cc = tcpci_set_cc;
tcpci->tcpc.get_cc = tcpci_get_cc;
tcpci->tcpc.set_polarity = tcpci_set_polarity;
tcpci->tcpc.set_vconn = tcpci_set_vconn;
tcpci->tcpc.start_drp_toggling = tcpci_start_drp_toggling;
tcpci->tcpc.set_pd_rx = tcpci_set_pd_rx;
tcpci->tcpc.set_roles = tcpci_set_roles;
tcpci->tcpc.pd_transmit = tcpci_pd_transmit;
err = tcpci_parse_config(tcpci);
if (err < 0)
return err;
/* Disable chip interrupts */
tcpci_write16(tcpci, TCPC_ALERT_MASK, 0);
err = devm_request_threaded_irq(tcpci->dev, client->irq, NULL,
tcpci_irq,
IRQF_ONESHOT | IRQF_TRIGGER_LOW,
dev_name(tcpci->dev), tcpci);
if (err < 0)
return err;
tcpci->port = tcpm_register_port(tcpci->dev, &tcpci->tcpc);
return PTR_ERR_OR_ZERO(tcpci->port);
}
static int tcpci_remove(struct i2c_client *client)
{
struct tcpci *tcpci = i2c_get_clientdata(client);
tcpm_unregister_port(tcpci->port);
return 0;
}
static const struct i2c_device_id tcpci_id[] = {
{ "tcpci", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, tcpci_id);
#ifdef CONFIG_OF
static const struct of_device_id tcpci_of_match[] = {
{ .compatible = "usb,tcpci", },
{},
};
MODULE_DEVICE_TABLE(of, tcpci_of_match);
#endif
static struct i2c_driver tcpci_i2c_driver = {
.driver = {
.name = "tcpci",
.of_match_table = of_match_ptr(tcpci_of_match),
},
.probe = tcpci_probe,
.remove = tcpci_remove,
.id_table = tcpci_id,
};
module_i2c_driver(tcpci_i2c_driver);
MODULE_DESCRIPTION("USB Type-C Port Controller Interface driver");
MODULE_LICENSE("GPL");
/*
* Copyright 2015-2017 Google, Inc
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* USB Type-C Port Controller Interface.
*/
#ifndef __LINUX_USB_TCPCI_H
#define __LINUX_USB_TCPCI_H
#define TCPC_VENDOR_ID 0x0
#define TCPC_PRODUCT_ID 0x2
#define TCPC_BCD_DEV 0x4
#define TCPC_TC_REV 0x6
#define TCPC_PD_REV 0x8
#define TCPC_PD_INT_REV 0xa
#define TCPC_ALERT 0x10
#define TCPC_ALERT_VBUS_DISCNCT BIT(11)
#define TCPC_ALERT_RX_BUF_OVF BIT(10)
#define TCPC_ALERT_FAULT BIT(9)
#define TCPC_ALERT_V_ALARM_LO BIT(8)
#define TCPC_ALERT_V_ALARM_HI BIT(7)
#define TCPC_ALERT_TX_SUCCESS BIT(6)
#define TCPC_ALERT_TX_DISCARDED BIT(5)
#define TCPC_ALERT_TX_FAILED BIT(4)
#define TCPC_ALERT_RX_HARD_RST BIT(3)
#define TCPC_ALERT_RX_STATUS BIT(2)
#define TCPC_ALERT_POWER_STATUS BIT(1)
#define TCPC_ALERT_CC_STATUS BIT(0)
#define TCPC_ALERT_MASK 0x12
#define TCPC_POWER_STATUS_MASK 0x14
#define TCPC_FAULT_STATUS_MASK 0x15
#define TCPC_CONFIG_STD_OUTPUT 0x18
#define TCPC_TCPC_CTRL 0x19
#define TCPC_TCPC_CTRL_ORIENTATION BIT(0)
#define TCPC_ROLE_CTRL 0x1a
#define TCPC_ROLE_CTRL_DRP BIT(6)
#define TCPC_ROLE_CTRL_RP_VAL_SHIFT 4
#define TCPC_ROLE_CTRL_RP_VAL_MASK 0x3
#define TCPC_ROLE_CTRL_RP_VAL_DEF 0x0
#define TCPC_ROLE_CTRL_RP_VAL_1_5 0x1
#define TCPC_ROLE_CTRL_RP_VAL_3_0 0x2
#define TCPC_ROLE_CTRL_CC2_SHIFT 2
#define TCPC_ROLE_CTRL_CC2_MASK 0x3
#define TCPC_ROLE_CTRL_CC1_SHIFT 0
#define TCPC_ROLE_CTRL_CC1_MASK 0x3
#define TCPC_ROLE_CTRL_CC_RA 0x0
#define TCPC_ROLE_CTRL_CC_RP 0x1
#define TCPC_ROLE_CTRL_CC_RD 0x2
#define TCPC_ROLE_CTRL_CC_OPEN 0x3
#define TCPC_FAULT_CTRL 0x1b
#define TCPC_POWER_CTRL 0x1c
#define TCPC_POWER_CTRL_VCONN_ENABLE BIT(0)
#define TCPC_CC_STATUS 0x1d
#define TCPC_CC_STATUS_TERM BIT(4)
#define TCPC_CC_STATUS_CC2_SHIFT 2
#define TCPC_CC_STATUS_CC2_MASK 0x3
#define TCPC_CC_STATUS_CC1_SHIFT 0
#define TCPC_CC_STATUS_CC1_MASK 0x3
#define TCPC_POWER_STATUS 0x1e
#define TCPC_POWER_STATUS_UNINIT BIT(6)
#define TCPC_POWER_STATUS_VBUS_DET BIT(3)
#define TCPC_POWER_STATUS_VBUS_PRES BIT(2)
#define TCPC_FAULT_STATUS 0x1f
#define TCPC_COMMAND 0x23
#define TCPC_CMD_WAKE_I2C 0x11
#define TCPC_CMD_DISABLE_VBUS_DETECT 0x22
#define TCPC_CMD_ENABLE_VBUS_DETECT 0x33
#define TCPC_CMD_DISABLE_SINK_VBUS 0x44
#define TCPC_CMD_SINK_VBUS 0x55
#define TCPC_CMD_DISABLE_SRC_VBUS 0x66
#define TCPC_CMD_SRC_VBUS_DEFAULT 0x77
#define TCPC_CMD_SRC_VBUS_HIGH 0x88
#define TCPC_CMD_LOOK4CONNECTION 0x99
#define TCPC_CMD_RXONEMORE 0xAA
#define TCPC_CMD_I2C_IDLE 0xFF
#define TCPC_DEV_CAP_1 0x24
#define TCPC_DEV_CAP_2 0x26
#define TCPC_STD_INPUT_CAP 0x28
#define TCPC_STD_OUTPUT_CAP 0x29
#define TCPC_MSG_HDR_INFO 0x2e
#define TCPC_MSG_HDR_INFO_DATA_ROLE BIT(3)
#define TCPC_MSG_HDR_INFO_PWR_ROLE BIT(0)
#define TCPC_MSG_HDR_INFO_REV_SHIFT 1
#define TCPC_MSG_HDR_INFO_REV_MASK 0x3
#define TCPC_RX_DETECT 0x2f
#define TCPC_RX_DETECT_HARD_RESET BIT(5)
#define TCPC_RX_DETECT_SOP BIT(0)
#define TCPC_RX_BYTE_CNT 0x30
#define TCPC_RX_BUF_FRAME_TYPE 0x31
#define TCPC_RX_HDR 0x32
#define TCPC_RX_DATA 0x34 /* through 0x4f */
#define TCPC_TRANSMIT 0x50
#define TCPC_TRANSMIT_RETRY_SHIFT 4
#define TCPC_TRANSMIT_RETRY_MASK 0x3
#define TCPC_TRANSMIT_TYPE_SHIFT 0
#define TCPC_TRANSMIT_TYPE_MASK 0x7
#define TCPC_TX_BYTE_CNT 0x51
#define TCPC_TX_HDR 0x52
#define TCPC_TX_DATA 0x54 /* through 0x6f */
#define TCPC_VBUS_VOLTAGE 0x70
#define TCPC_VBUS_SINK_DISCONNECT_THRESH 0x72
#define TCPC_VBUS_STOP_DISCHARGE_THRESH 0x74
#define TCPC_VBUS_VOLTAGE_ALARM_HI_CFG 0x76
#define TCPC_VBUS_VOLTAGE_ALARM_LO_CFG 0x78
#endif /* __LINUX_USB_TCPCI_H */
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