Commit 7522ffc4 authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher

drm/amd/powerplay: refine pwm1_enable callback functions for Vega10.

Use the new enums for setting and getting the fan control mode.
Fixes problems due to previous inconsistencies between enums.
Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent aad22ca4
...@@ -3921,32 +3921,36 @@ static int vega10_dpm_force_dpm_level(struct pp_hwmgr *hwmgr, ...@@ -3921,32 +3921,36 @@ static int vega10_dpm_force_dpm_level(struct pp_hwmgr *hwmgr,
static int vega10_set_fan_control_mode(struct pp_hwmgr *hwmgr, uint32_t mode) static int vega10_set_fan_control_mode(struct pp_hwmgr *hwmgr, uint32_t mode)
{ {
if (mode) { int result = 0;
/* stop auto-manage */
switch (mode) {
case AMD_FAN_CTRL_NONE:
result = vega10_fan_ctrl_set_fan_speed_percent(hwmgr, 100);
break;
case AMD_FAN_CTRL_MANUAL:
if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
PHM_PlatformCaps_MicrocodeFanControl)) PHM_PlatformCaps_MicrocodeFanControl))
vega10_fan_ctrl_stop_smc_fan_control(hwmgr); result = vega10_fan_ctrl_stop_smc_fan_control(hwmgr);
vega10_fan_ctrl_set_static_mode(hwmgr, mode); break;
} else case AMD_FAN_CTRL_AUTO:
/* restart auto-manage */ result = vega10_fan_ctrl_set_static_mode(hwmgr, mode);
vega10_fan_ctrl_reset_fan_speed_to_default(hwmgr); if (!result)
result = vega10_fan_ctrl_start_smc_fan_control(hwmgr);
return 0; break;
default:
break;
}
return result;
} }
static int vega10_get_fan_control_mode(struct pp_hwmgr *hwmgr) static int vega10_get_fan_control_mode(struct pp_hwmgr *hwmgr)
{ {
uint32_t reg; struct vega10_hwmgr *data = (struct vega10_hwmgr *)(hwmgr->backend);
if (hwmgr->fan_ctrl_is_in_default_mode) { if (data->smu_features[GNLD_FAN_CONTROL].enabled == false)
return hwmgr->fan_ctrl_default_mode; return AMD_FAN_CTRL_MANUAL;
} else { else
reg = soc15_get_register_offset(THM_HWID, 0, return AMD_FAN_CTRL_AUTO;
mmCG_FDO_CTRL2_BASE_IDX, mmCG_FDO_CTRL2);
return (cgs_read_register(hwmgr->device, reg) &
CG_FDO_CTRL2__FDO_PWM_MODE_MASK) >>
CG_FDO_CTRL2__FDO_PWM_MODE__SHIFT;
}
} }
static int vega10_get_dal_power_level(struct pp_hwmgr *hwmgr, static int vega10_get_dal_power_level(struct pp_hwmgr *hwmgr,
......
...@@ -79,6 +79,7 @@ extern int vega10_fan_ctrl_get_fan_speed_rpm(struct pp_hwmgr *hwmgr, ...@@ -79,6 +79,7 @@ extern int vega10_fan_ctrl_get_fan_speed_rpm(struct pp_hwmgr *hwmgr,
extern int vega10_fan_ctrl_stop_smc_fan_control(struct pp_hwmgr *hwmgr); extern int vega10_fan_ctrl_stop_smc_fan_control(struct pp_hwmgr *hwmgr);
extern uint32_t smu7_get_xclk(struct pp_hwmgr *hwmgr); extern uint32_t smu7_get_xclk(struct pp_hwmgr *hwmgr);
extern int vega10_thermal_disable_alert(struct pp_hwmgr *hwmgr); extern int vega10_thermal_disable_alert(struct pp_hwmgr *hwmgr);
int vega10_fan_ctrl_start_smc_fan_control(struct pp_hwmgr *hwmgr);
#endif #endif
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