Commit 776ab6a3 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven Committed by Rob Herring

dt-bindings: reset: rcar-rst: Convert to json-schema

Convert the Renesas R-Car Reset Controller Device Tree binding
documentation to json-schema.
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: default avatarNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: default avatarRob Herring <robh@kernel.org>
parent 85e1f221
DT bindings for the Renesas R-Car and RZ/G Reset Controllers
The R-Car and RZ/G Reset Controllers provide reset control, and implement the
following functions:
- Latching of the levels on mode pins when PRESET# is negated,
- Mode monitoring register,
- Reset control of peripheral devices (on R-Car Gen1),
- Watchdog timer (on R-Car Gen1),
- Register-based reset control and boot address registers for the various CPU
cores (on R-Car Gen2 and Gen3, and on RZ/G).
Required properties:
- compatible: Should be
- "renesas,<soctype>-reset-wdt" for R-Car Gen1,
- "renesas,<soctype>-rst" for R-Car Gen2 and Gen3, and RZ/G
Examples with soctypes are:
- "renesas,r8a7743-rst" (RZ/G1M)
- "renesas,r8a7744-rst" (RZ/G1N)
- "renesas,r8a7745-rst" (RZ/G1E)
- "renesas,r8a77470-rst" (RZ/G1C)
- "renesas,r8a774a1-rst" (RZ/G2M)
- "renesas,r8a774b1-rst" (RZ/G2N)
- "renesas,r8a774c0-rst" (RZ/G2E)
- "renesas,r8a7778-reset-wdt" (R-Car M1A)
- "renesas,r8a7779-reset-wdt" (R-Car H1)
- "renesas,r8a7790-rst" (R-Car H2)
- "renesas,r8a7791-rst" (R-Car M2-W)
- "renesas,r8a7792-rst" (R-Car V2H
- "renesas,r8a7793-rst" (R-Car M2-N)
- "renesas,r8a7794-rst" (R-Car E2)
- "renesas,r8a7795-rst" (R-Car H3)
- "renesas,r8a7796-rst" (R-Car M3-W)
- "renesas,r8a77961-rst" (R-Car M3-W+)
- "renesas,r8a77965-rst" (R-Car M3-N)
- "renesas,r8a77970-rst" (R-Car V3M)
- "renesas,r8a77980-rst" (R-Car V3H)
- "renesas,r8a77990-rst" (R-Car E3)
- "renesas,r8a77995-rst" (R-Car D3)
- reg: Address start and address range for the device.
Example:
rst: reset-controller@e6160000 {
compatible = "renesas,r8a7795-rst";
reg = <0 0xe6160000 0 0x0200>;
};
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: "http://devicetree.org/schemas/reset/renesas,rst.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: Renesas R-Car and RZ/G Reset Controller
maintainers:
- Geert Uytterhoeven <geert+renesas@glider.be>
- Magnus Damm <magnus.damm@gmail.com>
description: |
The R-Car and RZ/G Reset Controllers provide reset control, and implement the
following functions:
- Latching of the levels on mode pins when PRESET# is negated,
- Mode monitoring register,
- Reset control of peripheral devices (on R-Car Gen1),
- Watchdog timer (on R-Car Gen1),
- Register-based reset control and boot address registers for the various
CPU cores (on R-Car Gen2 and Gen3, and on RZ/G).
properties:
compatible:
enum:
- renesas,r8a7743-rst # RZ/G1M
- renesas,r8a7744-rst # RZ/G1N
- renesas,r8a7745-rst # RZ/G1E
- renesas,r8a77470-rst # RZ/G1C
- renesas,r8a774a1-rst # RZ/G2M
- renesas,r8a774b1-rst # RZ/G2N
- renesas,r8a774c0-rst # RZ/G2E
- renesas,r8a7778-reset-wdt # R-Car M1A
- renesas,r8a7779-reset-wdt # R-Car H1
- renesas,r8a7790-rst # R-Car H2
- renesas,r8a7791-rst # R-Car M2-W
- renesas,r8a7792-rst # R-Car V2H
- renesas,r8a7793-rst # R-Car M2-N
- renesas,r8a7794-rst # R-Car E2
- renesas,r8a7795-rst # R-Car H3
- renesas,r8a7796-rst # R-Car M3-W
- renesas,r8a77961-rst # R-Car M3-W+
- renesas,r8a77965-rst # R-Car M3-N
- renesas,r8a77970-rst # R-Car V3M
- renesas,r8a77980-rst # R-Car V3H
- renesas,r8a77990-rst # R-Car E3
- renesas,r8a77995-rst # R-Car D3
reg:
maxItems: 1
required:
- compatible
- reg
additionalProperties: false
examples:
- |
rst: reset-controller@e6160000 {
compatible = "renesas,r8a7795-rst";
reg = <0xe6160000 0x0200>;
};
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