Commit 785ee983 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk fixes from Stephen Boyd:
 "A collection of clk driver fixes and one core clk API fix:

   - Fix stm32 clk data to avoid a crash early on

   - Fix a randconfig build error in HiSilicon clk driver

   - Avoid an oops at boot on Qualcomm MSM8936 SoCs due to
     an improper consolidation of structs

   - Fix imbalanced disabling of the unused MMC clock on
     Tegra210 Jetson Nano

   - Plug a memory leak in devm_clk_bulk_get_all() unwind
     path"

* tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
  clk: fix leak on devm_clk_bulk_get_all() unwind
  clk: tegra: Implement disable_unused() of tegra_clk_sdmmc_mux_ops
  clk: qcom: smd-rpm: Fix MSM8936 RPM_SMD_PCNOC_A_CLK
  clk: hisilicon: hi3559a: select RESET_HISI
  clk: stm32f4: fix post divisor setup for I2S/SAI PLLs
parents c500bee1 f828b0bc
...@@ -92,13 +92,20 @@ int __must_check devm_clk_bulk_get_optional(struct device *dev, int num_clks, ...@@ -92,13 +92,20 @@ int __must_check devm_clk_bulk_get_optional(struct device *dev, int num_clks,
} }
EXPORT_SYMBOL_GPL(devm_clk_bulk_get_optional); EXPORT_SYMBOL_GPL(devm_clk_bulk_get_optional);
static void devm_clk_bulk_release_all(struct device *dev, void *res)
{
struct clk_bulk_devres *devres = res;
clk_bulk_put_all(devres->num_clks, devres->clks);
}
int __must_check devm_clk_bulk_get_all(struct device *dev, int __must_check devm_clk_bulk_get_all(struct device *dev,
struct clk_bulk_data **clks) struct clk_bulk_data **clks)
{ {
struct clk_bulk_devres *devres; struct clk_bulk_devres *devres;
int ret; int ret;
devres = devres_alloc(devm_clk_bulk_release, devres = devres_alloc(devm_clk_bulk_release_all,
sizeof(*devres), GFP_KERNEL); sizeof(*devres), GFP_KERNEL);
if (!devres) if (!devres)
return -ENOMEM; return -ENOMEM;
......
...@@ -526,7 +526,7 @@ struct stm32f4_pll { ...@@ -526,7 +526,7 @@ struct stm32f4_pll {
struct stm32f4_pll_post_div_data { struct stm32f4_pll_post_div_data {
int idx; int idx;
u8 pll_num; int pll_idx;
const char *name; const char *name;
const char *parent; const char *parent;
u8 flag; u8 flag;
...@@ -557,13 +557,13 @@ static const struct clk_div_table post_divr_table[] = { ...@@ -557,13 +557,13 @@ static const struct clk_div_table post_divr_table[] = {
#define MAX_POST_DIV 3 #define MAX_POST_DIV 3
static const struct stm32f4_pll_post_div_data post_div_data[MAX_POST_DIV] = { static const struct stm32f4_pll_post_div_data post_div_data[MAX_POST_DIV] = {
{ CLK_I2SQ_PDIV, PLL_I2S, "plli2s-q-div", "plli2s-q", { CLK_I2SQ_PDIV, PLL_VCO_I2S, "plli2s-q-div", "plli2s-q",
CLK_SET_RATE_PARENT, STM32F4_RCC_DCKCFGR, 0, 5, 0, NULL}, CLK_SET_RATE_PARENT, STM32F4_RCC_DCKCFGR, 0, 5, 0, NULL},
{ CLK_SAIQ_PDIV, PLL_SAI, "pllsai-q-div", "pllsai-q", { CLK_SAIQ_PDIV, PLL_VCO_SAI, "pllsai-q-div", "pllsai-q",
CLK_SET_RATE_PARENT, STM32F4_RCC_DCKCFGR, 8, 5, 0, NULL }, CLK_SET_RATE_PARENT, STM32F4_RCC_DCKCFGR, 8, 5, 0, NULL },
{ NO_IDX, PLL_SAI, "pllsai-r-div", "pllsai-r", CLK_SET_RATE_PARENT, { NO_IDX, PLL_VCO_SAI, "pllsai-r-div", "pllsai-r", CLK_SET_RATE_PARENT,
STM32F4_RCC_DCKCFGR, 16, 2, 0, post_divr_table }, STM32F4_RCC_DCKCFGR, 16, 2, 0, post_divr_table },
}; };
...@@ -1774,7 +1774,7 @@ static void __init stm32f4_rcc_init(struct device_node *np) ...@@ -1774,7 +1774,7 @@ static void __init stm32f4_rcc_init(struct device_node *np)
post_div->width, post_div->width,
post_div->flag_div, post_div->flag_div,
post_div->div_table, post_div->div_table,
clks[post_div->pll_num], clks[post_div->pll_idx],
&stm32f4_clk_lock); &stm32f4_clk_lock);
if (post_div->idx != NO_IDX) if (post_div->idx != NO_IDX)
......
...@@ -18,6 +18,7 @@ config COMMON_CLK_HI3519 ...@@ -18,6 +18,7 @@ config COMMON_CLK_HI3519
config COMMON_CLK_HI3559A config COMMON_CLK_HI3559A
bool "Hi3559A Clock Driver" bool "Hi3559A Clock Driver"
depends on ARCH_HISI || COMPILE_TEST depends on ARCH_HISI || COMPILE_TEST
select RESET_HISI
default ARCH_HISI default ARCH_HISI
help help
Build the clock driver for hi3559a. Build the clock driver for hi3559a.
......
...@@ -467,7 +467,7 @@ DEFINE_CLK_SMD_RPM(msm8936, sysmmnoc_clk, sysmmnoc_a_clk, QCOM_SMD_RPM_BUS_CLK, ...@@ -467,7 +467,7 @@ DEFINE_CLK_SMD_RPM(msm8936, sysmmnoc_clk, sysmmnoc_a_clk, QCOM_SMD_RPM_BUS_CLK,
static struct clk_smd_rpm *msm8936_clks[] = { static struct clk_smd_rpm *msm8936_clks[] = {
[RPM_SMD_PCNOC_CLK] = &msm8916_pcnoc_clk, [RPM_SMD_PCNOC_CLK] = &msm8916_pcnoc_clk,
[RPM_SMD_PCNOC_A_CLK] = &msm8916_pcnoc_clk, [RPM_SMD_PCNOC_A_CLK] = &msm8916_pcnoc_a_clk,
[RPM_SMD_SNOC_CLK] = &msm8916_snoc_clk, [RPM_SMD_SNOC_CLK] = &msm8916_snoc_clk,
[RPM_SMD_SNOC_A_CLK] = &msm8916_snoc_a_clk, [RPM_SMD_SNOC_A_CLK] = &msm8916_snoc_a_clk,
[RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk, [RPM_SMD_BIMC_CLK] = &msm8916_bimc_clk,
......
...@@ -194,6 +194,15 @@ static void clk_sdmmc_mux_disable(struct clk_hw *hw) ...@@ -194,6 +194,15 @@ static void clk_sdmmc_mux_disable(struct clk_hw *hw)
gate_ops->disable(gate_hw); gate_ops->disable(gate_hw);
} }
static void clk_sdmmc_mux_disable_unused(struct clk_hw *hw)
{
struct tegra_sdmmc_mux *sdmmc_mux = to_clk_sdmmc_mux(hw);
const struct clk_ops *gate_ops = sdmmc_mux->gate_ops;
struct clk_hw *gate_hw = &sdmmc_mux->gate.hw;
gate_ops->disable_unused(gate_hw);
}
static void clk_sdmmc_mux_restore_context(struct clk_hw *hw) static void clk_sdmmc_mux_restore_context(struct clk_hw *hw)
{ {
struct clk_hw *parent = clk_hw_get_parent(hw); struct clk_hw *parent = clk_hw_get_parent(hw);
...@@ -218,6 +227,7 @@ static const struct clk_ops tegra_clk_sdmmc_mux_ops = { ...@@ -218,6 +227,7 @@ static const struct clk_ops tegra_clk_sdmmc_mux_ops = {
.is_enabled = clk_sdmmc_mux_is_enabled, .is_enabled = clk_sdmmc_mux_is_enabled,
.enable = clk_sdmmc_mux_enable, .enable = clk_sdmmc_mux_enable,
.disable = clk_sdmmc_mux_disable, .disable = clk_sdmmc_mux_disable,
.disable_unused = clk_sdmmc_mux_disable_unused,
.restore_context = clk_sdmmc_mux_restore_context, .restore_context = clk_sdmmc_mux_restore_context,
}; };
......
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