Commit 78da2640 authored by Vaibhav Hiremath's avatar Vaibhav Hiremath Committed by Paul Walmsley

ARM: OMAP2+: dpll: Add missing soc_is_am33xx() check for common functions

Add missing soc_is_am33xx() check for DPLL common control & clock
related functions, without this dpll programmability would be broken
for am33xx family of devices.
Signed-off-by: default avatarVaibhav Hiremath <hvaibhav@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
parent a2cfc509
...@@ -211,7 +211,7 @@ void omap2_init_dpll_parent(struct clk *clk) ...@@ -211,7 +211,7 @@ void omap2_init_dpll_parent(struct clk *clk)
if (v == OMAP3XXX_EN_DPLL_LPBYPASS || if (v == OMAP3XXX_EN_DPLL_LPBYPASS ||
v == OMAP3XXX_EN_DPLL_FRBYPASS) v == OMAP3XXX_EN_DPLL_FRBYPASS)
clk_reparent(clk, dd->clk_bypass); clk_reparent(clk, dd->clk_bypass);
} else if (cpu_is_omap44xx()) { } else if (soc_is_am33xx() || cpu_is_omap44xx()) {
if (v == OMAP4XXX_EN_DPLL_LPBYPASS || if (v == OMAP4XXX_EN_DPLL_LPBYPASS ||
v == OMAP4XXX_EN_DPLL_FRBYPASS || v == OMAP4XXX_EN_DPLL_FRBYPASS ||
v == OMAP4XXX_EN_DPLL_MNBYPASS) v == OMAP4XXX_EN_DPLL_MNBYPASS)
...@@ -257,7 +257,7 @@ u32 omap2_get_dpll_rate(struct clk *clk) ...@@ -257,7 +257,7 @@ u32 omap2_get_dpll_rate(struct clk *clk)
if (v == OMAP3XXX_EN_DPLL_LPBYPASS || if (v == OMAP3XXX_EN_DPLL_LPBYPASS ||
v == OMAP3XXX_EN_DPLL_FRBYPASS) v == OMAP3XXX_EN_DPLL_FRBYPASS)
return dd->clk_bypass->rate; return dd->clk_bypass->rate;
} else if (cpu_is_omap44xx()) { } else if (soc_is_am33xx() || cpu_is_omap44xx()) {
if (v == OMAP4XXX_EN_DPLL_LPBYPASS || if (v == OMAP4XXX_EN_DPLL_LPBYPASS ||
v == OMAP4XXX_EN_DPLL_FRBYPASS || v == OMAP4XXX_EN_DPLL_FRBYPASS ||
v == OMAP4XXX_EN_DPLL_MNBYPASS) v == OMAP4XXX_EN_DPLL_MNBYPASS)
......
...@@ -311,7 +311,7 @@ static int omap3_noncore_dpll_program(struct clk *clk, u16 m, u8 n, u16 freqsel) ...@@ -311,7 +311,7 @@ static int omap3_noncore_dpll_program(struct clk *clk, u16 m, u8 n, u16 freqsel)
* Set jitter correction. No jitter correction for OMAP4 and 3630 * Set jitter correction. No jitter correction for OMAP4 and 3630
* since freqsel field is no longer present * since freqsel field is no longer present
*/ */
if (!cpu_is_omap44xx() && !cpu_is_omap3630()) { if (!soc_is_am33xx() && !cpu_is_omap44xx() && !cpu_is_omap3630()) {
v = __raw_readl(dd->control_reg); v = __raw_readl(dd->control_reg);
v &= ~dd->freqsel_mask; v &= ~dd->freqsel_mask;
v |= freqsel << __ffs(dd->freqsel_mask); v |= freqsel << __ffs(dd->freqsel_mask);
...@@ -471,7 +471,7 @@ int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate) ...@@ -471,7 +471,7 @@ int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate)
return -EINVAL; return -EINVAL;
/* No freqsel on OMAP4 and OMAP3630 */ /* No freqsel on OMAP4 and OMAP3630 */
if (!cpu_is_omap44xx() && !cpu_is_omap3630()) { if (!soc_is_am33xx() && !cpu_is_omap44xx() && !cpu_is_omap3630()) {
freqsel = _omap3_dpll_compute_freqsel(clk, freqsel = _omap3_dpll_compute_freqsel(clk,
dd->last_rounded_n); dd->last_rounded_n);
if (!freqsel) if (!freqsel)
......
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