Commit 79c04621 authored by Stanley.Yang's avatar Stanley.Yang Committed by Alex Deucher

drm/amdgpu: handle denied inject error into critical regions v2

Changed from v1:
    remove unused brace
Signed-off-by: default avatarStanley.Yang <Stanley.Yang@amd.com>
Reviewed-by: default avatarTao Zhou <tao.zhou1@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 3ddd0c90
...@@ -1335,6 +1335,11 @@ static void psp_ras_ta_check_status(struct psp_context *psp) ...@@ -1335,6 +1335,11 @@ static void psp_ras_ta_check_status(struct psp_context *psp)
break; break;
case TA_RAS_STATUS__SUCCESS: case TA_RAS_STATUS__SUCCESS:
break; break;
case TA_RAS_STATUS__TEE_ERROR_ACCESS_DENIED:
if (ras_cmd->cmd_id == TA_RAS_COMMAND__TRIGGER_ERROR)
dev_warn(psp->adev->dev,
"RAS WARNING: Inject error to critical region is not allowed\n");
break;
default: default:
dev_warn(psp->adev->dev, dev_warn(psp->adev->dev,
"RAS WARNING: ras status = 0x%X\n", ras_cmd->ras_status); "RAS WARNING: ras status = 0x%X\n", ras_cmd->ras_status);
...@@ -1547,7 +1552,9 @@ int psp_ras_trigger_error(struct psp_context *psp, ...@@ -1547,7 +1552,9 @@ int psp_ras_trigger_error(struct psp_context *psp,
if (amdgpu_ras_intr_triggered()) if (amdgpu_ras_intr_triggered())
return 0; return 0;
if (ras_cmd->ras_status) if (ras_cmd->ras_status == TA_RAS_STATUS__TEE_ERROR_ACCESS_DENIED)
return -EACCES;
else if (ras_cmd->ras_status)
return -EINVAL; return -EINVAL;
return 0; return 0;
......
...@@ -455,7 +455,7 @@ static ssize_t amdgpu_ras_debugfs_ctrl_write(struct file *f, ...@@ -455,7 +455,7 @@ static ssize_t amdgpu_ras_debugfs_ctrl_write(struct file *f,
} }
if (ret) if (ret)
return -EINVAL; return ret;
return size; return size;
} }
......
...@@ -64,7 +64,8 @@ enum ta_ras_status { ...@@ -64,7 +64,8 @@ enum ta_ras_status {
TA_RAS_STATUS__ERROR_PCS_STATE_ERROR = 0xA016, TA_RAS_STATUS__ERROR_PCS_STATE_ERROR = 0xA016,
TA_RAS_STATUS__ERROR_PCS_STATE_HANG = 0xA017, TA_RAS_STATUS__ERROR_PCS_STATE_HANG = 0xA017,
TA_RAS_STATUS__ERROR_PCS_STATE_UNKNOWN = 0xA018, TA_RAS_STATUS__ERROR_PCS_STATE_UNKNOWN = 0xA018,
TA_RAS_STATUS__ERROR_UNSUPPORTED_ERROR_INJ = 0xA019 TA_RAS_STATUS__ERROR_UNSUPPORTED_ERROR_INJ = 0xA019,
TA_RAS_STATUS__TEE_ERROR_ACCESS_DENIED = 0xA01A
}; };
enum ta_ras_block { enum ta_ras_block {
......
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