Commit 7ba1faa4 authored by Emmanuel Grumbach's avatar Emmanuel Grumbach

iwlwifi: pcie: move interrupt prints to the common handler

Handling interrupt with no cause and printing logs doesn't
need to be ICT / non-ICT specific move this to the common
code.
Reviewed-by: default avatarJohannes Berg <johannes.berg@intel.com>
Signed-off-by: default avatarEmmanuel Grumbach <emmanuel.grumbach@intel.com>
parent fe523dc9
...@@ -819,43 +819,6 @@ static u32 iwl_pcie_int_cause_non_ict(struct iwl_trans *trans) ...@@ -819,43 +819,6 @@ static u32 iwl_pcie_int_cause_non_ict(struct iwl_trans *trans)
/* Discover which interrupts are active/pending */ /* Discover which interrupts are active/pending */
inta = iwl_read32(trans, CSR_INT); inta = iwl_read32(trans, CSR_INT);
if (inta & (~trans_pcie->inta_mask)) {
IWL_DEBUG_ISR(trans,
"We got a masked interrupt (0x%08x)...Ack and ignore\n",
inta & (~trans_pcie->inta_mask));
iwl_write32(trans, CSR_INT, inta & (~trans_pcie->inta_mask));
inta &= trans_pcie->inta_mask;
}
/* Ignore interrupt if there's nothing in NIC to service.
* This may be due to IRQ shared with another device,
* or due to sporadic interrupts thrown from our NIC. */
if (!inta) {
IWL_DEBUG_ISR(trans, "Ignore interrupt, inta == 0\n");
/*
* Re-enable interrupts here since we don't have anything to
* service, but only in case the handler won't run. Note that
* the handler can be scheduled because of a previous
* interrupt.
*/
if (test_bit(STATUS_INT_ENABLED, &trans->status) && !inta)
iwl_enable_interrupts(trans);
return inta;
}
if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
/* Hardware disappeared. It might have already raised
* an interrupt */
IWL_WARN(trans, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
return 0xFFFFFFFF;
}
if (iwl_have_debug_level(IWL_DL_ISR))
IWL_DEBUG_ISR(trans,
"ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
inta, trans_pcie->inta_mask,
iwl_read32(trans, CSR_FH_INT_STATUS));
/* the thread will service interrupts and re-enable them */ /* the thread will service interrupts and re-enable them */
return inta; return inta;
} }
...@@ -887,10 +850,8 @@ static u32 iwl_pcie_int_cause_ict(struct iwl_trans *trans) ...@@ -887,10 +850,8 @@ static u32 iwl_pcie_int_cause_ict(struct iwl_trans *trans)
* or due to sporadic interrupts thrown from our NIC. */ * or due to sporadic interrupts thrown from our NIC. */
read = le32_to_cpu(trans_pcie->ict_tbl[trans_pcie->ict_index]); read = le32_to_cpu(trans_pcie->ict_tbl[trans_pcie->ict_index]);
trace_iwlwifi_dev_ict_read(trans->dev, trans_pcie->ict_index, read); trace_iwlwifi_dev_ict_read(trans->dev, trans_pcie->ict_index, read);
if (!read) { if (!read)
IWL_DEBUG_ISR(trans, "Ignore interrupt, inta == 0\n"); return 0;
goto none;
}
/* /*
* Collect all entries up to the first 0, starting from ict_index; * Collect all entries up to the first 0, starting from ict_index;
...@@ -924,25 +885,6 @@ static u32 iwl_pcie_int_cause_ict(struct iwl_trans *trans) ...@@ -924,25 +885,6 @@ static u32 iwl_pcie_int_cause_ict(struct iwl_trans *trans)
val |= 0x8000; val |= 0x8000;
inta = (0xff & val) | ((0xff00 & val) << 16); inta = (0xff & val) | ((0xff00 & val) << 16);
IWL_DEBUG_ISR(trans, "ISR inta 0x%08x, enabled(sw) 0x%08x ict 0x%08x\n",
inta, trans_pcie->inta_mask, val);
if (iwl_have_debug_level(IWL_DL_ISR))
IWL_DEBUG_ISR(trans, "enabled(hw) 0x%08x\n",
iwl_read32(trans, CSR_INT_MASK));
inta &= trans_pcie->inta_mask;
/* iwl_pcie_tasklet() will service interrupts and re-enable them */
if (likely(inta))
return inta;
none:
/* re-enable interrupts here since we don't have anything to service.
* only Re-enable if disabled by irq.
*/
if (test_bit(STATUS_INT_ENABLED, &trans->status) && !inta)
iwl_enable_interrupts(trans);
return inta; return inta;
} }
...@@ -968,13 +910,44 @@ irqreturn_t iwl_pcie_irq_handler(int irq, void *dev_id) ...@@ -968,13 +910,44 @@ irqreturn_t iwl_pcie_irq_handler(int irq, void *dev_id)
else else
inta = iwl_pcie_int_cause_non_ict(trans); inta = iwl_pcie_int_cause_non_ict(trans);
if (iwl_have_debug_level(IWL_DL_ISR)) {
IWL_DEBUG_ISR(trans,
"ISR inta 0x%08x, enabled 0x%08x(sw), enabled(hw) 0x%08x, fh 0x%08x\n",
inta, trans_pcie->inta_mask,
iwl_read32(trans, CSR_INT_MASK),
iwl_read32(trans, CSR_FH_INT_STATUS));
if (inta & (~trans_pcie->inta_mask))
IWL_DEBUG_ISR(trans,
"We got a masked interrupt (0x%08x)\n",
inta & (~trans_pcie->inta_mask));
}
inta &= trans_pcie->inta_mask;
/*
* Ignore interrupt if there's nothing in NIC to service.
* This may be due to IRQ shared with another device,
* or due to sporadic interrupts thrown from our NIC.
*/
if (unlikely(!inta)) { if (unlikely(!inta)) {
IWL_DEBUG_ISR(trans, "Ignore interrupt, inta == 0\n");
/*
* Re-enable interrupts here since we don't
* have anything to service
*/
if (test_bit(STATUS_INT_ENABLED, &trans->status))
iwl_enable_interrupts(trans);
spin_unlock_irqrestore(&trans_pcie->irq_lock, flags); spin_unlock_irqrestore(&trans_pcie->irq_lock, flags);
lock_map_release(&trans->sync_cmd_lockdep_map); lock_map_release(&trans->sync_cmd_lockdep_map);
return IRQ_NONE; return IRQ_NONE;
} }
if (unlikely(inta == 0xFFFFFFFF)) { if (unlikely(inta == 0xFFFFFFFF || (inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
/*
* Hardware disappeared. It might have
* already raised an interrupt.
*/
IWL_WARN(trans, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
spin_unlock_irqrestore(&trans_pcie->irq_lock, flags); spin_unlock_irqrestore(&trans_pcie->irq_lock, flags);
goto out; goto out;
} }
......
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