Commit 7d9e0b12 authored by Marek Behún's avatar Marek Behún Committed by Stephen Boyd

dt-bindings: clk: fixed-mmio-clock: Convert to YAML

Convert the binding documentatoin for fixed-mmio-clock to YAML.
Signed-off-by: default avatarMarek Behún <kabel@kernel.org>
Link: https://lore.kernel.org/r/20210903152615.31453-1-kabel@kernel.orgReviewed-by: default avatarRob Herring <robh@kernel.org>
Reviewed-by: default avatarStephen Boyd <sboyd@kernel.org>
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent 6880fa6c
Binding for simple memory mapped io fixed-rate clock sources.
The driver reads a clock frequency value from a single 32-bit memory mapped
I/O register and registers it as a fixed rate clock.
It was designed for test systems, like FPGA, not for complete, finished SoCs.
This binding uses the common clock binding[1].
[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
Required properties:
- compatible : shall be "fixed-mmio-clock".
- #clock-cells : from common clock binding; shall be set to 0.
- reg : Address and length of the clock value register set.
Optional properties:
- clock-output-names : From common clock binding.
Example:
sysclock: sysclock@fd020004 {
#clock-cells = <0>;
compatible = "fixed-mmio-clock";
reg = <0xfd020004 0x4>;
};
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/fixed-mmio-clock.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Binding for simple memory mapped IO fixed-rate clock sources
description:
This binding describes a fixed-rate clock for which the frequency can
be read from a single 32-bit memory mapped I/O register.
It was designed for test systems, like FPGA, not for complete,
finished SoCs.
maintainers:
- Jan Kotas <jank@cadence.com>
properties:
compatible:
const: fixed-mmio-clock
reg:
maxItems: 1
"#clock-cells":
const: 0
clock-output-names:
maxItems: 1
required:
- compatible
- reg
- "#clock-cells"
additionalProperties: false
examples:
- |
sysclock: sysclock@fd020004 {
compatible = "fixed-mmio-clock";
#clock-cells = <0>;
reg = <0xfd020004 0x4>;
clock-output-names = "sysclk";
};
...
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