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Commit 7f4b9616 authored by Roy Spliet's avatar Roy Spliet Committed by Ben Skeggs
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drm/nouveau/fb/ramnva3: Link training for DDR3 

V2: fix whitespace errors in memx.fuc
Signed-off-by: default avatarRoy Spliet <rspliet@eclipso.eu>
Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent f648cab0
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Showing with 2259 additions and 1415 deletions
drivers/gpu/drm/nouveau/core/include/subdev/pwr.h
View file @ 7f4b9616
......@@ -48,6 +48,8 @@ void nouveau_memx_wait(struct nouveau_memx *,
u32 addr, u32 mask, u32 data, u32 nsec);
void nouveau_memx_nsec(struct nouveau_memx *, u32 nsec);
void nouveau_memx_wait_vblank(struct nouveau_memx *);
void nouveau_memx_train(struct nouveau_memx *);
int nouveau_memx_train_result(struct nouveau_pwr *, u32 *, int);
void nouveau_memx_block(struct nouveau_memx *);
void nouveau_memx_unblock(struct nouveau_memx *);
......
drivers/gpu/drm/nouveau/core/subdev/fb/ramfuc.h
View file @ 7f4b9616
......@@ -140,6 +140,20 @@ ramfuc_wait_vblank(struct ramfuc *ram)
nouveau_memx_wait_vblank(ram->memx);
}
static inline void
ramfuc_train(struct ramfuc *ram)
{
nouveau_memx_train(ram->memx);
}
static inline int
ramfuc_train_result(struct nouveau_fb *pfb, u32 *result, u32 rsize)
{
struct nouveau_pwr *ppwr = nouveau_pwr(pfb);
return nouveau_memx_train_result(ppwr, result, rsize);
}
static inline void
ramfuc_block(struct ramfuc *ram)
{
......@@ -162,6 +176,8 @@ ramfuc_unblock(struct ramfuc *ram)
#define ram_wait(s,r,m,d,n) ramfuc_wait(&(s)->base, (r), (m), (d), (n))
#define ram_nsec(s,n) ramfuc_nsec(&(s)->base, (n))
#define ram_wait_vblank(s) ramfuc_wait_vblank(&(s)->base)
#define ram_train(s) ramfuc_train(&(s)->base)
#define ram_train_result(s,r,l) ramfuc_train_result((s), (r), (l))
#define ram_block(s) ramfuc_block(&(s)->base)
#define ram_unblock(s) ramfuc_unblock(&(s)->base)
......
drivers/gpu/drm/nouveau/core/subdev/fb/ramnva3.c
View file @ 7f4b9616
......@@ -20,17 +20,23 @@
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: Ben Skeggs
* Roy Spliet <rspliet@eclipso.eu>
*/
#include <subdev/bios.h>
#include <subdev/bios/bit.h>
#include <subdev/bios/pll.h>
#include <subdev/bios/rammap.h>
#include <subdev/bios/M0205.h>
#include <subdev/bios/timing.h>
#include <subdev/clock/nva3.h>
#include <subdev/clock/pll.h>
#include <subdev/timer.h>
#include <engine/fifo.h>
#include <core/option.h>
#include "ramfuc.h"
......@@ -39,11 +45,14 @@
struct nva3_ramfuc {
struct ramfuc base;
struct ramfuc_reg r_0x001610;
struct ramfuc_reg r_0x001700;
struct ramfuc_reg r_0x004000;
struct ramfuc_reg r_0x004004;
struct ramfuc_reg r_0x004018;
struct ramfuc_reg r_0x004128;
struct ramfuc_reg r_0x004168;
struct ramfuc_reg r_0x100080;
struct ramfuc_reg r_0x100200;
struct ramfuc_reg r_0x100210;
struct ramfuc_reg r_0x100220[9];
......@@ -56,6 +65,7 @@ struct nva3_ramfuc {
struct ramfuc_reg r_0x100714;
struct ramfuc_reg r_0x100718;
struct ramfuc_reg r_0x10071c;
struct ramfuc_reg r_0x100720;
struct ramfuc_reg r_0x100760;
struct ramfuc_reg r_0x1007a0;
struct ramfuc_reg r_0x1007e0;
......@@ -63,15 +73,276 @@ struct nva3_ramfuc {
struct ramfuc_reg r_0x1110e0;
struct ramfuc_reg r_0x111100;
struct ramfuc_reg r_0x111104;
struct ramfuc_reg r_0x1111e0;
struct ramfuc_reg r_0x111400;
struct ramfuc_reg r_0x611200;
struct ramfuc_reg r_mr[4];
};
struct nva3_ltrain {
enum {
NVA3_TRAIN_UNKNOWN,
NVA3_TRAIN_UNSUPPORTED,
NVA3_TRAIN_ONCE,
NVA3_TRAIN_EXEC,
NVA3_TRAIN_DONE
} state;
u32 r_100720;
u32 r_1111e0;
u32 r_111400;
struct nouveau_mem *mem;
};
struct nva3_ram {
struct nouveau_ram base;
struct nva3_ramfuc fuc;
struct nva3_ltrain ltrain;
};
void
nva3_link_train_calc(u32 *vals, struct nva3_ltrain *train)
{
int i, lo, hi;
u8 median[8], bins[4] = {0, 0, 0, 0}, bin = 0, qty = 0;
for (i = 0; i < 8; i++) {
for (lo = 0; lo < 0x40; lo++) {
if (!(vals[lo] & 0x80000000))
continue;
if (vals[lo] & (0x101 << i))
break;
}
if (lo == 0x40)
return;
for (hi = lo + 1; hi < 0x40; hi++) {
if (!(vals[lo] & 0x80000000))
continue;
if (!(vals[hi] & (0x101 << i))) {
hi--;
break;
}
}
median[i] = ((hi - lo) >> 1) + lo;
bins[(median[i] & 0xf0) >> 4]++;
median[i] += 0x30;
}
/* Find the best value for 0x1111e0 */
for (i = 0; i < 4; i++) {
if (bins[i] > qty) {
bin = i + 3;
qty = bins[i];
}
}
train->r_100720 = 0;
for (i = 0; i < 8; i++) {
median[i] = max(median[i], (u8) (bin << 4));
median[i] = min(median[i], (u8) ((bin << 4) | 0xf));
train->r_100720 |= ((median[i] & 0x0f) << (i << 2));
}
train->r_1111e0 = 0x02000000 | (bin * 0x101);
train->r_111400 = 0x0;
}
/*
* Link training for (at least) DDR3
*/
int
nva3_link_train(struct nouveau_fb *pfb)
{
struct nouveau_bios *bios = nouveau_bios(pfb);
struct nva3_ram *ram = (void *)pfb->ram;
struct nouveau_clock *clk = nouveau_clock(pfb);
struct nva3_ltrain *train = &ram->ltrain;
struct nouveau_device *device = nv_device(pfb);
struct nva3_ramfuc *fuc = &ram->fuc;
u32 *result, r1700;
int ret, i;
struct nvbios_M0205T M0205T = { 0 };
u8 ver, hdr, cnt, len, snr, ssz;
unsigned int clk_current;
unsigned long flags;
unsigned long *f = &flags;
if (nouveau_boolopt(device->cfgopt, "NvMemExec", true) != true)
return -ENOSYS;
/* XXX: Multiple partitions? */
result = kmalloc(64 * sizeof(u32), GFP_KERNEL);
if (!result)
return -ENOMEM;
train->state = NVA3_TRAIN_EXEC;
/* Clock speeds for training and back */
nvbios_M0205Tp(bios, &ver, &hdr, &cnt, &len, &snr, &ssz, &M0205T);
if (M0205T.freq == 0)
return -ENOENT;
clk_current = clk->read(clk, nv_clk_src_mem);
ret = nva3_clock_pre(clk, f);
if (ret)
goto out;
/* First: clock up/down */
ret = ram->base.calc(pfb, (u32) M0205T.freq * 1000);
if (ret)
goto out;
/* Do this *after* calc, eliminates write in script */
nv_wr32(pfb, 0x111400, 0x00000000);
/* XXX: Magic writes that improve train reliability? */
nv_mask(pfb, 0x100674, 0x0000ffff, 0x00000000);
nv_mask(pfb, 0x1005e4, 0x0000ffff, 0x00000000);
nv_mask(pfb, 0x100b0c, 0x000000ff, 0x00000000);
nv_wr32(pfb, 0x100c04, 0x00000400);
/* Now the training script */
r1700 = ram_rd32(fuc, 0x001700);
ram_mask(fuc, 0x100200, 0x00000800, 0x00000000);
ram_wr32(fuc, 0x611200, 0x3300);
ram_wait_vblank(fuc);
ram_wait(fuc, 0x611200, 0x00000003, 0x00000000, 500000);
ram_mask(fuc, 0x001610, 0x00000083, 0x00000003);
ram_mask(fuc, 0x100080, 0x00000020, 0x00000000);
ram_mask(fuc, 0x10f804, 0x80000000, 0x00000000);
ram_wr32(fuc, 0x001700, 0x00000000);
ram_train(fuc);
/* Reset */
ram_mask(fuc, 0x10f804, 0x80000000, 0x80000000);
ram_wr32(fuc, 0x10053c, 0x0);
ram_wr32(fuc, 0x100720, train->r_100720);
ram_wr32(fuc, 0x1111e0, train->r_1111e0);
ram_wr32(fuc, 0x111400, train->r_111400);
ram_nuke(fuc, 0x100080);
ram_mask(fuc, 0x100080, 0x00000020, 0x00000020);
ram_nsec(fuc, 1000);
ram_wr32(fuc, 0x001700, r1700);
ram_mask(fuc, 0x001610, 0x00000083, 0x00000080);
ram_wr32(fuc, 0x611200, 0x3330);
ram_mask(fuc, 0x100200, 0x00000800, 0x00000800);
ram_exec(fuc, true);
ram->base.calc(pfb, clk_current);
ram_exec(fuc, true);
/* Post-processing, avoids flicker */
nv_mask(pfb, 0x616308, 0x10, 0x10);
nv_mask(pfb, 0x616b08, 0x10, 0x10);
nva3_clock_post(clk, f);
ram_train_result(pfb, result, 64);
for (i = 0; i < 64; i++)
nv_debug(pfb, "Train: %08x", result[i]);
nva3_link_train_calc(result, train);
nv_debug(pfb, "Train: %08x %08x %08x", train->r_100720,
train->r_1111e0, train->r_111400);
kfree(result);
train->state = NVA3_TRAIN_DONE;
return ret;
out:
if(ret == -EBUSY)
f = NULL;
train->state = NVA3_TRAIN_UNSUPPORTED;
nva3_clock_post(clk, f);
return ret;
}
int
nva3_link_train_init(struct nouveau_fb *pfb)
{
static const u32 pattern[16] = {
0xaaaaaaaa, 0xcccccccc, 0xdddddddd, 0xeeeeeeee,
0x00000000, 0x11111111, 0x44444444, 0xdddddddd,
0x33333333, 0x55555555, 0x77777777, 0x66666666,
0x99999999, 0x88888888, 0xeeeeeeee, 0xbbbbbbbb,
};
struct nouveau_bios *bios = nouveau_bios(pfb);
struct nva3_ram *ram = (void *)pfb->ram;
struct nva3_ltrain *train = &ram->ltrain;
struct nouveau_mem *mem;
struct nvbios_M0205E M0205E;
u8 ver, hdr, cnt, len;
u32 r001700;
int ret, i = 0;
train->state = NVA3_TRAIN_UNSUPPORTED;
/* We support type "5"
* XXX: training pattern table appears to be unused for this routine */
if (!nvbios_M0205Ep(bios, i, &ver, &hdr, &cnt, &len, &M0205E))
return -ENOENT;
if (M0205E.type != 5)
return 0;
train->state = NVA3_TRAIN_ONCE;
ret = pfb->ram->get(pfb, 0x8000, 0x10000, 0, 0x800, &ram->ltrain.mem);
if (ret)
return ret;
mem = ram->ltrain.mem;
nv_wr32(pfb, 0x100538, 0x10000000 | (mem->offset >> 16));
nv_wr32(pfb, 0x1005a8, 0x0000ffff);
nv_mask(pfb, 0x10f800, 0x00000001, 0x00000001);
for (i = 0; i < 0x30; i++) {
nv_wr32(pfb, 0x10f8c0, (i << 8) | i);
nv_wr32(pfb, 0x10f900, pattern[i % 16]);
}
for (i = 0; i < 0x30; i++) {
nv_wr32(pfb, 0x10f8e0, (i << 8) | i);
nv_wr32(pfb, 0x10f920, pattern[i % 16]);
}
/* And upload the pattern */
r001700 = nv_rd32(pfb, 0x1700);
nv_wr32(pfb, 0x1700, mem->offset >> 16);
for (i = 0; i < 16; i++)
nv_wr32(pfb, 0x700000 + (i << 2), pattern[i]);
for (i = 0; i < 16; i++)
nv_wr32(pfb, 0x700100 + (i << 2), pattern[i]);
nv_wr32(pfb, 0x1700, r001700);
train->r_100720 = nv_rd32(pfb, 0x100720);
train->r_1111e0 = nv_rd32(pfb, 0x1111e0);
train->r_111400 = nv_rd32(pfb, 0x111400);
return 0;
}
void
nva3_link_train_fini(struct nouveau_fb *pfb)
{
struct nva3_ram *ram = (void *)pfb->ram;
if (ram->ltrain.mem)
pfb->ram->put(pfb, &ram->ltrain.mem);
}
static int
nva3_ram_calc(struct nouveau_fb *pfb, u32 freq)
{
......@@ -90,6 +361,9 @@ nva3_ram_calc(struct nouveau_fb *pfb, u32 freq)
next->freq = freq;
ram->base.next = next;
if (ram->ltrain.state == NVA3_TRAIN_ONCE)
nva3_link_train(pfb);
/* lookup memory config data relevant to the target frequency */
i = 0;
while ((data = nvbios_rammapEp(bios, i++, &ver, &hdr, &cnt, &len,
......@@ -330,38 +604,24 @@ nva3_ram_init(struct nouveau_object *object)
{
struct nouveau_fb *pfb = (void *)object->parent;
struct nva3_ram *ram = (void *)object;
int ret, i;
int ret;
ret = nouveau_ram_init(&ram->base);
if (ret)
return ret;
/* prepare for ddr link training, and load training patterns */
switch (ram->base.type) {
case NV_MEM_TYPE_DDR3: {
if (nv_device(pfb)->chipset == 0xa8) {
static const u32 pattern[16] = {
0xaaaaaaaa, 0xcccccccc, 0xdddddddd, 0xeeeeeeee,
0x00000000, 0x11111111, 0x44444444, 0xdddddddd,
0x33333333, 0x55555555, 0x77777777, 0x66666666,
0x99999999, 0x88888888, 0xeeeeeeee, 0xbbbbbbbb,
};
nva3_link_train_init(pfb);
nv_wr32(pfb, 0x100538, 0x10001ff6); /*XXX*/
nv_wr32(pfb, 0x1005a8, 0x0000ffff);
nv_mask(pfb, 0x10f800, 0x00000001, 0x00000001);
for (i = 0; i < 0x30; i++) {
nv_wr32(pfb, 0x10f8c0, (i << 8) | i);
nv_wr32(pfb, 0x10f8e0, (i << 8) | i);
nv_wr32(pfb, 0x10f900, pattern[i % 16]);
nv_wr32(pfb, 0x10f920, pattern[i % 16]);
}
}
}
break;
default:
break;
}
return 0;
}
static int
nva3_ram_fini(struct nouveau_object *object, bool suspend)
{
struct nouveau_fb *pfb = (void *)object->parent;
if (!suspend)
nva3_link_train_fini(pfb);
return 0;
}
......@@ -390,11 +650,14 @@ nva3_ram_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
return 0;
}
ram->fuc.r_0x001610 = ramfuc_reg(0x001610);
ram->fuc.r_0x001700 = ramfuc_reg(0x001700);
ram->fuc.r_0x004000 = ramfuc_reg(0x004000);
ram->fuc.r_0x004004 = ramfuc_reg(0x004004);
ram->fuc.r_0x004018 = ramfuc_reg(0x004018);
ram->fuc.r_0x004128 = ramfuc_reg(0x004128);
ram->fuc.r_0x004168 = ramfuc_reg(0x004168);
ram->fuc.r_0x100080 = ramfuc_reg(0x100080);
ram->fuc.r_0x100200 = ramfuc_reg(0x100200);
ram->fuc.r_0x100210 = ramfuc_reg(0x100210);
for (i = 0; i < 9; i++)
......@@ -408,6 +671,7 @@ nva3_ram_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
ram->fuc.r_0x100714 = ramfuc_reg(0x100714);
ram->fuc.r_0x100718 = ramfuc_reg(0x100718);
ram->fuc.r_0x10071c = ramfuc_reg(0x10071c);
ram->fuc.r_0x100720 = ramfuc_reg(0x100720);
ram->fuc.r_0x100760 = ramfuc_stride(0x100760, 4, ram->base.part_mask);
ram->fuc.r_0x1007a0 = ramfuc_stride(0x1007a0, 4, ram->base.part_mask);
ram->fuc.r_0x1007e0 = ramfuc_stride(0x1007e0, 4, ram->base.part_mask);
......@@ -415,6 +679,8 @@ nva3_ram_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
ram->fuc.r_0x1110e0 = ramfuc_stride(0x1110e0, 4, ram->base.part_mask);
ram->fuc.r_0x111100 = ramfuc_reg(0x111100);
ram->fuc.r_0x111104 = ramfuc_reg(0x111104);
ram->fuc.r_0x1111e0 = ramfuc_reg(0x1111e0);
ram->fuc.r_0x111400 = ramfuc_reg(0x111400);
ram->fuc.r_0x611200 = ramfuc_reg(0x611200);
if (ram->base.ranks > 1) {
......@@ -438,6 +704,6 @@ nva3_ram_oclass = {
.ctor = nva3_ram_ctor,
.dtor = _nouveau_ram_dtor,
.init = nva3_ram_init,
.fini = _nouveau_ram_fini,
.fini = nva3_ram_fini,
},
};
drivers/gpu/drm/nouveau/core/subdev/pwr/fuc/memx.fuc
View file @ 7f4b9616
......@@ -50,6 +50,7 @@ handler(WR32 , 0x0000, 0x0002, #memx_func_wr32)
handler(WAIT , 0x0004, 0x0000, #memx_func_wait)
handler(DELAY , 0x0001, 0x0000, #memx_func_delay)
handler(VBLANK, 0x0001, 0x0000, #memx_func_wait_vblank)
handler(TRAIN , 0x0000, 0x0000, #memx_func_train)
memx_func_tail:
.equ #memx_func_size #memx_func_next - #memx_func_head
......@@ -63,6 +64,10 @@ memx_ts_end:
memx_data_head:
.skip 0x0800
memx_data_tail:
memx_train_head:
.skip 0x0100
memx_train_tail:
#endif
/******************************************************************************
......@@ -257,6 +262,101 @@ memx_func_delay:
call(nsec)
ret
// description
//
// $r15 - current (memx)
// $r4 - packet length
// $r3 - opcode desciption
// $r0 - zero
memx_func_train:
#if NVKM_PPWR_CHIPSET == GT215
// $r5 - outer loop counter
// $r6 - inner loop counter
// $r7 - entry counter (#memx_train_head + $r7)
movw $r5 0x3
movw $r7 0x0
// Read random memory to wake up... things
imm32($r9, 0x700000)
nv_rd32($r8,$r9)
movw $r14 0x2710
call(nsec)
memx_func_train_loop_outer:
mulu $r8 $r5 0x101
sethi $r8 0x02000000
imm32($r9, 0x1111e0)
nv_wr32($r9, $r8)
push $r5
movw $r6 0x0
memx_func_train_loop_inner:
movw $r8 0x1111
mulu $r9 $r6 $r8
shl b32 $r8 $r9 0x10
or $r8 $r9
imm32($r9, 0x100720)
nv_wr32($r9, $r8)
imm32($r9, 0x100080)
nv_rd32($r8, $r9)
or $r8 $r8 0x20
nv_wr32($r9, $r8)
imm32($r9, 0x10053c)
imm32($r8, 0x80003002)
nv_wr32($r9, $r8)
imm32($r14, 0x100560)
imm32($r13, 0x80000000)
add b32 $r12 $r13 0
imm32($r11, 0x001e8480)
call(wait)
// $r5 - inner inner loop counter
// $r9 - result
movw $r5 0
imm32($r9, 0x8300ffff)
memx_func_train_loop_4x:
imm32($r10, 0x100080)
nv_rd32($r8, $r10)
imm32($r11, 0xffffffdf)
and $r8 $r11
nv_wr32($r10, $r8)
imm32($r10, 0x10053c)
imm32($r8, 0x80003002)
nv_wr32($r10, $r8)
imm32($r14, 0x100560)
imm32($r13, 0x80000000)
mov b32 $r12 $r13
imm32($r11, 0x00002710)
call(wait)
nv_rd32($r13, $r14)
and $r9 $r9 $r13
add b32 $r5 1
cmp b16 $r5 0x4
bra l #memx_func_train_loop_4x
add b32 $r10 $r7 #memx_train_head
st b32 D[$r10 + 0] $r9
add b32 $r6 1
add b32 $r7 4
cmp b16 $r6 0x10
bra l #memx_func_train_loop_inner
pop $r5
add b32 $r5 1
cmp b16 $r5 7
bra l #memx_func_train_loop_outer
#endif
ret
// description
//
// $r15 - current (memx)
......@@ -307,8 +407,19 @@ memx_exec:
// $r11 - data1
// $r0 - zero
memx_info:
cmp b16 $r12 0x1
bra e #memx_info_train
memx_info_data:
mov $r12 #memx_data_head
mov $r11 #memx_data_tail - #memx_data_head
bra #memx_info_send
memx_info_train:
mov $r12 #memx_train_head
mov $r11 #memx_train_tail - #memx_train_head
memx_info_send:
call(send)
ret
......
drivers/gpu/drm/nouveau/core/subdev/pwr/fuc/nv108.fuc.h
View file @ 7f4b9616
......@@ -46,8 +46,8 @@ uint32_t nv108_pwr_data[] = {
0x00000000,
0x00000000,
0x584d454d,
0x0000061c,
0x0000060e,
0x0000062d,
0x0000061f,
0x00000000,
0x00000000,
0x00000000,
......@@ -68,8 +68,8 @@ uint32_t nv108_pwr_data[] = {
0x00000000,
0x00000000,
0x46524550,
0x00000620,
0x0000061e,
0x00000631,
0x0000062f,
0x00000000,
0x00000000,
0x00000000,
......@@ -90,8 +90,8 @@ uint32_t nv108_pwr_data[] = {
0x00000000,
0x00000000,
0x5f433249,
0x00000a24,
0x000008cb,
0x00000a35,
0x000008dc,
0x00000000,
0x00000000,
0x00000000,
......@@ -112,8 +112,8 @@ uint32_t nv108_pwr_data[] = {
0x00000000,
0x00000000,
0x54534554,
0x00000a45,
0x00000a26,
0x00000a56,
0x00000a37,
0x00000000,
0x00000000,
0x00000000,
......@@ -134,8 +134,8 @@ uint32_t nv108_pwr_data[] = {
0x00000000,
0x00000000,
0x454c4449,
0x00000a50,
0x00000a4e,
0x00000a61,
0x00000a5f,
0x00000000,
0x00000000,
0x00000000,
......@@ -246,13 +246,15 @@ uint32_t nv108_pwr_data[] = {
0x00010006,
0x00000000,
0x0000057b,
/* 0x03b8: memx_func_tail */
/* 0x03b8: memx_ts_start */
0x00000007,
0x00000000,
/* 0x03bc: memx_ts_end */
0x000005c3,
/* 0x03c4: memx_func_tail */
/* 0x03c4: memx_ts_start */
0x00000000,
/* 0x03c0: memx_data_head */
/* 0x03c8: memx_ts_end */
0x00000000,
/* 0x03cc: memx_data_head */
0x00000000,
0x00000000,
0x00000000,
......@@ -764,8 +766,75 @@ uint32_t nv108_pwr_data[] = {
0x00000000,
0x00000000,
0x00000000,
/* 0x0bc0: memx_data_tail */
/* 0x0bc0: i2c_scl_map */
0x00000000,
/* 0x0bcc: memx_data_tail */
/* 0x0bcc: memx_train_head */
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
/* 0x0ccc: memx_train_tail */
/* 0x0ccc: i2c_scl_map */
0x00000400,
0x00000800,
0x00001000,
......@@ -776,7 +845,7 @@ uint32_t nv108_pwr_data[] = {
0x00020000,
0x00040000,
0x00080000,
/* 0x0be8: i2c_sda_map */
/* 0x0cf4: i2c_sda_map */
0x00100000,
0x00200000,
0x00400000,
......@@ -844,9 +913,6 @@ uint32_t nv108_pwr_data[] = {
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
};
uint32_t nv108_pwr_code[] = {
......@@ -1215,10 +1281,10 @@ uint32_t nv108_pwr_code[] = {
0xf40464f0,
0x2c06f70b,
0xb50066cf,
0x00f8ee06,
0x00f8f106,
/* 0x0500: memx_func_leave */
0x66cf2c06,
0xef06b500,
0xf206b500,
0xe4400406,
0x0006f607,
/* 0x0512: memx_func_leave_wait */
......@@ -1270,370 +1336,374 @@ uint32_t nv108_pwr_code[] = {
0x9800f800,
0x10b6001e,
0x005d7e04,
/* 0x05c3: memx_exec */
0xf900f800,
0xb2d0f9e0,
/* 0x05cb: memx_exec_next */
0x98b2b2c1,
0x10b60013,
0xf034e704,
0xe033e701,
0x0132b601,
0x980c30f0,
0x55f9de35,
0x1ef412a6,
0xee0b98e5,
0xbbef0c98,
0xc44b02cb,
0x00bbcf07,
0xe0fcd0fc,
0x0002c27e,
/* 0x0602: memx_info */
0xc04c00f8,
/* 0x05c3: memx_func_train */
0xf800f800,
/* 0x05c5: memx_exec */
0xf9e0f900,
0xb2c1b2d0,
/* 0x05cd: memx_exec_next */
0x001398b2,
0xe70410b6,
0xe701f034,
0xb601e033,
0x30f00132,
0xde35980c,
0x12a655f9,
0x98e51ef4,
0x0c98f10b,
0x02cbbbf2,
0xcf07c44b,
0xd0fc00bb,
0xc27ee0fc,
0x00f80002,
/* 0x0604: memx_info */
0xf401c670,
/* 0x060a: memx_info_data */
0xcc4c0c0b,
0x08004b03,
0x0002c27e,
/* 0x060e: memx_recv */
0xd6b000f8,
0xb20bf401,
0xf400d6b0,
0x00f8eb0b,
/* 0x061c: memx_init */
/* 0x061e: perf_recv */
0x00f800f8,
/* 0x0620: perf_init */
/* 0x0622: i2c_drive_scl */
0x36b000f8,
0x0d0bf400,
0xf607e040,
0x04bd0001,
/* 0x0632: i2c_drive_scl_lo */
0xe44000f8,
0x0001f607,
0x00f804bd,
/* 0x063c: i2c_drive_sda */
0xf40036b0,
0xe0400d0b,
0x0002f607,
0x00f804bd,
/* 0x064c: i2c_drive_sda_lo */
0xf607e440,
0x04bd0002,
/* 0x0656: i2c_sense_scl */
0x32f400f8,
0x07c44301,
0xfd0033cf,
0x0bf40431,
0x0131f406,
/* 0x0668: i2c_sense_scl_done */
/* 0x066a: i2c_sense_sda */
0x32f400f8,
0x07c44301,
0xfd0033cf,
0x0bf40432,
0x0131f406,
/* 0x067c: i2c_sense_sda_done */
/* 0x067e: i2c_raise_scl */
0x40f900f8,
0x03089844,
0x06227e01,
/* 0x0689: i2c_raise_scl_wait */
0x03e84e00,
0x00005d7e,
0x0006567e,
0xb60901f4,
0x1bf40142,
/* 0x069d: i2c_raise_scl_done */
0xf840fcef,
/* 0x06a1: i2c_start */
0x06567e00,
0x0d11f400,
0x00066a7e,
0xf40611f4,
/* 0x06b2: i2c_start_rep */
0x00032e0e,
0x0006227e,
0x3c7e0103,
0x76bb0006,
0x0465b600,
0x659450f9,
0x0256bb04,
0x75fd50bd,
0x7e50fc04,
0xb600067e,
0x11f40464,
/* 0x06dd: i2c_start_send */
0x7e00031d,
0x4e00063c,
0x5d7e1388,
0x00030000,
0x0006227e,
0x7e13884e,
/* 0x06f7: i2c_start_out */
0xf800005d,
/* 0x06f9: i2c_stop */
0x7e000300,
0x03000622,
0x063c7e00,
0x03e84e00,
0x00005d7e,
0x227e0103,
0x884e0006,
0x005d7e13,
/* 0x0613: memx_info_train */
0x4c090ef4,
0x004b0bcc,
/* 0x0619: memx_info_send */
0x02c27e01,
/* 0x061f: memx_recv */
0xb000f800,
0x0bf401d6,
0x00d6b0a3,
0xf8dc0bf4,
/* 0x062d: memx_init */
/* 0x062f: perf_recv */
0xf800f800,
/* 0x0631: perf_init */
/* 0x0633: i2c_drive_scl */
0xb000f800,
0x0bf40036,
0x07e0400d,
0xbd0001f6,
/* 0x0643: i2c_drive_scl_lo */
0x4000f804,
0x01f607e4,
0xf804bd00,
/* 0x064d: i2c_drive_sda */
0x0036b000,
0x400d0bf4,
0x02f607e0,
0xf804bd00,
/* 0x065d: i2c_drive_sda_lo */
0x07e44000,
0xbd0002f6,
/* 0x0667: i2c_sense_scl */
0xf400f804,
0xc4430132,
0x0033cf07,
0xf40431fd,
0x31f4060b,
/* 0x0679: i2c_sense_scl_done */
/* 0x067b: i2c_sense_sda */
0xf400f801,
0xc4430132,
0x0033cf07,
0xf40432fd,
0x31f4060b,
/* 0x068d: i2c_sense_sda_done */
/* 0x068f: i2c_raise_scl */
0xf900f801,
0x08984440,
0x337e0103,
/* 0x069a: i2c_raise_scl_wait */
0xe84e0006,
0x005d7e03,
0x06677e00,
0x0901f400,
0xf40142b6,
/* 0x06ae: i2c_raise_scl_done */
0x40fcef1b,
/* 0x06b2: i2c_start */
0x677e00f8,
0x11f40006,
0x067b7e0d,
0x0611f400,
/* 0x06c3: i2c_start_rep */
0x032e0ef4,
0x06337e00,
0x7e010300,
0x4e00063c,
0x5d7e1388,
0x00f80000,
/* 0x0728: i2c_bitw */
0x00063c7e,
0x7e03e84e,
0xbb00005d,
0xbb00064d,
0x65b60076,
0x9450f904,
0x56bb0465,
0xfd50bd02,
0x50fc0475,
0x00067e7e,
0x00068f7e,
0xf40464b6,
0x884e1711,
0x005d7e13,
0x7e000300,
0x4e000622,
0x5d7e1388,
/* 0x0766: i2c_bitw_out */
0x00f80000,
/* 0x0768: i2c_bitr */
0x3c7e0103,
/* 0x06ee: i2c_start_send */
0x00031d11,
0x00064d7e,
0x7e13884e,
0x0300005d,
0x06337e00,
0x13884e00,
0x00005d7e,
/* 0x0708: i2c_start_out */
/* 0x070a: i2c_stop */
0x000300f8,
0x0006337e,
0x4d7e0003,
0xe84e0006,
0x005d7e03,
0x0076bb00,
0xf90465b6,
0x04659450,
0xbd0256bb,
0x0475fd50,
0x7e7e50fc,
0x64b60006,
0x1a11f404,
0x00066a7e,
0x227e0003,
0x884e0006,
0x005d7e13,
0x013cf000,
/* 0x07ab: i2c_bitr_done */
0xf80131f4,
/* 0x07ad: i2c_get_byte */
0x04000500,
/* 0x07b1: i2c_get_byte_next */
0x0154b608,
0x7e010300,
0x4e000633,
0x5d7e1388,
0x01030000,
0x00064d7e,
0x7e13884e,
0xf800005d,
/* 0x0739: i2c_bitw */
0x064d7e00,
0x03e84e00,
0x00005d7e,
0xb60076bb,
0x50f90465,
0xbb046594,
0x50bd0256,
0xfc0475fd,
0x07687e50,
0x068f7e50,
0x0464b600,
0xfd2a11f4,
0x42b60553,
0xd81bf401,
0x76bb0103,
0x4e1711f4,
0x5d7e1388,
0x00030000,
0x0006337e,
0x7e13884e,
/* 0x0777: i2c_bitw_out */
0xf800005d,
/* 0x0779: i2c_bitr */
0x7e010300,
0x4e00064d,
0x5d7e03e8,
0x76bb0000,
0x0465b600,
0x659450f9,
0x0256bb04,
0x75fd50bd,
0x7e50fc04,
0xb6000728,
/* 0x07fa: i2c_get_byte_done */
0x00f80464,
/* 0x07fc: i2c_put_byte */
/* 0x07fe: i2c_put_byte_next */
0x42b60804,
0x3854ff01,
0xb60076bb,
0x50f90465,
0xbb046594,
0x50bd0256,
0xfc0475fd,
0x07287e50,
0x0464b600,
0xb03411f4,
0x1bf40046,
0x0076bbd8,
0xb600068f,
0x11f40464,
0x067b7e1a,
0x7e000300,
0x4e000633,
0x5d7e1388,
0x3cf00000,
0x0131f401,
/* 0x07bc: i2c_bitr_done */
/* 0x07be: i2c_get_byte */
0x000500f8,
/* 0x07c2: i2c_get_byte_next */
0x54b60804,
0x0076bb01,
0xf90465b6,
0x04659450,
0xbd0256bb,
0x0475fd50,
0x797e50fc,
0x64b60007,
0x2a11f404,
0xb60553fd,
0x1bf40142,
0xbb0103d8,
0x65b60076,
0x9450f904,
0x56bb0465,
0xfd50bd02,
0x50fc0475,
0x0007397e,
/* 0x080b: i2c_get_byte_done */
0xf80464b6,
/* 0x080d: i2c_put_byte */
/* 0x080f: i2c_put_byte_next */
0xb6080400,
0x54ff0142,
0x0076bb38,
0xf90465b6,
0x04659450,
0xbd0256bb,
0x0475fd50,
0x687e50fc,
0x397e50fc,
0x64b60007,
0x0f11f404,
0xb00076bb,
0x1bf40136,
0x0132f406,
/* 0x0854: i2c_put_byte_done */
/* 0x0856: i2c_addr */
0x76bb00f8,
0x3411f404,
0xf40046b0,
0x76bbd81b,
0x0465b600,
0x659450f9,
0x0256bb04,
0x75fd50bd,
0x7e50fc04,
0xb60006a1,
0xb6000779,
0x11f40464,
0x2ec3e729,
0x0134b601,
0xbb0553fd,
0x0076bb0f,
0xf40136b0,
0x32f4061b,
/* 0x0865: i2c_put_byte_done */
/* 0x0867: i2c_addr */
0xbb00f801,
0x65b60076,
0x9450f904,
0x56bb0465,
0xfd50bd02,
0x50fc0475,
0x0007fc7e,
/* 0x089b: i2c_addr_done */
0xf80464b6,
/* 0x089d: i2c_acquire_addr */
0xf8cec700,
0xb705e4b6,
0xf8d014e0,
/* 0x08a9: i2c_acquire */
0x089d7e00,
0x00047e00,
0x03d9f000,
0x00002e7e,
/* 0x08ba: i2c_release */
0x9d7e00f8,
0x0006b27e,
0xf40464b6,
0xc3e72911,
0x34b6012e,
0x0553fd01,
0xb60076bb,
0x50f90465,
0xbb046594,
0x50bd0256,
0xfc0475fd,
0x080d7e50,
0x0464b600,
/* 0x08ac: i2c_addr_done */
/* 0x08ae: i2c_acquire_addr */
0xcec700f8,
0x05e4b6f8,
0xd014e0b7,
/* 0x08ba: i2c_acquire */
0xae7e00f8,
0x047e0008,
0xdaf00000,
0xd9f00000,
0x002e7e03,
/* 0x08cb: i2c_recv */
0xf400f800,
0xc1c70132,
0x0214b6f8,
0xf52816b0,
0xb801371f,
0x000be813,
0xb8003298,
0x000bc013,
0xf4003198,
0xd0f90231,
0xd0f9e0f9,
0x000067f1,
0x100063f1,
0xbb016792,
/* 0x08cb: i2c_release */
0x7e00f800,
0x7e0008ae,
0xf0000004,
0x2e7e03da,
0x00f80000,
/* 0x08dc: i2c_recv */
0xc70132f4,
0x14b6f8c1,
0x2816b002,
0x01371ff5,
0x0cf413b8,
0x00329800,
0x0ccc13b8,
0x00319800,
0xf90231f4,
0xf9e0f9d0,
0x0067f1d0,
0x0063f100,
0x01679210,
0xb60076bb,
0x50f90465,
0xbb046594,
0x50bd0256,
0xfc0475fd,
0x08ba7e50,
0x0464b600,
0xd6b0d0fc,
0xb01bf500,
0xbb000500,
0x65b60076,
0x9450f904,
0x56bb0465,
0xfd50bd02,
0x50fc0475,
0x0008a97e,
0xfc0464b6,
0x00d6b0d0,
0x00b01bf5,
0x76bb0005,
0x0008677e,
0xf50464b6,
0xc700cc11,
0x76bbe0c5,
0x0465b600,
0x659450f9,
0x0256bb04,
0x75fd50bd,
0x7e50fc04,
0xb6000856,
0xb600080d,
0x11f50464,
0xc5c700cc,
0x0076bbe0,
0xf90465b6,
0x04659450,
0xbd0256bb,
0x0475fd50,
0xfc7e50fc,
0x64b60007,
0xa911f504,
0xbb010500,
0x65b60076,
0x9450f904,
0x56bb0465,
0xfd50bd02,
0x50fc0475,
0x0008567e,
0xf50464b6,
0xbb008711,
0x65b60076,
0x9450f904,
0x56bb0465,
0xfd50bd02,
0x50fc0475,
0x0007ad7e,
0xf40464b6,
0x5bcb6711,
0x0076bbe0,
0xf90465b6,
0x04659450,
0xbd0256bb,
0x0475fd50,
0xf97e50fc,
0x64b60006,
0xbd5bb204,
0x410ef474,
/* 0x09d0: i2c_recv_not_rd08 */
0xf401d6b0,
0x00053b1b,
0x0008567e,
0xc73211f4,
0xfc7ee0c5,
0x11f40007,
0x7e000528,
0xf4000856,
0xb5c71f11,
0x07fc7ee0,
0x1511f400,
0x0006f97e,
0xc5c774bd,
0x091bf408,
0xf40232f4,
/* 0x0a0e: i2c_recv_not_wr08 */
/* 0x0a0e: i2c_recv_done */
0xcec7030e,
0x08ba7ef8,
0xfce0fc00,
0x0912f4d0,
0xc27e7cb2,
/* 0x0a22: i2c_recv_exit */
0x00f80002,
/* 0x0a24: i2c_init */
/* 0x0a26: test_recv */
0x584100f8,
0x0011cf04,
0x400110b6,
0x01f60458,
0xf104bd00,
0xf1d900e7,
0x7e134fe3,
0xf8000201,
/* 0x0a45: test_init */
0x08004e00,
0x0002017e,
/* 0x0a4e: idle_recv */
0x00f800f8,
/* 0x0a50: idle */
0x410031f4,
0x11cf0454,
0x010500a9,
0xb60076bb,
0x50f90465,
0xbb046594,
0x50bd0256,
0xfc0475fd,
0x08677e50,
0x0464b600,
0x008711f5,
0xb60076bb,
0x50f90465,
0xbb046594,
0x50bd0256,
0xfc0475fd,
0x07be7e50,
0x0464b600,
0xcb6711f4,
0x76bbe05b,
0x0465b600,
0x659450f9,
0x0256bb04,
0x75fd50bd,
0x7e50fc04,
0xb600070a,
0x5bb20464,
0x0ef474bd,
/* 0x09e1: i2c_recv_not_rd08 */
0x01d6b041,
0x053b1bf4,
0x08677e00,
0x3211f400,
0x7ee0c5c7,
0xf400080d,
0x00052811,
0x0008677e,
0xc71f11f4,
0x0d7ee0b5,
0x11f40008,
0x070a7e15,
0xc774bd00,
0x1bf408c5,
0x0232f409,
/* 0x0a1f: i2c_recv_not_wr08 */
/* 0x0a1f: i2c_recv_done */
0xc7030ef4,
0xcb7ef8ce,
0xe0fc0008,
0x12f4d0fc,
0x7e7cb209,
/* 0x0a33: i2c_recv_exit */
0xf80002c2,
/* 0x0a35: i2c_init */
/* 0x0a37: test_recv */
0x4100f800,
0x11cf0458,
0x0110b600,
0xf6045440,
0xf6045840,
0x04bd0001,
/* 0x0a64: idle_loop */
0x32f45801,
/* 0x0a69: idle_proc */
/* 0x0a69: idle_proc_exec */
0xb210f902,
0x02cb7e1e,
0xf410fc00,
0x31f40911,
0xf00ef402,
/* 0x0a7c: idle_proc_next */
0xa65810b6,
0xe81bf41f,
0xf4e002f4,
0x0ef40028,
0x000000c6,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0xd900e7f1,
0x134fe3f1,
0x0002017e,
/* 0x0a56: test_init */
0x004e00f8,
0x02017e08,
/* 0x0a5f: idle_recv */
0xf800f800,
/* 0x0a61: idle */
0x0031f400,
0xcf045441,
0x10b60011,
0x04544001,
0xbd0001f6,
/* 0x0a75: idle_loop */
0xf4580104,
/* 0x0a7a: idle_proc */
/* 0x0a7a: idle_proc_exec */
0x10f90232,
0xcb7e1eb2,
0x10fc0002,
0xf40911f4,
0x0ef40231,
/* 0x0a8d: idle_proc_next */
0x5810b6f0,
0x1bf41fa6,
0xe002f4e8,
0xf40028f4,
0x0000c60e,
0x00000000,
0x00000000,
0x00000000,
......
drivers/gpu/drm/nouveau/core/subdev/pwr/fuc/nva3.fuc.h
View file @ 7f4b9616
......@@ -46,8 +46,8 @@ uint32_t nva3_pwr_data[] = {
0x00000000,
0x00000000,
0x584d454d,
0x000006e0,
0x000006d2,
0x00000842,
0x00000834,
0x00000000,
0x00000000,
0x00000000,
......@@ -68,8 +68,8 @@ uint32_t nva3_pwr_data[] = {
0x00000000,
0x00000000,
0x46524550,
0x000006e4,
0x000006e2,
0x00000846,
0x00000844,
0x00000000,
0x00000000,
0x00000000,
......@@ -90,8 +90,8 @@ uint32_t nva3_pwr_data[] = {
0x00000000,
0x00000000,
0x5f433249,
0x00000b14,
0x000009b7,
0x00000c76,
0x00000b19,
0x00000000,
0x00000000,
0x00000000,
......@@ -112,8 +112,8 @@ uint32_t nva3_pwr_data[] = {
0x00000000,
0x00000000,
0x54534554,
0x00000b3d,
0x00000b16,
0x00000c9f,
0x00000c78,
0x00000000,
0x00000000,
0x00000000,
......@@ -134,8 +134,8 @@ uint32_t nva3_pwr_data[] = {
0x00000000,
0x00000000,
0x454c4449,
0x00000b49,
0x00000b47,
0x00000cab,
0x00000ca9,
0x00000000,
0x00000000,
0x00000000,
......@@ -246,13 +246,15 @@ uint32_t nva3_pwr_data[] = {
0x00010006,
0x00000000,
0x000005f8,
/* 0x03b8: memx_func_tail */
/* 0x03b8: memx_ts_start */
0x00000007,
0x00000000,
/* 0x03bc: memx_ts_end */
0x0000067e,
/* 0x03c4: memx_func_tail */
/* 0x03c4: memx_ts_start */
0x00000000,
/* 0x03c0: memx_data_head */
/* 0x03c8: memx_ts_end */
0x00000000,
/* 0x03cc: memx_data_head */
0x00000000,
0x00000000,
0x00000000,
......@@ -764,8 +766,75 @@ uint32_t nva3_pwr_data[] = {
0x00000000,
0x00000000,
0x00000000,
/* 0x0bc0: memx_data_tail */
/* 0x0bc0: i2c_scl_map */
0x00000000,
/* 0x0bcc: memx_data_tail */
/* 0x0bcc: memx_train_head */
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
/* 0x0ccc: memx_train_tail */
/* 0x0ccc: i2c_scl_map */
0x00001000,
0x00004000,
0x00010000,
......@@ -776,7 +845,7 @@ uint32_t nva3_pwr_data[] = {
0x01000000,
0x04000000,
0x10000000,
/* 0x0be8: i2c_sda_map */
/* 0x0cf4: i2c_sda_map */
0x00002000,
0x00008000,
0x00020000,
......@@ -787,7 +856,7 @@ uint32_t nva3_pwr_data[] = {
0x02000000,
0x08000000,
0x20000000,
/* 0x0c10: i2c_ctrl */
/* 0x0d1c: i2c_ctrl */
0x0000e138,
0x0000e150,
0x0000e168,
......@@ -845,9 +914,6 @@ uint32_t nva3_pwr_data[] = {
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
};
uint32_t nva3_pwr_code[] = {
......@@ -1258,11 +1324,11 @@ uint32_t nva3_pwr_code[] = {
0x67f0f30b,
0x0664b62c,
0x800066cf,
0x00f8ee06,
0x00f8f106,
/* 0x05a8: memx_func_leave */
0xb62c67f0,
0x66cf0664,
0xef068000,
0xf2068000,
0xf10467f0,
0xb607e407,
0x06d00604,
......@@ -1323,408 +1389,479 @@ uint32_t nva3_pwr_code[] = {
0x9800f8a4,
0x10b6001e,
0x7f21f404,
/* 0x067e: memx_exec */
0xe0f900f8,
0xc1b9d0f9,
0x02b2b902,
/* 0x0688: memx_exec_next */
0xb6001398,
0x34e70410,
0x33e701f0,
0x32b601e0,
0x0c30f001,
0xf9de3598,
0x0612b855,
0x98e41ef4,
0x0c98ee0b,
0x02cbbbef,
0x07c4b7f1,
0xcf06b4b6,
0xd0fc00bb,
0x21f5e0fc,
/* 0x067e: memx_func_train */
0x57f100f8,
0x77f10003,
0x97f10000,
0x93f00000,
0x029eb970,
0xb90421f4,
0xe7f102d8,
0x21f42710,
/* 0x069d: memx_func_train_loop_outer */
0x0158e07f,
0x0083f101,
0xe097f102,
0x1193f011,
0x80f990f9,
0xe0fcd0fc,
0xf93f21f4,
0x0067f150,
/* 0x06bd: memx_func_train_loop_inner */
0x1187f100,
0x9068ff11,
0xfd109894,
0x97f10589,
0x93f00720,
0xf990f910,
0xfcd0fc80,
0x3f21f4e0,
0x008097f1,
0xb91093f0,
0x21f4029e,
0x02d8b904,
0xf92088c5,
0xfc80f990,
0xf4e0fcd0,
0x97f13f21,
0x93f0053c,
0x0287f110,
0x0083f130,
0xf990f980,
0xfcd0fc80,
0x3f21f4e0,
0x0560e7f1,
0xf110e3f0,
0xf10000d7,
0x908000d3,
0xb7f100dc,
0xb3f08480,
0xa421f41e,
0x000057f1,
0xffff97f1,
0x830093f1,
/* 0x073c: memx_func_train_loop_4x */
0x0080a7f1,
0xb910a3f0,
0x21f402ae,
0x02d8b904,
0xffdfb7f1,
0xffffb3f1,
0xf9048bfd,
0xfc80f9a0,
0xf4e0fcd0,
0xa7f13f21,
0xa3f0053c,
0x0287f110,
0x0083f130,
0xf9a0f980,
0xfcd0fc80,
0x3f21f4e0,
0x0560e7f1,
0xf110e3f0,
0xf10000d7,
0xb98000d3,
0xb7f102dc,
0xb3f02710,
0xa421f400,
0xf402eeb9,
0xddb90421,
0x949dff02,
0x700150b6,
0x1ef40456,
0xcc7aa092,
0x00a9800b,
0xb60160b6,
0x66700470,
0x001ef510,
0xb650fcff,
0x56700150,
0xd41ef507,
/* 0x07cf: memx_exec */
0xf900f8fe,
0xb9d0f9e0,
0xb2b902c1,
/* 0x07d9: memx_exec_next */
0x00139802,
0xe70410b6,
0xe701f034,
0xb601e033,
0x30f00132,
0xde35980c,
0x12b855f9,
0xe41ef406,
0x98f10b98,
0xcbbbf20c,
0xc4b7f102,
0x06b4b607,
0xfc00bbcf,
0xf5e0fcd0,
0xf8034221,
/* 0x0815: memx_info */
0x01c67000,
/* 0x081b: memx_info_data */
0xf10e0bf4,
0xf103ccc7,
0xf40800b7,
/* 0x0826: memx_info_train */
0xc7f10b0e,
0xb7f10bcc,
/* 0x082e: memx_info_send */
0x21f50100,
0x00f80342,
/* 0x06c4: memx_info */
0x03c0c7f1,
0x0800b7f1,
0x034221f5,
/* 0x06d2: memx_recv */
0xd6b000f8,
0xa90bf401,
0xf400d6b0,
0x00f8e90b,
/* 0x06e0: memx_init */
/* 0x06e2: perf_recv */
/* 0x0834: memx_recv */
0xf401d6b0,
0xd6b0980b,
0xd80bf400,
/* 0x0842: memx_init */
0x00f800f8,
/* 0x0844: perf_recv */
/* 0x0846: perf_init */
0x00f800f8,
/* 0x06e4: perf_init */
/* 0x06e6: i2c_drive_scl */
/* 0x0848: i2c_drive_scl */
0xf40036b0,
0x07f1110b,
0x04b607e0,
0x0001d006,
0x00f804bd,
/* 0x085c: i2c_drive_scl_lo */
0x07e407f1,
0xd00604b6,
0x04bd0001,
/* 0x086a: i2c_drive_sda */
0x36b000f8,
0x110bf400,
0x07e007f1,
0xd00604b6,
0x04bd0001,
/* 0x06fa: i2c_drive_scl_lo */
0x04bd0002,
/* 0x087e: i2c_drive_sda_lo */
0x07f100f8,
0x04b607e4,
0x0001d006,
0x00f804bd,
/* 0x0708: i2c_drive_sda */
0xf40036b0,
0x07f1110b,
0x04b607e0,
0x0002d006,
0x00f804bd,
/* 0x071c: i2c_drive_sda_lo */
0x07e407f1,
0xd00604b6,
0x04bd0002,
/* 0x072a: i2c_sense_scl */
0x32f400f8,
0xc437f101,
0x0634b607,
0xfd0033cf,
0x0bf40431,
0x0131f406,
/* 0x0740: i2c_sense_scl_done */
/* 0x0742: i2c_sense_sda */
0x32f400f8,
0xc437f101,
0x0634b607,
0xfd0033cf,
0x0bf40432,
0x0131f406,
/* 0x0758: i2c_sense_sda_done */
/* 0x075a: i2c_raise_scl */
0x40f900f8,
0x089847f1,
0xf50137f0,
/* 0x0767: i2c_raise_scl_wait */
0xf106e621,
0xf403e8e7,
0x21f57f21,
0x01f4072a,
0x0142b609,
/* 0x077b: i2c_raise_scl_done */
0xfcef1bf4,
/* 0x077f: i2c_start */
0xf500f840,
0xf4072a21,
0x21f50d11,
0x11f40742,
0x300ef406,
/* 0x0790: i2c_start_rep */
0xf50037f0,
0xf006e621,
0x21f50137,
0x76bb0708,
0x0465b600,
0x659450f9,
0x0256bb04,
0x75fd50bd,
0xf550fc04,
0xb6075a21,
0x11f40464,
/* 0x07bd: i2c_start_send */
0x0037f01f,
0x070821f5,
0x1388e7f1,
0xf07f21f4,
0x21f50037,
0xe7f106e6,
0x21f41388,
/* 0x07d9: i2c_start_out */
/* 0x07db: i2c_stop */
0xf000f87f,
0x21f50037,
0x37f006e6,
0x0821f500,
0xe8e7f107,
/* 0x088c: i2c_sense_scl */
0xf10132f4,
0xb607c437,
0x33cf0634,
0x0431fd00,
0xf4060bf4,
/* 0x08a2: i2c_sense_scl_done */
0x00f80131,
/* 0x08a4: i2c_sense_sda */
0xf10132f4,
0xb607c437,
0x33cf0634,
0x0432fd00,
0xf4060bf4,
/* 0x08ba: i2c_sense_sda_done */
0x00f80131,
/* 0x08bc: i2c_raise_scl */
0x47f140f9,
0x37f00898,
0x4821f501,
/* 0x08c9: i2c_raise_scl_wait */
0xe8e7f108,
0x7f21f403,
0xf50137f0,
0xf106e621,
0xf41388e7,
0x37f07f21,
0x0821f501,
0x88e7f107,
0x7f21f413,
/* 0x080e: i2c_bitw */
0x21f500f8,
0xe7f10708,
0x21f403e8,
0x0076bb7f,
0xf90465b6,
0x04659450,
0xbd0256bb,
0x0475fd50,
0x21f550fc,
0x64b6075a,
0x1811f404,
0x1388e7f1,
0xf07f21f4,
0x088c21f5,
0xb60901f4,
0x1bf40142,
/* 0x08dd: i2c_raise_scl_done */
0xf840fcef,
/* 0x08e1: i2c_start */
0x8c21f500,
0x0d11f408,
0x08a421f5,
0xf40611f4,
/* 0x08f2: i2c_start_rep */
0x37f0300e,
0x4821f500,
0x0137f008,
0x086a21f5,
0xb60076bb,
0x50f90465,
0xbb046594,
0x50bd0256,
0xfc0475fd,
0xbc21f550,
0x0464b608,
/* 0x091f: i2c_start_send */
0xf01f11f4,
0x21f50037,
0xe7f106e6,
0xe7f1086a,
0x21f41388,
/* 0x084d: i2c_bitw_out */
/* 0x084f: i2c_bitr */
0xf000f87f,
0x21f50137,
0xe7f10708,
0x21f403e8,
0x0076bb7f,
0xf90465b6,
0x04659450,
0xbd0256bb,
0x0475fd50,
0x21f550fc,
0x64b6075a,
0x1b11f404,
0x074221f5,
0x0037f07f,
0x084821f5,
0x1388e7f1,
/* 0x093b: i2c_start_out */
0xf87f21f4,
/* 0x093d: i2c_stop */
0x0037f000,
0x084821f5,
0xf50037f0,
0xf106e621,
0xf1086a21,
0xf403e8e7,
0x37f07f21,
0x4821f501,
0x88e7f108,
0x7f21f413,
0xf50137f0,
0xf1086a21,
0xf41388e7,
0x3cf07f21,
0x0131f401,
/* 0x0894: i2c_bitr_done */
/* 0x0896: i2c_get_byte */
0x57f000f8,
0x0847f000,
/* 0x089c: i2c_get_byte_next */
0xbb0154b6,
0x00f87f21,
/* 0x0970: i2c_bitw */
0x086a21f5,
0x03e8e7f1,
0xbb7f21f4,
0x65b60076,
0x9450f904,
0x56bb0465,
0xfd50bd02,
0x50fc0475,
0x084f21f5,
0x08bc21f5,
0xf40464b6,
0x53fd2b11,
0x0142b605,
0xf0d81bf4,
0x76bb0137,
0x0465b600,
0x659450f9,
0x0256bb04,
0x75fd50bd,
0xf550fc04,
0xb6080e21,
/* 0x08e6: i2c_get_byte_done */
0x00f80464,
/* 0x08e8: i2c_put_byte */
/* 0x08eb: i2c_put_byte_next */
0xb60847f0,
0x54ff0142,
0x0076bb38,
0xe7f11811,
0x21f41388,
0x0037f07f,
0x084821f5,
0x1388e7f1,
/* 0x09af: i2c_bitw_out */
0xf87f21f4,
/* 0x09b1: i2c_bitr */
0x0137f000,
0x086a21f5,
0x03e8e7f1,
0xbb7f21f4,
0x65b60076,
0x9450f904,
0x56bb0465,
0xfd50bd02,
0x50fc0475,
0x08bc21f5,
0xf40464b6,
0x21f51b11,
0x37f008a4,
0x4821f500,
0x88e7f108,
0x7f21f413,
0xf4013cf0,
/* 0x09f6: i2c_bitr_done */
0x00f80131,
/* 0x09f8: i2c_get_byte */
0xf00057f0,
/* 0x09fe: i2c_get_byte_next */
0x54b60847,
0x0076bb01,
0xf90465b6,
0x04659450,
0xbd0256bb,
0x0475fd50,
0x21f550fc,
0x64b6080e,
0x3411f404,
0xf40046b0,
0x76bbd81b,
0x0465b600,
0x659450f9,
0x0256bb04,
0x75fd50bd,
0xf550fc04,
0xb6084f21,
0x11f40464,
0x0076bb0f,
0xf40136b0,
0x32f4061b,
/* 0x0941: i2c_put_byte_done */
/* 0x0943: i2c_addr */
0xbb00f801,
0x64b609b1,
0x2b11f404,
0xb60553fd,
0x1bf40142,
0x0137f0d8,
0xb60076bb,
0x50f90465,
0xbb046594,
0x50bd0256,
0xfc0475fd,
0x7021f550,
0x0464b609,
/* 0x0a48: i2c_get_byte_done */
/* 0x0a4a: i2c_put_byte */
0x47f000f8,
/* 0x0a4d: i2c_put_byte_next */
0x0142b608,
0xbb3854ff,
0x65b60076,
0x9450f904,
0x56bb0465,
0xfd50bd02,
0x50fc0475,
0x077f21f5,
0x097021f5,
0xf40464b6,
0xc3e72911,
0x34b6012e,
0x0553fd01,
0x46b03411,
0xd81bf400,
0xb60076bb,
0x50f90465,
0xbb046594,
0x50bd0256,
0xfc0475fd,
0xe821f550,
0x0464b608,
/* 0x0988: i2c_addr_done */
/* 0x098a: i2c_acquire_addr */
0xcec700f8,
0x02e4b6f8,
0x0c10e0b7,
0xf800ee98,
/* 0x0999: i2c_acquire */
0x8a21f500,
0x0421f409,
0xf403d9f0,
0x00f83f21,
/* 0x09a8: i2c_release */
0x098a21f5,
0xf00421f4,
0x21f403da,
/* 0x09b7: i2c_recv */
0xf400f83f,
0xc1c70132,
0x0214b6f8,
0xf52816b0,
0xa0013a1f,
0x980be813,
0x13a00032,
0x31980bc0,
0x0231f400,
0xe0f9d0f9,
0x67f1d0f9,
0x63f10000,
0x67921000,
0x0076bb01,
0xf90465b6,
0x04659450,
0xbd0256bb,
0x0475fd50,
0x21f550fc,
0x64b60999,
0xb0d0fc04,
0x1bf500d6,
0x57f000b3,
0xb121f550,
0x0464b609,
0xbb0f11f4,
0x36b00076,
0x061bf401,
/* 0x0aa3: i2c_put_byte_done */
0xf80132f4,
/* 0x0aa5: i2c_addr */
0x0076bb00,
0xf90465b6,
0x04659450,
0xbd0256bb,
0x0475fd50,
0x21f550fc,
0x64b60943,
0xd011f504,
0xe0c5c700,
0xb60076bb,
0x50f90465,
0xbb046594,
0x50bd0256,
0xfc0475fd,
0xe821f550,
0x0464b608,
0x00ad11f5,
0xbb0157f0,
0x64b608e1,
0x2911f404,
0x012ec3e7,
0xfd0134b6,
0x76bb0553,
0x0465b600,
0x659450f9,
0x0256bb04,
0x75fd50bd,
0xf550fc04,
0xb60a4a21,
/* 0x0aea: i2c_addr_done */
0x00f80464,
/* 0x0aec: i2c_acquire_addr */
0xb6f8cec7,
0xe0b702e4,
0xee980d1c,
/* 0x0afb: i2c_acquire */
0xf500f800,
0xf40aec21,
0xd9f00421,
0x3f21f403,
/* 0x0b0a: i2c_release */
0x21f500f8,
0x21f40aec,
0x03daf004,
0xf83f21f4,
/* 0x0b19: i2c_recv */
0x0132f400,
0xb6f8c1c7,
0x16b00214,
0x3a1ff528,
0xf413a001,
0x0032980c,
0x0ccc13a0,
0xf4003198,
0xd0f90231,
0xd0f9e0f9,
0x000067f1,
0x100063f1,
0xbb016792,
0x65b60076,
0x9450f904,
0x56bb0465,
0xfd50bd02,
0x50fc0475,
0x094321f5,
0xf50464b6,
0xbb008a11,
0x0afb21f5,
0xfc0464b6,
0x00d6b0d0,
0x00b31bf5,
0xbb0057f0,
0x65b60076,
0x9450f904,
0x56bb0465,
0xfd50bd02,
0x50fc0475,
0x089621f5,
0xf40464b6,
0x5bcb6a11,
0x0076bbe0,
0x0aa521f5,
0xf50464b6,
0xc700d011,
0x76bbe0c5,
0x0465b600,
0x659450f9,
0x0256bb04,
0x75fd50bd,
0xf550fc04,
0xb60a4a21,
0x11f50464,
0x57f000ad,
0x0076bb01,
0xf90465b6,
0x04659450,
0xbd0256bb,
0x0475fd50,
0x21f550fc,
0x64b607db,
0x025bb904,
0x0ef474bd,
/* 0x0abd: i2c_recv_not_rd08 */
0x01d6b043,
0xf03d1bf4,
0x21f50057,
0x11f40943,
0xe0c5c733,
0x08e821f5,
0xf02911f4,
0x21f50057,
0x11f40943,
0xe0b5c71f,
0x08e821f5,
0xf51511f4,
0xbd07db21,
0x08c5c774,
0xf4091bf4,
0x0ef40232,
/* 0x0afd: i2c_recv_not_wr08 */
/* 0x0afd: i2c_recv_done */
0xf8cec703,
0x09a821f5,
0xd0fce0fc,
0xb90a12f4,
0x21f5027c,
/* 0x0b12: i2c_recv_exit */
0x00f80342,
/* 0x0b14: i2c_init */
/* 0x0b16: test_recv */
0x17f100f8,
0x14b605d8,
0x0011cf06,
0xf10110b6,
0xb605d807,
0x01d00604,
0xf104bd00,
0xf1d900e7,
0xf5134fe3,
0xf8026221,
/* 0x0b3d: test_init */
0x00e7f100,
0x6221f508,
/* 0x0b47: idle_recv */
0xf800f802,
/* 0x0b49: idle */
0x0031f400,
0x05d417f1,
0x64b60aa5,
0x8a11f504,
0x0076bb00,
0xf90465b6,
0x04659450,
0xbd0256bb,
0x0475fd50,
0x21f550fc,
0x64b609f8,
0x6a11f404,
0xbbe05bcb,
0x65b60076,
0x9450f904,
0x56bb0465,
0xfd50bd02,
0x50fc0475,
0x093d21f5,
0xb90464b6,
0x74bd025b,
/* 0x0c1f: i2c_recv_not_rd08 */
0xb0430ef4,
0x1bf401d6,
0x0057f03d,
0x0aa521f5,
0xc73311f4,
0x21f5e0c5,
0x11f40a4a,
0x0057f029,
0x0aa521f5,
0xc71f11f4,
0x21f5e0b5,
0x11f40a4a,
0x3d21f515,
0xc774bd09,
0x1bf408c5,
0x0232f409,
/* 0x0c5f: i2c_recv_not_wr08 */
/* 0x0c5f: i2c_recv_done */
0xc7030ef4,
0x21f5f8ce,
0xe0fc0b0a,
0x12f4d0fc,
0x027cb90a,
0x034221f5,
/* 0x0c74: i2c_recv_exit */
/* 0x0c76: i2c_init */
0x00f800f8,
/* 0x0c78: test_recv */
0x05d817f1,
0xcf0614b6,
0x10b60011,
0xd407f101,
0xd807f101,
0x0604b605,
0xbd0001d0,
/* 0x0b65: idle_loop */
0x5817f004,
/* 0x0b6b: idle_proc */
/* 0x0b6b: idle_proc_exec */
0xf90232f4,
0x021eb910,
0x034b21f5,
0x11f410fc,
0x0231f409,
/* 0x0b7f: idle_proc_next */
0xb6ef0ef4,
0x1fb85810,
0xe61bf406,
0xf4dd02f4,
0x0ef40028,
0x000000bb,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00e7f104,
0x4fe3f1d9,
0x6221f513,
/* 0x0c9f: test_init */
0xf100f802,
0xf50800e7,
0xf8026221,
/* 0x0ca9: idle_recv */
/* 0x0cab: idle */
0xf400f800,
0x17f10031,
0x14b605d4,
0x0011cf06,
0xf10110b6,
0xb605d407,
0x01d00604,
/* 0x0cc7: idle_loop */
0xf004bd00,
0x32f45817,
/* 0x0ccd: idle_proc */
/* 0x0ccd: idle_proc_exec */
0xb910f902,
0x21f5021e,
0x10fc034b,
0xf40911f4,
0x0ef40231,
/* 0x0ce1: idle_proc_next */
0x5810b6ef,
0xf4061fb8,
0x02f4e61b,
0x0028f4dd,
0x00bb0ef4,
0x00000000,
0x00000000,
0x00000000,
......
drivers/gpu/drm/nouveau/core/subdev/pwr/fuc/nvc0.fuc.h
View file @ 7f4b9616
......@@ -46,8 +46,8 @@ uint32_t nvc0_pwr_data[] = {
0x00000000,
0x00000000,
0x584d454d,
0x0000074b,
0x0000073d,
0x0000075e,
0x00000750,
0x00000000,
0x00000000,
0x00000000,
......@@ -68,8 +68,8 @@ uint32_t nvc0_pwr_data[] = {
0x00000000,
0x00000000,
0x46524550,
0x0000074f,
0x0000074d,
0x00000762,
0x00000760,
0x00000000,
0x00000000,
0x00000000,
......@@ -90,8 +90,8 @@ uint32_t nvc0_pwr_data[] = {
0x00000000,
0x00000000,
0x5f433249,
0x00000b7f,
0x00000a22,
0x00000b92,
0x00000a35,
0x00000000,
0x00000000,
0x00000000,
......@@ -112,8 +112,8 @@ uint32_t nvc0_pwr_data[] = {
0x00000000,
0x00000000,
0x54534554,
0x00000ba8,
0x00000b81,
0x00000bbb,
0x00000b94,
0x00000000,
0x00000000,
0x00000000,
......@@ -134,8 +134,8 @@ uint32_t nvc0_pwr_data[] = {
0x00000000,
0x00000000,
0x454c4449,
0x00000bb4,
0x00000bb2,
0x00000bc7,
0x00000bc5,
0x00000000,
0x00000000,
0x00000000,
......@@ -246,13 +246,15 @@ uint32_t nvc0_pwr_data[] = {
0x00010006,
0x00000000,
0x00000663,
/* 0x03b8: memx_func_tail */
/* 0x03b8: memx_ts_start */
0x00000007,
0x00000000,
/* 0x03bc: memx_ts_end */
0x000006e9,
/* 0x03c4: memx_func_tail */
/* 0x03c4: memx_ts_start */
0x00000000,
/* 0x03c0: memx_data_head */
/* 0x03c8: memx_ts_end */
0x00000000,
/* 0x03cc: memx_data_head */
0x00000000,
0x00000000,
0x00000000,
......@@ -764,8 +766,75 @@ uint32_t nvc0_pwr_data[] = {
0x00000000,
0x00000000,
0x00000000,
/* 0x0bc0: memx_data_tail */
/* 0x0bc0: i2c_scl_map */
0x00000000,
/* 0x0bcc: memx_data_tail */
/* 0x0bcc: memx_train_head */
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
/* 0x0ccc: memx_train_tail */
/* 0x0ccc: i2c_scl_map */
0x00001000,
0x00004000,
0x00010000,
......@@ -776,7 +845,7 @@ uint32_t nvc0_pwr_data[] = {
0x01000000,
0x04000000,
0x10000000,
/* 0x0be8: i2c_sda_map */
/* 0x0cf4: i2c_sda_map */
0x00002000,
0x00008000,
0x00020000,
......@@ -787,7 +856,7 @@ uint32_t nvc0_pwr_data[] = {
0x02000000,
0x08000000,
0x20000000,
/* 0x0c10: i2c_ctrl */
/* 0x0d1c: i2c_ctrl */
0x0000e138,
0x0000e150,
0x0000e168,
......@@ -845,9 +914,6 @@ uint32_t nvc0_pwr_data[] = {
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
};
uint32_t nvc0_pwr_code[] = {
......@@ -1272,10 +1338,10 @@ uint32_t nvc0_pwr_code[] = {
0xcf0664b6,
0x06800066,
/* 0x05db: memx_func_leave */
0xf000f8ee,
0xf000f8f1,
0x64b62c67,
0x0066cf06,
0xf0ef0680,
0xf0f20680,
0x07f10467,
0x04b607e4,
0x0006d006,
......@@ -1350,382 +1416,450 @@ uint32_t nvc0_pwr_code[] = {
0x1e9800f8,
0x0410b600,
0xf87f21f4,
/* 0x06e9: memx_exec */
0xf9e0f900,
0x02c1b9d0,
/* 0x06f3: memx_exec_next */
0x9802b2b9,
0x10b60013,
0xf034e704,
0xe033e701,
0x0132b601,
0x980c30f0,
0x55f9de35,
0xf40612b8,
0x0b98e41e,
0xef0c98ee,
0xf102cbbb,
0xb607c4b7,
0xbbcf06b4,
0xfcd0fc00,
0x4221f5e0,
/* 0x072f: memx_info */
0xf100f803,
0xf103c0c7,
0xf50800b7,
/* 0x06e9: memx_func_train */
/* 0x06eb: memx_exec */
0xf900f800,
0xb9d0f9e0,
0xb2b902c1,
/* 0x06f5: memx_exec_next */
0x00139802,
0xe70410b6,
0xe701f034,
0xb601e033,
0x30f00132,
0xde35980c,
0x12b855f9,
0xe41ef406,
0x98f10b98,
0xcbbbf20c,
0xc4b7f102,
0x06b4b607,
0xfc00bbcf,
0xf5e0fcd0,
0xf8034221,
/* 0x073d: memx_recv */
0x01d6b000,
0xb0a90bf4,
0x0bf400d6,
/* 0x074b: memx_init */
0xf800f8e9,
/* 0x074d: perf_recv */
/* 0x074f: perf_init */
0xf800f800,
/* 0x0751: i2c_drive_scl */
0x0036b000,
0xf1110bf4,
0xb607e007,
0x01d00604,
0xf804bd00,
/* 0x0765: i2c_drive_scl_lo */
0xe407f100,
0x0604b607,
0xbd0001d0,
/* 0x0773: i2c_drive_sda */
0xb000f804,
0x0bf40036,
0xe007f111,
0x0604b607,
0xbd0002d0,
/* 0x0787: i2c_drive_sda_lo */
0xf100f804,
0xb607e407,
0x02d00604,
0xf804bd00,
/* 0x0795: i2c_sense_scl */
0x0132f400,
0x07c437f1,
0xcf0634b6,
0x31fd0033,
0x060bf404,
/* 0x07ab: i2c_sense_scl_done */
0xf80131f4,
/* 0x07ad: i2c_sense_sda */
0x0132f400,
0x07c437f1,
0xcf0634b6,
0x32fd0033,
0x060bf404,
/* 0x07c3: i2c_sense_sda_done */
0xf80131f4,
/* 0x07c5: i2c_raise_scl */
0xf140f900,
0xf0089847,
0x21f50137,
/* 0x07d2: i2c_raise_scl_wait */
0xe7f10751,
0x21f403e8,
0x9521f57f,
0x0901f407,
0xf40142b6,
/* 0x07e6: i2c_raise_scl_done */
0x40fcef1b,
/* 0x07ea: i2c_start */
0x21f500f8,
0x11f40795,
0xad21f50d,
0x0611f407,
/* 0x07fb: i2c_start_rep */
0xf0300ef4,
0x21f50037,
0x37f00751,
0x7321f501,
0x0076bb07,
0xf90465b6,
0x04659450,
0xbd0256bb,
0x0475fd50,
0x21f550fc,
0x64b607c5,
0x1f11f404,
/* 0x0828: i2c_start_send */
0xf50037f0,
0xf1077321,
0xf41388e7,
0x37f07f21,
0x5121f500,
0x88e7f107,
0x7f21f413,
/* 0x0844: i2c_start_out */
/* 0x0846: i2c_stop */
0x37f000f8,
0x5121f500,
0x0037f007,
0x077321f5,
0x03e8e7f1,
0xf07f21f4,
0x21f50137,
0xe7f10751,
0x21f41388,
0x0137f07f,
0x077321f5,
0x1388e7f1,
0xf87f21f4,
/* 0x0879: i2c_bitw */
0x7321f500,
/* 0x0731: memx_info */
0x01c67000,
/* 0x0737: memx_info_data */
0xf10e0bf4,
0xf103ccc7,
0xf40800b7,
/* 0x0742: memx_info_train */
0xc7f10b0e,
0xb7f10bcc,
/* 0x074a: memx_info_send */
0x21f50100,
0x00f80342,
/* 0x0750: memx_recv */
0xf401d6b0,
0xd6b0980b,
0xd80bf400,
/* 0x075e: memx_init */
0x00f800f8,
/* 0x0760: perf_recv */
/* 0x0762: perf_init */
0x00f800f8,
/* 0x0764: i2c_drive_scl */
0xf40036b0,
0x07f1110b,
0x04b607e0,
0x0001d006,
0x00f804bd,
/* 0x0778: i2c_drive_scl_lo */
0x07e407f1,
0xd00604b6,
0x04bd0001,
/* 0x0786: i2c_drive_sda */
0x36b000f8,
0x110bf400,
0x07e007f1,
0xd00604b6,
0x04bd0002,
/* 0x079a: i2c_drive_sda_lo */
0x07f100f8,
0x04b607e4,
0x0002d006,
0x00f804bd,
/* 0x07a8: i2c_sense_scl */
0xf10132f4,
0xb607c437,
0x33cf0634,
0x0431fd00,
0xf4060bf4,
/* 0x07be: i2c_sense_scl_done */
0x00f80131,
/* 0x07c0: i2c_sense_sda */
0xf10132f4,
0xb607c437,
0x33cf0634,
0x0432fd00,
0xf4060bf4,
/* 0x07d6: i2c_sense_sda_done */
0x00f80131,
/* 0x07d8: i2c_raise_scl */
0x47f140f9,
0x37f00898,
0x6421f501,
/* 0x07e5: i2c_raise_scl_wait */
0xe8e7f107,
0x7f21f403,
0x07a821f5,
0xb60901f4,
0x1bf40142,
/* 0x07f9: i2c_raise_scl_done */
0xf840fcef,
/* 0x07fd: i2c_start */
0xa821f500,
0x0d11f407,
0x07c021f5,
0xf40611f4,
/* 0x080e: i2c_start_rep */
0x37f0300e,
0x6421f500,
0x0137f007,
0x078621f5,
0xb60076bb,
0x50f90465,
0xbb046594,
0x50bd0256,
0xfc0475fd,
0xc521f550,
0xd821f550,
0x0464b607,
0xf11811f4,
0xf41388e7,
/* 0x083b: i2c_start_send */
0xf01f11f4,
0x21f50037,
0xe7f10786,
0x21f41388,
0x0037f07f,
0x076421f5,
0x1388e7f1,
/* 0x0857: i2c_start_out */
0xf87f21f4,
/* 0x0859: i2c_stop */
0x0037f000,
0x076421f5,
0xf50037f0,
0xf1078621,
0xf403e8e7,
0x37f07f21,
0x5121f500,
0x6421f501,
0x88e7f107,
0x7f21f413,
/* 0x08b8: i2c_bitw_out */
/* 0x08ba: i2c_bitr */
0x37f000f8,
0x7321f501,
0xe8e7f107,
0x7f21f403,
0xb60076bb,
0x50f90465,
0xbb046594,
0x50bd0256,
0xfc0475fd,
0xc521f550,
0x0464b607,
0xf51b11f4,
0xf007ad21,
0x21f50037,
0xe7f10751,
0xf50137f0,
0xf1078621,
0xf41388e7,
0x00f87f21,
/* 0x088c: i2c_bitw */
0x078621f5,
0x03e8e7f1,
0xbb7f21f4,
0x65b60076,
0x9450f904,
0x56bb0465,
0xfd50bd02,
0x50fc0475,
0x07d821f5,
0xf40464b6,
0xe7f11811,
0x21f41388,
0x013cf07f,
/* 0x08ff: i2c_bitr_done */
0xf80131f4,
/* 0x0901: i2c_get_byte */
0x0057f000,
/* 0x0907: i2c_get_byte_next */
0xb60847f0,
0x76bb0154,
0x0465b600,
0x659450f9,
0x0256bb04,
0x75fd50bd,
0xf550fc04,
0xb608ba21,
0x11f40464,
0x0553fd2b,
0xf40142b6,
0x37f0d81b,
0x0037f07f,
0x076421f5,
0x1388e7f1,
/* 0x08cb: i2c_bitw_out */
0xf87f21f4,
/* 0x08cd: i2c_bitr */
0x0137f000,
0x078621f5,
0x03e8e7f1,
0xbb7f21f4,
0x65b60076,
0x9450f904,
0x56bb0465,
0xfd50bd02,
0x50fc0475,
0x07d821f5,
0xf40464b6,
0x21f51b11,
0x37f007c0,
0x6421f500,
0x88e7f107,
0x7f21f413,
0xf4013cf0,
/* 0x0912: i2c_bitr_done */
0x00f80131,
/* 0x0914: i2c_get_byte */
0xf00057f0,
/* 0x091a: i2c_get_byte_next */
0x54b60847,
0x0076bb01,
0xf90465b6,
0x04659450,
0xbd0256bb,
0x0475fd50,
0x21f550fc,
0x64b60879,
/* 0x0951: i2c_get_byte_done */
/* 0x0953: i2c_put_byte */
0xf000f804,
/* 0x0956: i2c_put_byte_next */
0x42b60847,
0x3854ff01,
0x64b608cd,
0x2b11f404,
0xb60553fd,
0x1bf40142,
0x0137f0d8,
0xb60076bb,
0x50f90465,
0xbb046594,
0x50bd0256,
0xfc0475fd,
0x7921f550,
0x8c21f550,
0x0464b608,
0xb03411f4,
0x1bf40046,
0x0076bbd8,
/* 0x0964: i2c_get_byte_done */
/* 0x0966: i2c_put_byte */
0x47f000f8,
/* 0x0969: i2c_put_byte_next */
0x0142b608,
0xbb3854ff,
0x65b60076,
0x9450f904,
0x56bb0465,
0xfd50bd02,
0x50fc0475,
0x088c21f5,
0xf40464b6,
0x46b03411,
0xd81bf400,
0xb60076bb,
0x50f90465,
0xbb046594,
0x50bd0256,
0xfc0475fd,
0xcd21f550,
0x0464b608,
0xbb0f11f4,
0x36b00076,
0x061bf401,
/* 0x09bf: i2c_put_byte_done */
0xf80132f4,
/* 0x09c1: i2c_addr */
0x0076bb00,
0xf90465b6,
0x04659450,
0xbd0256bb,
0x0475fd50,
0x21f550fc,
0x64b608ba,
0x0f11f404,
0xb00076bb,
0x1bf40136,
0x0132f406,
/* 0x09ac: i2c_put_byte_done */
/* 0x09ae: i2c_addr */
0x76bb00f8,
0x64b607fd,
0x2911f404,
0x012ec3e7,
0xfd0134b6,
0x76bb0553,
0x0465b600,
0x659450f9,
0x0256bb04,
0x75fd50bd,
0xf550fc04,
0xb607ea21,
0x11f40464,
0x2ec3e729,
0x0134b601,
0xbb0553fd,
0xb6096621,
/* 0x0a06: i2c_addr_done */
0x00f80464,
/* 0x0a08: i2c_acquire_addr */
0xb6f8cec7,
0xe0b702e4,
0xee980d1c,
/* 0x0a17: i2c_acquire */
0xf500f800,
0xf40a0821,
0xd9f00421,
0x3f21f403,
/* 0x0a26: i2c_release */
0x21f500f8,
0x21f40a08,
0x03daf004,
0xf83f21f4,
/* 0x0a35: i2c_recv */
0x0132f400,
0xb6f8c1c7,
0x16b00214,
0x3a1ff528,
0xf413a001,
0x0032980c,
0x0ccc13a0,
0xf4003198,
0xd0f90231,
0xd0f9e0f9,
0x000067f1,
0x100063f1,
0xbb016792,
0x65b60076,
0x9450f904,
0x56bb0465,
0xfd50bd02,
0x50fc0475,
0x095321f5,
/* 0x09f3: i2c_addr_done */
0xf80464b6,
/* 0x09f5: i2c_acquire_addr */
0xf8cec700,
0xb702e4b6,
0x980c10e0,
0x00f800ee,
/* 0x0a04: i2c_acquire */
0x09f521f5,
0xf00421f4,
0x21f403d9,
/* 0x0a13: i2c_release */
0xf500f83f,
0xf409f521,
0xdaf00421,
0x3f21f403,
/* 0x0a22: i2c_recv */
0x32f400f8,
0xf8c1c701,
0xb00214b6,
0x1ff52816,
0x13a0013a,
0x32980be8,
0xc013a000,
0x0031980b,
0xf90231f4,
0xf9e0f9d0,
0x0067f1d0,
0x0063f100,
0x01679210,
0xb60076bb,
0x50f90465,
0xbb046594,
0x50bd0256,
0xfc0475fd,
0x0421f550,
0x0464b60a,
0xd6b0d0fc,
0xb31bf500,
0x0057f000,
0xb60076bb,
0x50f90465,
0xbb046594,
0x50bd0256,
0xfc0475fd,
0xae21f550,
0x0464b609,
0x00d011f5,
0xbbe0c5c7,
0x0a1721f5,
0xfc0464b6,
0x00d6b0d0,
0x00b31bf5,
0xbb0057f0,
0x65b60076,
0x9450f904,
0x56bb0465,
0xfd50bd02,
0x50fc0475,
0x095321f5,
0x09c121f5,
0xf50464b6,
0xf000ad11,
0x76bb0157,
0xc700d011,
0x76bbe0c5,
0x0465b600,
0x659450f9,
0x0256bb04,
0x75fd50bd,
0xf550fc04,
0xb609ae21,
0xb6096621,
0x11f50464,
0x76bb008a,
0x0465b600,
0x659450f9,
0x0256bb04,
0x75fd50bd,
0xf550fc04,
0xb6090121,
0x11f40464,
0xe05bcb6a,
0xb60076bb,
0x50f90465,
0xbb046594,
0x50bd0256,
0xfc0475fd,
0x4621f550,
0x0464b608,
0xbd025bb9,
0x430ef474,
/* 0x0b28: i2c_recv_not_rd08 */
0xf401d6b0,
0x57f03d1b,
0xae21f500,
0x3311f409,
0xf5e0c5c7,
0xf4095321,
0x57f02911,
0xae21f500,
0x1f11f409,
0xf5e0b5c7,
0xf4095321,
0x21f51511,
0x74bd0846,
0xf408c5c7,
0x32f4091b,
0x030ef402,
/* 0x0b68: i2c_recv_not_wr08 */
/* 0x0b68: i2c_recv_done */
0xf5f8cec7,
0xfc0a1321,
0xf4d0fce0,
0x7cb90a12,
0x4221f502,
/* 0x0b7d: i2c_recv_exit */
/* 0x0b7f: i2c_init */
0xf800f803,
/* 0x0b81: test_recv */
0xd817f100,
0x0614b605,
0xb60011cf,
0x07f10110,
0x04b605d8,
0x0001d006,
0xe7f104bd,
0xe3f1d900,
0x21f5134f,
0x00f80262,
/* 0x0ba8: test_init */
0x0800e7f1,
0x026221f5,
/* 0x0bb2: idle_recv */
0x57f000ad,
0x0076bb01,
0xf90465b6,
0x04659450,
0xbd0256bb,
0x0475fd50,
0x21f550fc,
0x64b609c1,
0x8a11f504,
0x0076bb00,
0xf90465b6,
0x04659450,
0xbd0256bb,
0x0475fd50,
0x21f550fc,
0x64b60914,
0x6a11f404,
0xbbe05bcb,
0x65b60076,
0x9450f904,
0x56bb0465,
0xfd50bd02,
0x50fc0475,
0x085921f5,
0xb90464b6,
0x74bd025b,
/* 0x0b3b: i2c_recv_not_rd08 */
0xb0430ef4,
0x1bf401d6,
0x0057f03d,
0x09c121f5,
0xc73311f4,
0x21f5e0c5,
0x11f40966,
0x0057f029,
0x09c121f5,
0xc71f11f4,
0x21f5e0b5,
0x11f40966,
0x5921f515,
0xc774bd08,
0x1bf408c5,
0x0232f409,
/* 0x0b7b: i2c_recv_not_wr08 */
/* 0x0b7b: i2c_recv_done */
0xc7030ef4,
0x21f5f8ce,
0xe0fc0a26,
0x12f4d0fc,
0x027cb90a,
0x034221f5,
/* 0x0b90: i2c_recv_exit */
/* 0x0b92: i2c_init */
0x00f800f8,
/* 0x0bb4: idle */
0xf10031f4,
0xb605d417,
0x11cf0614,
0x0110b600,
0x05d407f1,
0xd00604b6,
0x04bd0001,
/* 0x0bd0: idle_loop */
0xf45817f0,
/* 0x0bd6: idle_proc */
/* 0x0bd6: idle_proc_exec */
0x10f90232,
0xf5021eb9,
0xfc034b21,
0x0911f410,
0xf40231f4,
/* 0x0bea: idle_proc_next */
0x10b6ef0e,
0x061fb858,
0xf4e61bf4,
0x28f4dd02,
0xbb0ef400,
/* 0x0b94: test_recv */
0x05d817f1,
0xcf0614b6,
0x10b60011,
0xd807f101,
0x0604b605,
0xbd0001d0,
0x00e7f104,
0x4fe3f1d9,
0x6221f513,
/* 0x0bbb: test_init */
0xf100f802,
0xf50800e7,
0xf8026221,
/* 0x0bc5: idle_recv */
/* 0x0bc7: idle */
0xf400f800,
0x17f10031,
0x14b605d4,
0x0011cf06,
0xf10110b6,
0xb605d407,
0x01d00604,
/* 0x0be3: idle_loop */
0xf004bd00,
0x32f45817,
/* 0x0be9: idle_proc */
/* 0x0be9: idle_proc_exec */
0xb910f902,
0x21f5021e,
0x10fc034b,
0xf40911f4,
0x0ef40231,
/* 0x0bfd: idle_proc_next */
0x5810b6ef,
0xf4061fb8,
0x02f4e61b,
0x0028f4dd,
0x00bb0ef4,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
};
drivers/gpu/drm/nouveau/core/subdev/pwr/fuc/nvd0.fuc.h
View file @ 7f4b9616
......@@ -46,8 +46,8 @@ uint32_t nvd0_pwr_data[] = {
0x00000000,
0x00000000,
0x584d454d,
0x00000678,
0x0000066a,
0x0000068b,
0x0000067d,
0x00000000,
0x00000000,
0x00000000,
......@@ -68,8 +68,8 @@ uint32_t nvd0_pwr_data[] = {
0x00000000,
0x00000000,
0x46524550,
0x0000067c,
0x0000067a,
0x0000068f,
0x0000068d,
0x00000000,
0x00000000,
0x00000000,
......@@ -90,8 +90,8 @@ uint32_t nvd0_pwr_data[] = {
0x00000000,
0x00000000,
0x5f433249,
0x00000a97,
0x0000093a,
0x00000aaa,
0x0000094d,
0x00000000,
0x00000000,
0x00000000,
......@@ -112,8 +112,8 @@ uint32_t nvd0_pwr_data[] = {
0x00000000,
0x00000000,
0x54534554,
0x00000aba,
0x00000a99,
0x00000acd,
0x00000aac,
0x00000000,
0x00000000,
0x00000000,
......@@ -134,8 +134,8 @@ uint32_t nvd0_pwr_data[] = {
0x00000000,
0x00000000,
0x454c4449,
0x00000ac6,
0x00000ac4,
0x00000ad9,
0x00000ad7,
0x00000000,
0x00000000,
0x00000000,
......@@ -246,13 +246,15 @@ uint32_t nvd0_pwr_data[] = {
0x00010006,
0x00000000,
0x000005d3,
/* 0x03b8: memx_func_tail */
/* 0x03b8: memx_ts_start */
0x00000007,
0x00000000,
/* 0x03bc: memx_ts_end */
0x00000619,
/* 0x03c4: memx_func_tail */
/* 0x03c4: memx_ts_start */
0x00000000,
/* 0x03c0: memx_data_head */
/* 0x03c8: memx_ts_end */
0x00000000,
/* 0x03cc: memx_data_head */
0x00000000,
0x00000000,
0x00000000,
......@@ -764,8 +766,75 @@ uint32_t nvd0_pwr_data[] = {
0x00000000,
0x00000000,
0x00000000,
/* 0x0bc0: memx_data_tail */
/* 0x0bc0: i2c_scl_map */
0x00000000,
/* 0x0bcc: memx_data_tail */
/* 0x0bcc: memx_train_head */
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
/* 0x0ccc: memx_train_tail */
/* 0x0ccc: i2c_scl_map */
0x00000400,
0x00000800,
0x00001000,
......@@ -776,7 +845,7 @@ uint32_t nvd0_pwr_data[] = {
0x00020000,
0x00040000,
0x00080000,
/* 0x0be8: i2c_sda_map */
/* 0x0cf4: i2c_sda_map */
0x00100000,
0x00200000,
0x00400000,
......@@ -844,9 +913,6 @@ uint32_t nvd0_pwr_data[] = {
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
};
uint32_t nvd0_pwr_code[] = {
......@@ -1236,11 +1302,11 @@ uint32_t nvd0_pwr_code[] = {
0x0bf40464,
0x2c67f0f6,
0x800066cf,
0x00f8ee06,
0x00f8f106,
/* 0x0554: memx_func_leave */
0xcf2c67f0,
0x06800066,
0x0467f0ef,
0x0467f0f2,
0x07e407f1,
0xbd0006d0,
/* 0x0569: memx_func_leave_wait */
......@@ -1292,379 +1358,383 @@ uint32_t nvd0_pwr_code[] = {
0x1e9800f8,
0x0410b600,
0xf86721f4,
/* 0x0619: memx_exec */
0xf9e0f900,
0x02c1b9d0,
/* 0x0623: memx_exec_next */
0x9802b2b9,
0x10b60013,
0xf034e704,
0xe033e701,
0x0132b601,
0x980c30f0,
0x55f9de35,
0xf40612b8,
0x0b98e41e,
0xef0c98ee,
0xf102cbbb,
0xcf07c4b7,
0xd0fc00bb,
0x21f5e0fc,
0x00f802f1,
/* 0x065c: memx_info */
0x03c0c7f1,
0x0800b7f1,
/* 0x0619: memx_func_train */
/* 0x061b: memx_exec */
0xf900f800,
0xb9d0f9e0,
0xb2b902c1,
/* 0x0625: memx_exec_next */
0x00139802,
0xe70410b6,
0xe701f034,
0xb601e033,
0x30f00132,
0xde35980c,
0x12b855f9,
0xe41ef406,
0x98f10b98,
0xcbbbf20c,
0xc4b7f102,
0x00bbcf07,
0xe0fcd0fc,
0x02f121f5,
/* 0x066a: memx_recv */
0xd6b000f8,
0xac0bf401,
0xf400d6b0,
0x00f8e90b,
/* 0x0678: memx_init */
/* 0x067a: perf_recv */
0x00f800f8,
/* 0x067c: perf_init */
/* 0x067e: i2c_drive_scl */
0x36b000f8,
0x0e0bf400,
0x07e007f1,
0xbd0001d0,
/* 0x068f: i2c_drive_scl_lo */
0xf100f804,
0xd007e407,
/* 0x065e: memx_info */
0xc67000f8,
0x0e0bf401,
/* 0x0664: memx_info_data */
0x03ccc7f1,
0x0800b7f1,
/* 0x066f: memx_info_train */
0xf10b0ef4,
0xf10bccc7,
/* 0x0677: memx_info_send */
0xf50100b7,
0xf802f121,
/* 0x067d: memx_recv */
0x01d6b000,
0xb09b0bf4,
0x0bf400d6,
/* 0x068b: memx_init */
0xf800f8d8,
/* 0x068d: perf_recv */
/* 0x068f: perf_init */
0xf800f800,
/* 0x0691: i2c_drive_scl */
0x0036b000,
0xf10e0bf4,
0xd007e007,
0x04bd0001,
/* 0x069a: i2c_drive_sda */
0x36b000f8,
0x0e0bf400,
0x07e007f1,
0xbd0002d0,
/* 0x06ab: i2c_drive_sda_lo */
0xf100f804,
0xd007e407,
/* 0x06a2: i2c_drive_scl_lo */
0x07f100f8,
0x01d007e4,
0xf804bd00,
/* 0x06ad: i2c_drive_sda */
0x0036b000,
0xf10e0bf4,
0xd007e007,
0x04bd0002,
/* 0x06b6: i2c_sense_scl */
/* 0x06be: i2c_drive_sda_lo */
0x07f100f8,
0x02d007e4,
0xf804bd00,
/* 0x06c9: i2c_sense_scl */
0x0132f400,
0x07c437f1,
0xfd0033cf,
0x0bf40431,
0x0131f406,
/* 0x06dc: i2c_sense_scl_done */
/* 0x06de: i2c_sense_sda */
0x32f400f8,
0xc437f101,
0x0033cf07,
0xf40431fd,
0xf40432fd,
0x31f4060b,
/* 0x06c9: i2c_sense_scl_done */
/* 0x06cb: i2c_sense_sda */
0xf400f801,
0x37f10132,
0x33cf07c4,
0x0432fd00,
0xf4060bf4,
/* 0x06de: i2c_sense_sda_done */
0x00f80131,
/* 0x06e0: i2c_raise_scl */
0x47f140f9,
0x37f00898,
0x7e21f501,
/* 0x06ed: i2c_raise_scl_wait */
0xe8e7f106,
0x6721f403,
0x06b621f5,
0xb60901f4,
0x1bf40142,
/* 0x0701: i2c_raise_scl_done */
0xf840fcef,
/* 0x0705: i2c_start */
0xb621f500,
0x0d11f406,
0x06cb21f5,
0xf40611f4,
/* 0x0716: i2c_start_rep */
0x37f0300e,
0x7e21f500,
0x0137f006,
0x069a21f5,
0xb60076bb,
0x50f90465,
0xbb046594,
0x50bd0256,
0xfc0475fd,
0xe021f550,
0x0464b606,
/* 0x0743: i2c_start_send */
0xf01f11f4,
0x21f50037,
0xe7f1069a,
0x21f41388,
0x0037f067,
0x067e21f5,
0x1388e7f1,
/* 0x075f: i2c_start_out */
0xf86721f4,
/* 0x0761: i2c_stop */
0x0037f000,
0x067e21f5,
0xf50037f0,
0xf1069a21,
0xf403e8e7,
0x37f06721,
0x7e21f501,
0x88e7f106,
0x6721f413,
0xf50137f0,
0xf1069a21,
0xf41388e7,
0x00f86721,
/* 0x0794: i2c_bitw */
0x069a21f5,
/* 0x06f1: i2c_sense_sda_done */
/* 0x06f3: i2c_raise_scl */
0xf900f801,
0x9847f140,
0x0137f008,
0x069121f5,
/* 0x0700: i2c_raise_scl_wait */
0x03e8e7f1,
0xbb6721f4,
0x65b60076,
0x9450f904,
0x56bb0465,
0xfd50bd02,
0x50fc0475,
0x06e021f5,
0xf40464b6,
0xe7f11811,
0x21f41388,
0x0037f067,
0x067e21f5,
0x1388e7f1,
/* 0x07d3: i2c_bitw_out */
0xf86721f4,
/* 0x07d5: i2c_bitr */
0x0137f000,
0x069a21f5,
0x03e8e7f1,
0xbb6721f4,
0xf56721f4,
0xf406c921,
0x42b60901,
0xef1bf401,
/* 0x0714: i2c_raise_scl_done */
0x00f840fc,
/* 0x0718: i2c_start */
0x06c921f5,
0xf50d11f4,
0xf406de21,
0x0ef40611,
/* 0x0729: i2c_start_rep */
0x0037f030,
0x069121f5,
0xf50137f0,
0xbb06ad21,
0x65b60076,
0x9450f904,
0x56bb0465,
0xfd50bd02,
0x50fc0475,
0x06e021f5,
0x06f321f5,
0xf40464b6,
0x21f51b11,
0x37f006cb,
0x7e21f500,
/* 0x0756: i2c_start_send */
0x37f01f11,
0xad21f500,
0x88e7f106,
0x6721f413,
0xf4013cf0,
/* 0x081a: i2c_bitr_done */
0x00f80131,
/* 0x081c: i2c_get_byte */
0xf00057f0,
/* 0x0822: i2c_get_byte_next */
0x54b60847,
0x0076bb01,
0xf90465b6,
0x04659450,
0xbd0256bb,
0x0475fd50,
0x21f550fc,
0x64b607d5,
0x2b11f404,
0xb60553fd,
0x1bf40142,
0x0137f0d8,
0xf50037f0,
0xf1069121,
0xf41388e7,
/* 0x0772: i2c_start_out */
0x00f86721,
/* 0x0774: i2c_stop */
0xf50037f0,
0xf0069121,
0x21f50037,
0xe7f106ad,
0x21f403e8,
0x0137f067,
0x069121f5,
0x1388e7f1,
0xf06721f4,
0x21f50137,
0xe7f106ad,
0x21f41388,
/* 0x07a7: i2c_bitw */
0xf500f867,
0xf106ad21,
0xf403e8e7,
0x76bb6721,
0x0465b600,
0x659450f9,
0x0256bb04,
0x75fd50bd,
0xf550fc04,
0xb606f321,
0x11f40464,
0x88e7f118,
0x6721f413,
0xf50037f0,
0xf1069121,
0xf41388e7,
/* 0x07e6: i2c_bitw_out */
0x00f86721,
/* 0x07e8: i2c_bitr */
0xf50137f0,
0xf106ad21,
0xf403e8e7,
0x76bb6721,
0x0465b600,
0x659450f9,
0x0256bb04,
0x75fd50bd,
0xf550fc04,
0xb606f321,
0x11f40464,
0xde21f51b,
0x0037f006,
0x069121f5,
0x1388e7f1,
0xf06721f4,
0x31f4013c,
/* 0x082d: i2c_bitr_done */
/* 0x082f: i2c_get_byte */
0xf000f801,
0x47f00057,
/* 0x0835: i2c_get_byte_next */
0x0154b608,
0xb60076bb,
0x50f90465,
0xbb046594,
0x50bd0256,
0xfc0475fd,
0x9421f550,
0xe821f550,
0x0464b607,
/* 0x086c: i2c_get_byte_done */
/* 0x086e: i2c_put_byte */
0x47f000f8,
/* 0x0871: i2c_put_byte_next */
0x0142b608,
0xbb3854ff,
0xfd2b11f4,
0x42b60553,
0xd81bf401,
0xbb0137f0,
0x65b60076,
0x9450f904,
0x56bb0465,
0xfd50bd02,
0x50fc0475,
0x07a721f5,
/* 0x087f: i2c_get_byte_done */
0xf80464b6,
/* 0x0881: i2c_put_byte */
0x0847f000,
/* 0x0884: i2c_put_byte_next */
0xff0142b6,
0x76bb3854,
0x0465b600,
0x659450f9,
0x0256bb04,
0x75fd50bd,
0xf550fc04,
0xb607a721,
0x11f40464,
0x0046b034,
0xbbd81bf4,
0x65b60076,
0x9450f904,
0x56bb0465,
0xfd50bd02,
0x50fc0475,
0x079421f5,
0x07e821f5,
0xf40464b6,
0x46b03411,
0xd81bf400,
0x76bb0f11,
0x0136b000,
0xf4061bf4,
/* 0x08da: i2c_put_byte_done */
0x00f80132,
/* 0x08dc: i2c_addr */
0xb60076bb,
0x50f90465,
0xbb046594,
0x50bd0256,
0xfc0475fd,
0xd521f550,
0x1821f550,
0x0464b607,
0xbb0f11f4,
0x36b00076,
0x061bf401,
/* 0x08c7: i2c_put_byte_done */
0xf80132f4,
/* 0x08c9: i2c_addr */
0x0076bb00,
0xe72911f4,
0xb6012ec3,
0x53fd0134,
0x0076bb05,
0xf90465b6,
0x04659450,
0xbd0256bb,
0x0475fd50,
0x21f550fc,
0x64b60705,
0x2911f404,
0x012ec3e7,
0xfd0134b6,
0x76bb0553,
0x0465b600,
0x659450f9,
0x0256bb04,
0x75fd50bd,
0xf550fc04,
0xb6086e21,
/* 0x090e: i2c_addr_done */
0x00f80464,
/* 0x0910: i2c_acquire_addr */
0xb6f8cec7,
0xe0b705e4,
0x00f8d014,
/* 0x091c: i2c_acquire */
0x091021f5,
0xf00421f4,
0x21f403d9,
/* 0x092b: i2c_release */
0xf500f833,
0xf4091021,
0xdaf00421,
0x64b60881,
/* 0x0921: i2c_addr_done */
/* 0x0923: i2c_acquire_addr */
0xc700f804,
0xe4b6f8ce,
0x14e0b705,
/* 0x092f: i2c_acquire */
0xf500f8d0,
0xf4092321,
0xd9f00421,
0x3321f403,
/* 0x093a: i2c_recv */
0x32f400f8,
0xf8c1c701,
0xb00214b6,
0x1ff52816,
0x13a0013a,
0x32980be8,
0xc013a000,
0x0031980b,
0xf90231f4,
0xf9e0f9d0,
0x0067f1d0,
0x0063f100,
0x01679210,
0xb60076bb,
0x50f90465,
0xbb046594,
0x50bd0256,
0xfc0475fd,
0x1c21f550,
0x0464b609,
0xd6b0d0fc,
0xb31bf500,
0x0057f000,
0xb60076bb,
0x50f90465,
0xbb046594,
0x50bd0256,
0xfc0475fd,
0xc921f550,
0x0464b608,
0x00d011f5,
0xbbe0c5c7,
/* 0x093e: i2c_release */
0x21f500f8,
0x21f40923,
0x03daf004,
0xf83321f4,
/* 0x094d: i2c_recv */
0x0132f400,
0xb6f8c1c7,
0x16b00214,
0x3a1ff528,
0xf413a001,
0x0032980c,
0x0ccc13a0,
0xf4003198,
0xd0f90231,
0xd0f9e0f9,
0x000067f1,
0x100063f1,
0xbb016792,
0x65b60076,
0x9450f904,
0x56bb0465,
0xfd50bd02,
0x50fc0475,
0x086e21f5,
0x092f21f5,
0xfc0464b6,
0x00d6b0d0,
0x00b31bf5,
0xbb0057f0,
0x65b60076,
0x9450f904,
0x56bb0465,
0xfd50bd02,
0x50fc0475,
0x08dc21f5,
0xf50464b6,
0xf000ad11,
0x76bb0157,
0xc700d011,
0x76bbe0c5,
0x0465b600,
0x659450f9,
0x0256bb04,
0x75fd50bd,
0xf550fc04,
0xb608c921,
0xb6088121,
0x11f50464,
0x76bb008a,
0x0465b600,
0x659450f9,
0x0256bb04,
0x75fd50bd,
0xf550fc04,
0xb6081c21,
0x11f40464,
0xe05bcb6a,
0xb60076bb,
0x50f90465,
0xbb046594,
0x50bd0256,
0xfc0475fd,
0x6121f550,
0x0464b607,
0xbd025bb9,
0x430ef474,
/* 0x0a40: i2c_recv_not_rd08 */
0xf401d6b0,
0x57f03d1b,
0xc921f500,
0x3311f408,
0xf5e0c5c7,
0xf4086e21,
0x57f02911,
0xc921f500,
0x1f11f408,
0xf5e0b5c7,
0xf4086e21,
0x21f51511,
0x74bd0761,
0xf408c5c7,
0x32f4091b,
0x030ef402,
/* 0x0a80: i2c_recv_not_wr08 */
/* 0x0a80: i2c_recv_done */
0xf5f8cec7,
0xfc092b21,
0xf4d0fce0,
0x7cb90a12,
0xf121f502,
/* 0x0a95: i2c_recv_exit */
/* 0x0a97: i2c_init */
0x57f000ad,
0x0076bb01,
0xf90465b6,
0x04659450,
0xbd0256bb,
0x0475fd50,
0x21f550fc,
0x64b608dc,
0x8a11f504,
0x0076bb00,
0xf90465b6,
0x04659450,
0xbd0256bb,
0x0475fd50,
0x21f550fc,
0x64b6082f,
0x6a11f404,
0xbbe05bcb,
0x65b60076,
0x9450f904,
0x56bb0465,
0xfd50bd02,
0x50fc0475,
0x077421f5,
0xb90464b6,
0x74bd025b,
/* 0x0a53: i2c_recv_not_rd08 */
0xb0430ef4,
0x1bf401d6,
0x0057f03d,
0x08dc21f5,
0xc73311f4,
0x21f5e0c5,
0x11f40881,
0x0057f029,
0x08dc21f5,
0xc71f11f4,
0x21f5e0b5,
0x11f40881,
0x7421f515,
0xc774bd07,
0x1bf408c5,
0x0232f409,
/* 0x0a93: i2c_recv_not_wr08 */
/* 0x0a93: i2c_recv_done */
0xc7030ef4,
0x21f5f8ce,
0xe0fc093e,
0x12f4d0fc,
0x027cb90a,
0x02f121f5,
/* 0x0aa8: i2c_recv_exit */
/* 0x0aaa: i2c_init */
0x00f800f8,
/* 0x0aac: test_recv */
0x05d817f1,
0xb60011cf,
0x07f10110,
0x01d005d8,
0xf104bd00,
0xf1d900e7,
0xf5134fe3,
0xf8022321,
/* 0x0acd: test_init */
0x00e7f100,
0x2321f508,
/* 0x0ad7: idle_recv */
0xf800f802,
/* 0x0a99: test_recv */
0xd817f100,
0x0011cf05,
0xf10110b6,
0xd005d807,
0x04bd0001,
0xd900e7f1,
0x134fe3f1,
0x022321f5,
/* 0x0aba: test_init */
0xe7f100f8,
0x21f50800,
0x00f80223,
/* 0x0ac4: idle_recv */
/* 0x0ac6: idle */
0x31f400f8,
0xd417f100,
0x0011cf05,
0xf10110b6,
0xd005d407,
0x04bd0001,
/* 0x0adc: idle_loop */
0xf45817f0,
/* 0x0ae2: idle_proc */
/* 0x0ae2: idle_proc_exec */
0x10f90232,
0xf5021eb9,
0xfc02fa21,
0x0911f410,
0xf40231f4,
/* 0x0af6: idle_proc_next */
0x10b6ef0e,
0x061fb858,
0xf4e61bf4,
0x28f4dd02,
0xc10ef400,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
0x00000000,
/* 0x0ad9: idle */
0x0031f400,
0x05d417f1,
0xb60011cf,
0x07f10110,
0x01d005d4,
/* 0x0aef: idle_loop */
0xf004bd00,
0x32f45817,
/* 0x0af5: idle_proc */
/* 0x0af5: idle_proc_exec */
0xb910f902,
0x21f5021e,
0x10fc02fa,
0xf40911f4,
0x0ef40231,
/* 0x0b09: idle_proc_next */
0x5810b6ef,
0xf4061fb8,
0x02f4e61b,
0x0028f4dd,
0x00c10ef4,
0x00000000,
0x00000000,
0x00000000,
......
drivers/gpu/drm/nouveau/core/subdev/pwr/fuc/os.h
View file @ 7f4b9616
......@@ -18,6 +18,10 @@
#define MEMX_MSG_INFO 0
#define MEMX_MSG_EXEC 1
/* MEMX: info types */
#define MEMX_INFO_DATA 0
#define MEMX_INFO_TRAIN 1
/* MEMX: script opcode definitions */
#define MEMX_ENTER 1
#define MEMX_LEAVE 2
......@@ -25,6 +29,7 @@
#define MEMX_WAIT 4
#define MEMX_DELAY 5
#define MEMX_VBLANK 6
#define MEMX_TRAIN 7
/* I2C_: message identifiers */
#define I2C__MSG_RD08 0
......
drivers/gpu/drm/nouveau/core/subdev/pwr/memx.c
View file @ 7f4b9616
......@@ -47,7 +47,8 @@ nouveau_memx_init(struct nouveau_pwr *ppwr, struct nouveau_memx **pmemx)
u32 reply[2];
int ret;
ret = ppwr->message(ppwr, reply, PROC_MEMX, MEMX_MSG_INFO, 0, 0);
ret = ppwr->message(ppwr, reply, PROC_MEMX, MEMX_MSG_INFO,
MEMX_INFO_DATA, 0);
if (ret)
return ret;
......@@ -151,6 +152,38 @@ nouveau_memx_wait_vblank(struct nouveau_memx *memx)
memx_out(memx); /* fuc can't handle multiple */
}
void
nouveau_memx_train(struct nouveau_memx *memx)
{
nv_debug(memx->ppwr, " MEM TRAIN\n");
memx_cmd(memx, MEMX_TRAIN, 0, NULL);
}
int
nouveau_memx_train_result(struct nouveau_pwr *ppwr, u32 *res, int rsize)
{
u32 reply[2], base, size, i;
int ret;
ret = ppwr->message(ppwr, reply, PROC_MEMX, MEMX_MSG_INFO,
MEMX_INFO_TRAIN, 0);
if (ret)
return ret;
base = reply[0];
size = reply[1] >> 2;
if (size > rsize)
return -ENOMEM;
/* read the packet */
nv_wr32(ppwr, 0x10a1c0, 0x02000000 | base);
for (i = 0; i < size; i++)
res[i] = nv_rd32(ppwr, 0x10a1c4);
return 0;
}
void
nouveau_memx_block(struct nouveau_memx *memx)
{
......
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