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Commit 80981cbb authored by Dave Jones's avatar Dave Jones
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Merge tetrachloride.(none):/mnt/raid/src/kernel/2.5/bk-linus 

into tetrachloride.(none):/mnt/raid/src/kernel/2.5/agpgart
parents 2864cffb 62ffabd9
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Showing with 624 additions and 289 deletions
drivers/char/agp/Kconfig
View file @ 80981cbb
......@@ -29,7 +29,7 @@ config AGP_ALI
tristate "ALI chipset support"
depends on AGP && X86 && !X86_64
---help---
This option gives you AGP support for the GLX component of the
This option gives you AGP support for the GLX component of
XFree86 4.x on the following ALi chipsets. The supported chipsets
include M1541, M1621, M1631, M1632, M1641,M1647,and M1651.
For the ALi-chipset question, ALi suggests you refer to
......@@ -47,25 +47,27 @@ config AGP_AMD
tristate "AMD Irongate, 761, and 762 chipset support"
depends on AGP && X86 && !X86_64
help
This option gives you AGP support for the GLX component of the
This option gives you AGP support for the GLX component of
XFree86 4.x on AMD Irongate, 761, and 762 chipsets.
You should say Y here if you use XFree86 3.3.6 or 4.x and want to
use GLX or DRI. If unsure, say N.
config AGP_AMD_8151
tristate "AMD 8151 chipset support"
tristate "AMD Opteron/Athlon64 on-CPU GART support"
depends on AGP && X86
default GART_IOMMU
help
Say Y here to support the AMD 8151 AGP bridge and the builtin
GART on the AMD Athlon64/Opteron ("Hammer") CPUs.
This option gives you AGP support for the GLX component of
XFree86 4.x using the on-CPU AGP bridge of the AMD Athlon64/Opteron CPUs.
You should say Y here if you use XFree86 3.3.6 or 4.x and want to
use GLX or DRI. If unsure, say N
config AGP_INTEL
tristate "Intel 440LX/BX/GX, I8xx and E7x05 chipset support"
depends on AGP && X86 && !X86_64
help
This option gives you AGP support for the GLX component of the
This option gives you AGP support for the GLX component of
XFree86 4.x on Intel 440LX/BX/GX, 815, 820, 830, 840, 845, 850, 860
E7205 and E7505 chipsets and full support for the 810, 815, 830M, 845G,
852GM, 855GM and 865G integrated graphics chipsets.
......@@ -78,7 +80,7 @@ config AGP_NVIDIA
tristate "NVIDIA nForce/nForce2 chipset support"
depends on AGP && X86 && !X86_64
help
This option gives you AGP support for the GLX component of the
This option gives you AGP support for the GLX component of
XFree86 4.x on the following NVIDIA chipsets. The supported chipsets
include nForce and nForce2
......@@ -86,9 +88,8 @@ config AGP_SIS
tristate "SiS chipset support"
depends on AGP && X86 && !X86_64
help
This option gives you AGP support for the GLX component of the "soon
to be released" XFree86 4.x on Silicon Integrated Systems [SiS]
chipsets.
This option gives you AGP support for the GLX component of
XFree86 4.x on Silicon Integrated Systems [SiS] chipsets.
Note that 5591/5592 AGP chipsets are NOT supported.
......@@ -106,7 +107,7 @@ config AGP_VIA
tristate "VIA chipset support"
depends on AGP && X86 && !X86_64
help
This option gives you AGP support for the GLX component of the
This option gives you AGP support for the GLX component of
XFree86 4.x on VIA MPV3/Apollo Pro chipsets.
You should say Y here if you use XFree86 3.3.6 or 4.x and want to
......@@ -131,3 +132,10 @@ config AGP_ALPHA_CORE
depends on AGP && (ALPHA_GENERIC || ALPHA_TITAN || ALPHA_MARVEL)
default AGP
config AGP_UNINORTH
tristate "Apple UniNorth AGP support"
depends on AGP && ALL_PPC
help
This option gives you AGP support for Apple machines with a
UniNorth bridge.
drivers/char/agp/Makefile
View file @ 80981cbb
......@@ -11,5 +11,6 @@ obj-$(CONFIG_AGP_INTEL) += intel-agp.o
obj-$(CONFIG_AGP_NVIDIA) += nvidia-agp.o
obj-$(CONFIG_AGP_SIS) += sis-agp.o
obj-$(CONFIG_AGP_SWORKS) += sworks-agp.o
obj-$(CONFIG_AGP_UNINORTH) += uninorth-agp.o
obj-$(CONFIG_AGP_VIA) += via-agp.o
drivers/char/agp/agp.h
View file @ 80981cbb
......@@ -113,8 +113,6 @@ struct agp_bridge_driver {
void (*free_by_type)(agp_memory *);
void *(*agp_alloc_page)(void);
void (*agp_destroy_page)(void *);
int (*suspend)(void);
void (*resume)(void);
};
struct agp_bridge_data {
......@@ -384,16 +382,14 @@ agp_memory *agp_generic_alloc_by_type(size_t page_count, int type);
void agp_generic_free_by_type(agp_memory * curr);
void *agp_generic_alloc_page(void);
void agp_generic_destroy_page(void *addr);
int agp_generic_suspend(void);
void agp_generic_resume(void);
void agp_free_key(int key);
int agp_num_entries(void);
u32 agp_collect_device_status(u32 mode, u32 command);
void agp_device_command(u32 command, int agp_v3);
int agp_3_0_enable(struct agp_bridge_data *bridge, u32 mode);
int agp_3_5_enable(struct agp_bridge_data *bridge, u32 mode);
int agp_3_5_enable(struct agp_bridge_data *bridge);
void global_cache_flush(void);
void get_agp_version(struct agp_bridge_data *bridge);
unsigned long agp_generic_mask_memory(unsigned long addr, int type);
/* Standard agp registers */
#define AGPSTAT 0x4
......
drivers/char/agp/ali-agp.c
View file @ 80981cbb
......@@ -114,12 +114,6 @@ static int ali_configure(void)
return 0;
}
static unsigned long ali_mask_memory(unsigned long addr, int type)
{
/* Memory type is ignored */
return addr | agp_bridge->driver->masks[0].mask;
}
static void m1541_cache_flush(void)
{
......@@ -180,10 +174,6 @@ static void m1541_destroy_page(void * addr)
/* Setup function */
static struct gatt_mask ali_generic_masks[] =
{
{.mask = 0x00000000, .type = 0}
};
static struct aper_size_info_32 ali_generic_sizes[7] =
{
......@@ -198,7 +188,6 @@ static struct aper_size_info_32 ali_generic_sizes[7] =
struct agp_bridge_driver ali_generic_bridge = {
.owner = THIS_MODULE,
.masks = ali_generic_masks,
.aperture_sizes = ali_generic_sizes,
.size_type = U32_APER_SIZE,
.num_aperture_sizes = 7,
......@@ -206,7 +195,8 @@ struct agp_bridge_driver ali_generic_bridge = {
.fetch_size = ali_fetch_size,
.cleanup = ali_cleanup,
.tlb_flush = ali_tlbflush,
.mask_memory = ali_mask_memory,
.mask_memory = agp_generic_mask_memory,
.masks = NULL,
.agp_enable = agp_generic_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = agp_generic_create_gatt_table,
......@@ -217,13 +207,10 @@ struct agp_bridge_driver ali_generic_bridge = {
.free_by_type = agp_generic_free_by_type,
.agp_alloc_page = agp_generic_alloc_page,
.agp_destroy_page = ali_destroy_page,
.suspend = agp_generic_suspend,
.resume = agp_generic_resume,
};
struct agp_bridge_driver ali_m1541_bridge = {
.owner = THIS_MODULE,
.masks = ali_generic_masks,
.aperture_sizes = ali_generic_sizes,
.size_type = U32_APER_SIZE,
.num_aperture_sizes = 7,
......@@ -231,7 +218,8 @@ struct agp_bridge_driver ali_m1541_bridge = {
.fetch_size = ali_fetch_size,
.cleanup = ali_cleanup,
.tlb_flush = ali_tlbflush,
.mask_memory = ali_mask_memory,
.mask_memory = agp_generic_mask_memory,
.masks = NULL,
.agp_enable = agp_generic_enable,
.cache_flush = m1541_cache_flush,
.create_gatt_table = agp_generic_create_gatt_table,
......@@ -242,8 +230,6 @@ struct agp_bridge_driver ali_m1541_bridge = {
.free_by_type = agp_generic_free_by_type,
.agp_alloc_page = m1541_alloc_page,
.agp_destroy_page = m1541_destroy_page,
.suspend = agp_generic_suspend,
.resume = agp_generic_resume,
};
......@@ -391,7 +377,7 @@ static struct pci_device_id agp_ali_pci_table[] __initdata = {
MODULE_DEVICE_TABLE(pci, agp_ali_pci_table);
static struct __initdata pci_driver agp_ali_pci_driver = {
static struct pci_driver agp_ali_pci_driver = {
.name = "agpgart-ali",
.id_table = agp_ali_pci_table,
.probe = agp_ali_probe,
......
drivers/char/agp/alpha-agp.c
View file @ 80981cbb
......@@ -38,10 +38,6 @@ static struct aper_size_info_fixed alpha_core_agp_sizes[] =
{ 0, 0, 0 }, /* filled in by alpha_core_agp_setup */
};
static struct gatt_mask alpha_core_agp_masks[] = {
{ .mask = 0, .type = 0 },
};
struct vm_operations_struct alpha_core_agp_vm_ops = {
.nopage = alpha_core_agp_vm_nopage,
};
......@@ -78,12 +74,6 @@ static void alpha_core_agp_tlbflush(agp_memory *mem)
alpha_mv.mv_pci_tbi(agp->hose, 0, -1);
}
static unsigned long alpha_core_agp_mask_memory(unsigned long addr, int type)
{
/* Memory type is ignored */
return addr | agp_bridge->driver->masks[0].mask;
}
static void alpha_core_agp_enable(u32 mode)
{
alpha_agp_info *agp = agp_bridge->dev_private_data;
......@@ -127,7 +117,6 @@ static int alpha_core_agp_remove_memory(agp_memory *mem, off_t pg_start,
struct agp_bridge_driver alpha_core_agp_driver = {
.owner = THIS_MODULE,
.masks = alpha_core_agp_masks,
.aperture_sizes = aper_size,
.current_size = aper_size, /* only one entry */
.size_type = FIXED_APER_SIZE,
......@@ -136,7 +125,8 @@ struct agp_bridge_driver alpha_core_agp_driver = {
.fetch_size = alpha_core_agp_fetch_size,
.cleanup = alpha_core_agp_cleanup,
.tlb_flush = alpha_core_agp_tlbflush,
.mask_memory = alpha_core_agp_mask_memory,
.mask_memory = agp_generic_mask_memory,
.masks = NULL,
.agp_enable = alpha_core_agp_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = alpha_core_agp_nop,
......
drivers/char/agp/amd-k7-agp.c
View file @ 80981cbb
......@@ -29,9 +29,9 @@ static int amd_create_page_map(struct amd_page_map *page_map)
int i;
page_map->real = (unsigned long *) __get_free_page(GFP_KERNEL);
if (page_map->real == NULL) {
if (page_map->real == NULL)
return -ENOMEM;
}
SetPageReserved(virt_to_page(page_map->real));
global_cache_flush();
page_map->remapped = ioremap_nocache(virt_to_phys(page_map->real),
......@@ -44,9 +44,8 @@ static int amd_create_page_map(struct amd_page_map *page_map)
}
global_cache_flush();
for(i = 0; i < PAGE_SIZE / sizeof(unsigned long); i++) {
for (i = 0; i < PAGE_SIZE / sizeof(unsigned long); i++)
page_map->remapped[i] = agp_bridge->scratch_page;
}
return 0;
}
......@@ -65,12 +64,11 @@ static void amd_free_gatt_pages(void)
struct amd_page_map *entry;
tables = amd_irongate_private.gatt_pages;
for(i = 0; i < amd_irongate_private.num_tables; i++) {
for (i = 0; i < amd_irongate_private.num_tables; i++) {
entry = tables[i];
if (entry != NULL) {
if (entry->real != NULL) {
if (entry->real != NULL)
amd_free_page_map(entry);
}
kfree(entry);
}
}
......@@ -87,25 +85,27 @@ static int amd_create_gatt_pages(int nr_tables)
tables = kmalloc((nr_tables + 1) * sizeof(struct amd_page_map *),
GFP_KERNEL);
if (tables == NULL) {
if (tables == NULL)
return -ENOMEM;
}
memset(tables, 0, sizeof(struct amd_page_map *) * (nr_tables + 1));
memset (tables, 0, sizeof(struct amd_page_map *) * (nr_tables + 1));
for (i = 0; i < nr_tables; i++) {
entry = kmalloc(sizeof(struct amd_page_map), GFP_KERNEL);
if (entry == NULL) {
retval = -ENOMEM;
break;
}
memset(entry, 0, sizeof(struct amd_page_map));
memset (entry, 0, sizeof(struct amd_page_map));
tables[i] = entry;
retval = amd_create_page_map(entry);
if (retval != 0) break;
if (retval != 0)
break;
}
amd_irongate_private.num_tables = nr_tables;
amd_irongate_private.gatt_pages = tables;
if (retval != 0) amd_free_gatt_pages();
if (retval != 0)
amd_free_gatt_pages();
return retval;
}
......@@ -132,9 +132,8 @@ static int amd_create_gatt_table(void)
value = A_SIZE_LVL2(agp_bridge->current_size);
retval = amd_create_page_map(&page_dir);
if (retval != 0) {
if (retval != 0)
return retval;
}
retval = amd_create_gatt_pages(value->num_entries / 1024);
if (retval != 0) {
......@@ -156,7 +155,7 @@ static int amd_create_gatt_table(void)
agp_bridge->gart_bus_addr = addr;
/* Calculate the agp offset */
for(i = 0; i < value->num_entries / 1024; i++, addr += 0x00400000) {
for (i = 0; i < value->num_entries / 1024; i++, addr += 0x00400000) {
page_dir.remapped[GET_PAGE_DIR_OFF(addr)] =
virt_to_phys(amd_irongate_private.gatt_pages[i]->real);
page_dir.remapped[GET_PAGE_DIR_OFF(addr)] |= 0x00000001;
......@@ -266,20 +265,12 @@ static void amd_irongate_cleanup(void)
* entries.
*/
static void amd_irongate_tlbflush(agp_memory * temp)
static void amd_irongate_tlbflush(agp_memory *temp)
{
OUTREG32(amd_irongate_private.registers, AMD_TLBFLUSH, 0x00000001);
}
static unsigned long amd_irongate_mask_memory(unsigned long addr, int type)
{
/* Only type 0 is supported by the irongate */
return addr | agp_bridge->driver->masks[0].mask;
}
static int amd_insert_memory(agp_memory * mem,
off_t pg_start, int type)
static int amd_insert_memory(agp_memory * mem, off_t pg_start, int type)
{
int i, j, num_entries;
unsigned long *cur_gatt;
......@@ -287,12 +278,11 @@ static int amd_insert_memory(agp_memory * mem,
num_entries = A_SIZE_LVL2(agp_bridge->current_size)->num_entries;
if (type != 0 || mem->type != 0) {
if (type != 0 || mem->type != 0)
return -EINVAL;
}
if ((pg_start + mem->page_count) > num_entries) {
if ((pg_start + mem->page_count) > num_entries)
return -EINVAL;
}
j = pg_start;
while (j < (pg_start + mem->page_count)) {
......@@ -312,22 +302,21 @@ static int amd_insert_memory(agp_memory * mem,
addr = (j * PAGE_SIZE) + agp_bridge->gart_bus_addr;
cur_gatt = GET_GATT(addr);
cur_gatt[GET_GATT_OFF(addr)] =
amd_irongate_mask_memory(mem->memory[i], mem->type);
agp_generic_mask_memory(mem->memory[i], mem->type);
}
amd_irongate_tlbflush(mem);
return 0;
}
static int amd_remove_memory(agp_memory * mem, off_t pg_start,
int type)
static int amd_remove_memory(agp_memory *mem, off_t pg_start, int type)
{
int i;
unsigned long *cur_gatt;
unsigned long addr;
if (type != 0 || mem->type != 0) {
if (type != 0 || mem->type != 0)
return -EINVAL;
}
for (i = pg_start; i < (mem->page_count + pg_start); i++) {
addr = (i * PAGE_SIZE) + agp_bridge->gart_bus_addr;
cur_gatt = GET_GATT(addr);
......@@ -352,12 +341,11 @@ static struct aper_size_info_lvl2 amd_irongate_sizes[7] =
static struct gatt_mask amd_irongate_masks[] =
{
{.mask = 0x00000001, .type = 0}
{.mask = 1, .type = 0}
};
struct agp_bridge_driver amd_irongate_driver = {
.owner = THIS_MODULE,
.masks = amd_irongate_masks,
.aperture_sizes = amd_irongate_sizes,
.size_type = LVL2_APER_SIZE,
.num_aperture_sizes = 7,
......@@ -365,7 +353,8 @@ struct agp_bridge_driver amd_irongate_driver = {
.fetch_size = amd_irongate_fetch_size,
.cleanup = amd_irongate_cleanup,
.tlb_flush = amd_irongate_tlbflush,
.mask_memory = amd_irongate_mask_memory,
.mask_memory = agp_generic_mask_memory,
.masks = amd_irongate_masks,
.agp_enable = agp_generic_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = amd_create_gatt_table,
......@@ -376,8 +365,6 @@ struct agp_bridge_driver amd_irongate_driver = {
.free_by_type = agp_generic_free_by_type,
.agp_alloc_page = agp_generic_alloc_page,
.agp_destroy_page = agp_generic_destroy_page,
.suspend = agp_generic_suspend,
.resume = agp_generic_resume,
};
struct agp_device_ids amd_agp_device_ids[] __initdata =
......@@ -469,7 +456,7 @@ static struct pci_device_id agp_amdk7_pci_table[] __initdata = {
MODULE_DEVICE_TABLE(pci, agp_amdk7_pci_table);
static struct __initdata pci_driver agp_amdk7_pci_driver = {
static struct pci_driver agp_amdk7_pci_driver = {
.name = "agpgart-amdk7",
.id_table = agp_amdk7_pci_table,
.probe = agp_amdk7_probe,
......
drivers/char/agp/amd-k8-agp.c
View file @ 80981cbb
......@@ -212,20 +212,13 @@ static void amd_8151_cleanup(void)
}
static unsigned long amd_8151_mask_memory(unsigned long addr, int type)
{
return addr | agp_bridge->driver->masks[0].mask;
}
static struct gatt_mask amd_8151_masks[] =
{
{.mask = 0x00000001, .type = 0}
{ .mask = 1, .type = 0 }
};
struct agp_bridge_driver amd_8151_driver = {
.owner = THIS_MODULE,
.masks = amd_8151_masks,
.aperture_sizes = amd_8151_sizes,
.size_type = U32_APER_SIZE,
.num_aperture_sizes = 7,
......@@ -233,7 +226,8 @@ struct agp_bridge_driver amd_8151_driver = {
.fetch_size = amd_x86_64_fetch_size,
.cleanup = amd_8151_cleanup,
.tlb_flush = amd_x86_64_tlbflush,
.mask_memory = amd_8151_mask_memory,
.mask_memory = agp_generic_mask_memory,
.masks = amd_8151_masks,
.agp_enable = agp_generic_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = agp_generic_create_gatt_table,
......@@ -244,8 +238,6 @@ struct agp_bridge_driver amd_8151_driver = {
.free_by_type = agp_generic_free_by_type,
.agp_alloc_page = agp_generic_alloc_page,
.agp_destroy_page = agp_generic_destroy_page,
.suspend = agp_generic_suspend,
.resume = agp_generic_resume,
};
static int __init agp_amdk8_probe(struct pci_dev *pdev,
......@@ -268,7 +260,9 @@ static int __init agp_amdk8_probe(struct pci_dev *pdev,
if (!bridge)
return -ENOMEM;
/* Assume here we have an 8151. (Later this assumption will be fixed). */
if (pdev->vendor == PCI_VENDOR_ID_AMD &&
pdev->device == PCI_DEVICE_ID_AMD_8151_0) {
pci_read_config_byte(pdev, PCI_REVISION_ID, &rev_id);
switch (rev_id) {
case 0x01: revstring="A0";
......@@ -293,6 +287,7 @@ static int __init agp_amdk8_probe(struct pci_dev *pdev,
bridge->major_version = 3;
bridge->minor_version = 0;
}
}
bridge->driver = &amd_8151_driver;
bridge->dev = pdev;
......@@ -338,12 +333,20 @@ static struct pci_device_id agp_amdk8_pci_table[] __initdata = {
.subvendor = PCI_ANY_ID,
.subdevice = PCI_ANY_ID,
},
{
.class = (PCI_CLASS_BRIDGE_HOST << 8),
.class_mask = ~0,
.vendor = PCI_VENDOR_ID_VIA,
.device = PCI_DEVICE_ID_VIA_K8T400M_0,
.subvendor = PCI_ANY_ID,
.subdevice = PCI_ANY_ID,
},
{ }
};
MODULE_DEVICE_TABLE(pci, agp_amdk8_pci_table);
static struct __initdata pci_driver agp_amdk8_pci_driver = {
static struct pci_driver agp_amdk8_pci_driver = {
.name = "agpgart-amd-k8",
.id_table = agp_amdk8_pci_table,
.probe = agp_amdk8_probe,
......
drivers/char/agp/backend.c
View file @ 80981cbb
......@@ -210,19 +210,6 @@ static void agp_backend_cleanup(struct agp_bridge_data *bridge)
phys_to_virt(bridge->scratch_page_real));
}
static int agp_power(struct pm_dev *dev, pm_request_t rq, void *data)
{
switch(rq) {
case PM_SUSPEND:
return agp_bridge->driver->suspend();
case PM_RESUME:
agp_bridge->driver->resume();
return 0;
}
return 0;
}
static const drm_agp_t drm_agp = {
&agp_free_memory,
&agp_allocate_memory,
......@@ -253,34 +240,39 @@ int agp_add_bridge(struct agp_bridge_data *bridge)
int error;
if (!bridge->dev) {
printk(KERN_DEBUG PFX "Erk, registering with no pci_dev!\n");
printk (KERN_DEBUG PFX "Erk, registering with no pci_dev!\n");
return -EINVAL;
}
if (agp_count) {
printk(KERN_DEBUG PFX
printk (KERN_INFO PFX
"Only one agpgart device currently supported.\n");
return -ENODEV;
}
/* Grab reference on the chipset driver. */
if (!try_module_get(bridge->driver->owner))
if (!try_module_get(bridge->driver->owner)) {
printk (KERN_INFO PFX "Couldn't lock chipset driver.\n");
return -EINVAL;
}
bridge->type = SUPPORTED;
error = agp_backend_initialize(agp_bridge);
if (error)
if (error) {
printk (KERN_INFO PFX "agp_backend_initialize() failed.\n");
goto err_out;
}
error = agp_frontend_initialize();
if (error)
if (error) {
printk (KERN_INFO PFX "agp_frontend_initialize() failed.\n");
goto frontend_err;
}
/* FIXME: What to do with this? */
inter_module_register("drm_agp", THIS_MODULE, &drm_agp);
pm_register(PM_PCI_DEV, PM_PCI_ID(bridge->dev), agp_power);
agp_count++;
return 0;
......@@ -297,7 +289,6 @@ EXPORT_SYMBOL_GPL(agp_add_bridge);
void agp_remove_bridge(struct agp_bridge_data *bridge)
{
bridge->type = NOT_SUPPORTED;
pm_unregister_all(agp_power);
agp_frontend_cleanup();
agp_backend_cleanup(bridge);
inter_module_unregister("drm_agp");
......
drivers/char/agp/generic.c
View file @ 80981cbb
......@@ -419,7 +419,35 @@ static void agp_v3_parse_one(u32 *mode, u32 *cmd, u32 *tmp)
if (!((*cmd & AGPSTAT_FW) && (*tmp & AGPSTAT_FW) && (*mode & AGPSTAT_FW)))
*cmd &= ~AGPSTAT_FW;
/* Set speed. */
/*
* Set speed.
* Check for invalid speeds. This can happen when applications
* written before the AGP 3.0 standard pass AGP2.x modes to AGP3 hardware
*/
if (*mode & AGPSTAT_MODE_3_0) {
/*
* Caller hasn't a clue what its doing. We are in 3.0 mode,
* have been passed a 3.0 mode, but with 2.x speed bits set.
* AGP2.x 4x -> AGP3.0 4x.
*/
if (*mode & AGPSTAT2_4X) {
printk (KERN_INFO PFX "%s passes broken AGP3 flags (%x). Fixed.\n",
current->comm, *mode);
*mode &= ~AGPSTAT2_4X;
*mode |= AGPSTAT3_4X;
}
} else {
/*
* The caller doesn't know what they are doing. We are in 3.0 mode,
* but have been passed an AGP 2.x mode.
* Convert AGP 1x,2x,4x -> AGP 3.0 4x.
*/
printk (KERN_INFO PFX "%s passes broken AGP2 flags (%x) in AGP3 mode. Fixed.\n",
current->comm, *mode);
*mode &= ~(AGPSTAT2_4X | AGPSTAT2_2X | AGPSTAT2_1X);
*mode |= AGPSTAT3_4X;
}
if (!((*cmd & AGPSTAT3_8X) && (*tmp & AGPSTAT3_8X) && (*mode & AGPSTAT3_8X)))
*cmd &= ~AGPSTAT3_8X;
......@@ -428,9 +456,9 @@ static void agp_v3_parse_one(u32 *mode, u32 *cmd, u32 *tmp)
/* Clear out unwanted bits. */
if (*cmd & AGPSTAT3_8X)
*cmd *= ~(AGPSTAT3_4X | AGPSTAT3_RSVD);
*cmd = ~(AGPSTAT3_4X | AGPSTAT3_RSVD);
if (*cmd & AGPSTAT3_4X)
*cmd *= ~(AGPSTAT3_8X | AGPSTAT3_RSVD);
*cmd = ~(AGPSTAT3_8X | AGPSTAT3_RSVD);
}
//FIXME: This doesn't smell right.
......@@ -539,7 +567,7 @@ void agp_generic_enable(u32 mode)
if (agp3 & AGPSTAT_MODE_3_0) {
/* If we have 3.5, we can do the isoch stuff. */
if (agp_bridge->minor_version >= 5)
agp_3_5_enable(agp_bridge, mode);
agp_3_5_enable(agp_bridge);
agp_device_command(command, TRUE);
return;
} else {
......@@ -671,20 +699,6 @@ int agp_generic_create_gatt_table(void)
}
EXPORT_SYMBOL(agp_generic_create_gatt_table);
int agp_generic_suspend(void)
{
return 0;
}
EXPORT_SYMBOL(agp_generic_suspend);
void agp_generic_resume(void)
{
return;
}
EXPORT_SYMBOL(agp_generic_resume);
int agp_generic_free_gatt_table(void)
{
int page_order;
......@@ -922,3 +936,13 @@ void global_cache_flush(void)
}
EXPORT_SYMBOL(global_cache_flush);
unsigned long agp_generic_mask_memory(unsigned long addr, int type)
{
/* memory type is ignored in the generic routine */
if (agp_bridge->driver->masks)
return addr | agp_bridge->driver->masks[0].mask;
else
return addr;
}
EXPORT_SYMBOL(agp_generic_mask_memory);
drivers/char/agp/hp-agp.c
View file @ 80981cbb
......@@ -330,13 +330,13 @@ static unsigned long hp_zx1_mask_memory(unsigned long addr, int type)
struct agp_bridge_driver hp_zx1_driver = {
.owner = THIS_MODULE,
.masks = hp_zx1_masks,
.size_type = FIXED_APER_SIZE,
.configure = hp_zx1_configure,
.fetch_size = hp_zx1_fetch_size,
.cleanup = hp_zx1_cleanup,
.tlb_flush = hp_zx1_tlbflush,
.mask_memory = hp_zx1_mask_memory,
.masks = hp_zx1_masks,
.agp_enable = agp_generic_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = hp_zx1_create_gatt_table,
......@@ -400,7 +400,7 @@ static struct pci_device_id agp_hp_pci_table[] __initdata = {
MODULE_DEVICE_TABLE(pci, agp_hp_pci_table);
static struct __initdata pci_driver agp_hp_pci_driver = {
static struct pci_driver agp_hp_pci_driver = {
.name = "agpgart-hp",
.id_table = agp_hp_pci_table,
.probe = agp_hp_probe,
......
drivers/char/agp/i460-agp.c
View file @ 80981cbb
......@@ -525,7 +525,6 @@ static unsigned long i460_mask_memory (unsigned long addr, int type)
struct agp_bridge_driver intel_i460_driver = {
.owner = THIS_MODULE,
.masks = i460_masks,
.aperture_sizes = i460_sizes,
.size_type = U8_APER_SIZE,
.num_aperture_sizes = 3,
......@@ -534,6 +533,7 @@ struct agp_bridge_driver intel_i460_driver = {
.cleanup = i460_cleanup,
.tlb_flush = i460_tlb_flush,
.mask_memory = i460_mask_memory,
.masks = i460_masks,
.agp_enable = agp_generic_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = i460_create_gatt_table,
......@@ -551,8 +551,6 @@ struct agp_bridge_driver intel_i460_driver = {
#endif
.alloc_by_type = agp_generic_alloc_by_type,
.free_by_type = agp_generic_free_by_type,
.suspend = agp_generic_suspend,
.resume = agp_generic_resume,
.cant_use_aperture = 1,
};
......@@ -600,7 +598,7 @@ static struct pci_device_id agp_intel_i460_pci_table[] __initdata = {
MODULE_DEVICE_TABLE(pci, agp_intel_i460_pci_table);
static struct __initdata pci_driver agp_intel_i460_pci_driver = {
static struct pci_driver agp_intel_i460_pci_driver = {
.name = "agpgart-intel-i460",
.id_table = agp_intel_i460_pci_table,
.probe = agp_intel_i460_probe,
......
drivers/char/agp/intel-agp.c
View file @ 80981cbb
......@@ -782,11 +782,6 @@ static int intel_845_configure(void)
return 0;
}
static void intel_845_resume(void)
{
intel_845_configure();
}
static int intel_850_configure(void)
{
u32 temp;
......@@ -902,17 +897,6 @@ static int intel_7505_configure(void)
return 0;
}
static unsigned long intel_mask_memory(unsigned long addr, int type)
{
/* Memory type is ignored */
return addr | agp_bridge->driver->masks[0].mask;
}
static void intel_resume(void)
{
intel_configure();
}
/* Setup function */
static struct gatt_mask intel_generic_masks[] =
{
......@@ -957,7 +941,6 @@ static struct aper_size_info_8 intel_830mp_sizes[4] =
struct agp_bridge_driver intel_generic_driver = {
.owner = THIS_MODULE,
.masks = intel_generic_masks,
.aperture_sizes = intel_generic_sizes,
.size_type = U16_APER_SIZE,
.num_aperture_sizes = 7,
......@@ -965,7 +948,8 @@ struct agp_bridge_driver intel_generic_driver = {
.fetch_size = intel_fetch_size,
.cleanup = intel_cleanup,
.tlb_flush = intel_tlbflush,
.mask_memory = intel_mask_memory,
.mask_memory = agp_generic_mask_memory,
.masks = NULL,
.agp_enable = agp_generic_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = agp_generic_create_gatt_table,
......@@ -976,13 +960,10 @@ struct agp_bridge_driver intel_generic_driver = {
.free_by_type = agp_generic_free_by_type,
.agp_alloc_page = agp_generic_alloc_page,
.agp_destroy_page = agp_generic_destroy_page,
.suspend = agp_generic_suspend,
.resume = intel_resume,
};
struct agp_bridge_driver intel_810_driver = {
.owner = THIS_MODULE,
.masks = intel_i810_masks,
.aperture_sizes = intel_i810_sizes,
.size_type = FIXED_APER_SIZE,
.num_aperture_sizes = 2,
......@@ -992,6 +973,7 @@ struct agp_bridge_driver intel_810_driver = {
.cleanup = intel_i810_cleanup,
.tlb_flush = intel_i810_tlbflush,
.mask_memory = intel_i810_mask_memory,
.masks = intel_i810_masks,
.agp_enable = intel_i810_agp_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = agp_generic_create_gatt_table,
......@@ -1002,14 +984,11 @@ struct agp_bridge_driver intel_810_driver = {
.free_by_type = intel_i810_free_by_type,
.agp_alloc_page = agp_generic_alloc_page,
.agp_destroy_page = agp_generic_destroy_page,
.suspend = agp_generic_suspend,
.resume = agp_generic_resume,
};
struct agp_bridge_driver intel_815_driver = {
.owner = THIS_MODULE,
.masks = intel_generic_masks,
.aperture_sizes = intel_815_sizes,
.size_type = U8_APER_SIZE,
.num_aperture_sizes = 2,
......@@ -1017,7 +996,8 @@ struct agp_bridge_driver intel_815_driver = {
.fetch_size = intel_815_fetch_size,
.cleanup = intel_8xx_cleanup,
.tlb_flush = intel_8xx_tlbflush,
.mask_memory = intel_mask_memory,
.mask_memory = agp_generic_mask_memory,
.masks = intel_generic_masks,
.agp_enable = agp_generic_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = agp_generic_create_gatt_table,
......@@ -1028,13 +1008,10 @@ struct agp_bridge_driver intel_815_driver = {
.free_by_type = agp_generic_free_by_type,
.agp_alloc_page = agp_generic_alloc_page,
.agp_destroy_page = agp_generic_destroy_page,
.suspend = agp_generic_suspend,
.resume = agp_generic_resume,
};
struct agp_bridge_driver intel_830_driver = {
.owner = THIS_MODULE,
.masks = intel_i810_masks,
.aperture_sizes = intel_i830_sizes,
.size_type = FIXED_APER_SIZE,
.num_aperture_sizes = 2,
......@@ -1044,6 +1021,7 @@ struct agp_bridge_driver intel_830_driver = {
.cleanup = intel_i830_cleanup,
.tlb_flush = intel_i810_tlbflush,
.mask_memory = intel_i810_mask_memory,
.masks = intel_i810_masks,
.agp_enable = intel_i810_agp_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = intel_i830_create_gatt_table,
......@@ -1054,14 +1032,11 @@ struct agp_bridge_driver intel_830_driver = {
.free_by_type = intel_i810_free_by_type,
.agp_alloc_page = agp_generic_alloc_page,
.agp_destroy_page = agp_generic_destroy_page,
.suspend = agp_generic_suspend,
.resume = agp_generic_resume,
};
struct agp_bridge_driver intel_820_driver = {
.owner = THIS_MODULE,
.masks = intel_generic_masks,
.aperture_sizes = intel_8xx_sizes,
.size_type = U8_APER_SIZE,
.num_aperture_sizes = 7,
......@@ -1069,7 +1044,8 @@ struct agp_bridge_driver intel_820_driver = {
.fetch_size = intel_8xx_fetch_size,
.cleanup = intel_820_cleanup,
.tlb_flush = intel_820_tlbflush,
.mask_memory = intel_mask_memory,
.mask_memory = agp_generic_mask_memory,
.masks = intel_generic_masks,
.agp_enable = agp_generic_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = agp_generic_create_gatt_table,
......@@ -1080,13 +1056,10 @@ struct agp_bridge_driver intel_820_driver = {
.free_by_type = agp_generic_free_by_type,
.agp_alloc_page = agp_generic_alloc_page,
.agp_destroy_page = agp_generic_destroy_page,
.suspend = agp_generic_suspend,
.resume = agp_generic_resume,
};
struct agp_bridge_driver intel_830mp_driver = {
.owner = THIS_MODULE,
.masks = intel_generic_masks,
.aperture_sizes = intel_830mp_sizes,
.size_type = U8_APER_SIZE,
.num_aperture_sizes = 4,
......@@ -1094,7 +1067,8 @@ struct agp_bridge_driver intel_830mp_driver = {
.fetch_size = intel_8xx_fetch_size,
.cleanup = intel_8xx_cleanup,
.tlb_flush = intel_8xx_tlbflush,
.mask_memory = intel_mask_memory,
.mask_memory = agp_generic_mask_memory,
.masks = intel_generic_masks,
.agp_enable = agp_generic_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = agp_generic_create_gatt_table,
......@@ -1105,13 +1079,10 @@ struct agp_bridge_driver intel_830mp_driver = {
.free_by_type = agp_generic_free_by_type,
.agp_alloc_page = agp_generic_alloc_page,
.agp_destroy_page = agp_generic_destroy_page,
.suspend = agp_generic_suspend,
.resume = agp_generic_resume,
};
struct agp_bridge_driver intel_840_driver = {
.owner = THIS_MODULE,
.masks = intel_generic_masks,
.aperture_sizes = intel_8xx_sizes,
.size_type = U8_APER_SIZE,
.num_aperture_sizes = 7,
......@@ -1119,7 +1090,8 @@ struct agp_bridge_driver intel_840_driver = {
.fetch_size = intel_8xx_fetch_size,
.cleanup = intel_8xx_cleanup,
.tlb_flush = intel_8xx_tlbflush,
.mask_memory = intel_mask_memory,
.mask_memory = agp_generic_mask_memory,
.masks = intel_generic_masks,
.agp_enable = agp_generic_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = agp_generic_create_gatt_table,
......@@ -1130,13 +1102,10 @@ struct agp_bridge_driver intel_840_driver = {
.free_by_type = agp_generic_free_by_type,
.agp_alloc_page = agp_generic_alloc_page,
.agp_destroy_page = agp_generic_destroy_page,
.suspend = agp_generic_suspend,
.resume = agp_generic_resume,
};
struct agp_bridge_driver intel_845_driver = {
.owner = THIS_MODULE,
.masks = intel_generic_masks,
.aperture_sizes = intel_8xx_sizes,
.size_type = U8_APER_SIZE,
.num_aperture_sizes = 7,
......@@ -1144,7 +1113,8 @@ struct agp_bridge_driver intel_845_driver = {
.fetch_size = intel_8xx_fetch_size,
.cleanup = intel_8xx_cleanup,
.tlb_flush = intel_8xx_tlbflush,
.mask_memory = intel_mask_memory,
.mask_memory = agp_generic_mask_memory,
.masks = intel_generic_masks,
.agp_enable = agp_generic_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = agp_generic_create_gatt_table,
......@@ -1155,13 +1125,10 @@ struct agp_bridge_driver intel_845_driver = {
.free_by_type = agp_generic_free_by_type,
.agp_alloc_page = agp_generic_alloc_page,
.agp_destroy_page = agp_generic_destroy_page,
.suspend = agp_generic_suspend,
.resume = intel_845_resume,
};
struct agp_bridge_driver intel_850_driver = {
.owner = THIS_MODULE,
.masks = intel_generic_masks,
.aperture_sizes = intel_8xx_sizes,
.size_type = U8_APER_SIZE,
.num_aperture_sizes = 7,
......@@ -1169,7 +1136,8 @@ struct agp_bridge_driver intel_850_driver = {
.fetch_size = intel_8xx_fetch_size,
.cleanup = intel_8xx_cleanup,
.tlb_flush = intel_8xx_tlbflush,
.mask_memory = intel_mask_memory,
.mask_memory = agp_generic_mask_memory,
.masks = intel_generic_masks,
.agp_enable = agp_generic_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = agp_generic_create_gatt_table,
......@@ -1180,13 +1148,10 @@ struct agp_bridge_driver intel_850_driver = {
.free_by_type = agp_generic_free_by_type,
.agp_alloc_page = agp_generic_alloc_page,
.agp_destroy_page = agp_generic_destroy_page,
.suspend = agp_generic_suspend,
.resume = agp_generic_resume,
};
struct agp_bridge_driver intel_860_driver = {
.owner = THIS_MODULE,
.masks = intel_generic_masks,
.aperture_sizes = intel_8xx_sizes,
.size_type = U8_APER_SIZE,
.num_aperture_sizes = 7,
......@@ -1194,7 +1159,8 @@ struct agp_bridge_driver intel_860_driver = {
.fetch_size = intel_8xx_fetch_size,
.cleanup = intel_8xx_cleanup,
.tlb_flush = intel_8xx_tlbflush,
.mask_memory = intel_mask_memory,
.mask_memory = agp_generic_mask_memory,
.masks = intel_generic_masks,
.agp_enable = agp_generic_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = agp_generic_create_gatt_table,
......@@ -1205,13 +1171,10 @@ struct agp_bridge_driver intel_860_driver = {
.free_by_type = agp_generic_free_by_type,
.agp_alloc_page = agp_generic_alloc_page,
.agp_destroy_page = agp_generic_destroy_page,
.suspend = agp_generic_suspend,
.resume = agp_generic_resume,
};
struct agp_bridge_driver intel_7505_driver = {
.owner = THIS_MODULE,
.masks = intel_generic_masks,
.aperture_sizes = intel_8xx_sizes,
.size_type = U8_APER_SIZE,
.num_aperture_sizes = 7,
......@@ -1219,7 +1182,8 @@ struct agp_bridge_driver intel_7505_driver = {
.fetch_size = intel_8xx_fetch_size,
.cleanup = intel_8xx_cleanup,
.tlb_flush = intel_8xx_tlbflush,
.mask_memory = intel_mask_memory,
.mask_memory = agp_generic_mask_memory,
.masks = intel_generic_masks,
.agp_enable = agp_generic_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = agp_generic_create_gatt_table,
......@@ -1230,8 +1194,6 @@ struct agp_bridge_driver intel_7505_driver = {
.free_by_type = agp_generic_free_by_type,
.agp_alloc_page = agp_generic_alloc_page,
.agp_destroy_page = agp_generic_destroy_page,
.suspend = agp_generic_suspend,
.resume = agp_generic_resume,
};
static int find_i810(u16 device, const char *name)
......@@ -1436,6 +1398,23 @@ static void __devexit agp_intel_remove(struct pci_dev *pdev)
agp_put_bridge(bridge);
}
static int agp_intel_suspend(struct pci_dev *dev, u32 state)
{
return 0;
}
static int agp_intel_resume(struct pci_dev *pdev)
{
struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
if (bridge->driver == &intel_generic_driver)
intel_configure();
else if (bridge->driver == &intel_845_driver)
intel_845_configure();
return 0;
}
static struct pci_device_id agp_intel_pci_table[] __initdata = {
{
.class = (PCI_CLASS_BRIDGE_HOST << 8),
......@@ -1450,11 +1429,13 @@ static struct pci_device_id agp_intel_pci_table[] __initdata = {
MODULE_DEVICE_TABLE(pci, agp_intel_pci_table);
static struct __initdata pci_driver agp_intel_pci_driver = {
static struct pci_driver agp_intel_pci_driver = {
.name = "agpgart-intel",
.id_table = agp_intel_pci_table,
.probe = agp_intel_probe,
.remove = agp_intel_remove,
.suspend = agp_intel_suspend,
.resume = agp_intel_resume,
};
/* intel_agp_init() must not be declared static for explicit
......
drivers/char/agp/isoch.c
View file @ 80981cbb
......@@ -314,7 +314,7 @@ static void agp_3_5_nonisochronous_node_enable(struct agp_bridge_data *bridge,
* Fully configure and enable an AGP 3.0 host bridge and all the devices
* lying behind it.
*/
int agp_3_5_enable(struct agp_bridge_data *bridge, u32 mode)
int agp_3_5_enable(struct agp_bridge_data *bridge)
{
struct pci_dev *td = bridge->dev, *dev;
u8 mcapndx;
......@@ -448,6 +448,8 @@ int agp_3_5_enable(struct agp_bridge_data *bridge, u32 mode)
printk(KERN_INFO PFX "Something bad happened setting "
"up isochronous xfers. Falling back to "
"non-isochronous xfer mode.\n");
} else {
goto free_and_exit;
}
}
agp_3_5_nonisochronous_node_enable(bridge, dev_list, ndevs);
......
drivers/char/agp/nvidia-agp.c
View file @ 80981cbb
......@@ -140,13 +140,12 @@ static void nvidia_cleanup(void)
}
static unsigned long nvidia_mask_memory(unsigned long addr, int type)
{
/* Memory type is ignored */
return addr | agp_bridge->driver->masks[0].mask;
}
#if 0
/*
* Note we can't use the generic routines, even though they are 99% the same.
* Aperture sizes <64M still requires a full 64k GART directory, but
* only use the portion of the TLB entries that correspond to the apertures
* alignment inside the surrounding 64M block.
*/
extern int agp_memory_reserved;
static int nvidia_insert_memory(agp_memory * mem, off_t pg_start, int type)
......@@ -172,10 +171,11 @@ static int nvidia_insert_memory(agp_memory * mem, off_t pg_start, int type)
for (i = 0, j = pg_start; i < mem->page_count; i++, j++)
agp_bridge->gatt_table[nvidia_private.pg_offset + j] = mem->memory[i];
agp_bridge->tlb_flush(mem);
agp_bridge->driver->tlb_flush(mem);
return 0;
}
static int nvidia_remove_memory(agp_memory * mem, off_t pg_start, int type)
{
int i;
......@@ -188,10 +188,9 @@ static int nvidia_remove_memory(agp_memory * mem, off_t pg_start, int type)
(unsigned long) agp_bridge->scratch_page;
}
agp_bridge->tlb_flush(mem);
agp_bridge->driver->tlb_flush(mem);
return 0;
}
#endif
static void nvidia_tlbflush(agp_memory * mem)
......@@ -238,13 +237,12 @@ static struct aper_size_info_8 nvidia_generic_sizes[5] =
static struct gatt_mask nvidia_generic_masks[] =
{
{0x00000001, 0}
{ .mask = 1, .type = 0}
};
struct agp_bridge_driver nvidia_driver = {
.owner = THIS_MODULE,
.masks = nvidia_generic_masks,
.aperture_sizes = nvidia_generic_sizes,
.size_type = U8_APER_SIZE,
.num_aperture_sizes = 5,
......@@ -252,19 +250,18 @@ struct agp_bridge_driver nvidia_driver = {
.fetch_size = nvidia_fetch_size,
.cleanup = nvidia_cleanup,
.tlb_flush = nvidia_tlbflush,
.mask_memory = nvidia_mask_memory,
.mask_memory = agp_generic_mask_memory,
.masks = nvidia_generic_masks,
.agp_enable = agp_generic_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = agp_generic_create_gatt_table,
.free_gatt_table = agp_generic_free_gatt_table,
.insert_memory = agp_generic_insert_memory,
.remove_memory = agp_generic_remove_memory,
.insert_memory = nvidia_insert_memory,
.remove_memory = nvidia_remove_memory,
.alloc_by_type = agp_generic_alloc_by_type,
.free_by_type = agp_generic_free_by_type,
.agp_alloc_page = agp_generic_alloc_page,
.agp_destroy_page = agp_generic_destroy_page,
.suspend = agp_generic_suspend,
.resume = agp_generic_resume,
};
static int __init agp_nvidia_probe(struct pci_dev *pdev,
......@@ -354,7 +351,7 @@ static struct pci_device_id agp_nvidia_pci_table[] __initdata = {
MODULE_DEVICE_TABLE(pci, agp_nvidia_pci_table);
static struct __initdata pci_driver agp_nvidia_pci_driver = {
static struct pci_driver agp_nvidia_pci_driver = {
.name = "agpgart-nvidia",
.id_table = agp_nvidia_pci_table,
.probe = agp_nvidia_probe,
......
drivers/char/agp/sis-agp.c
View file @ 80981cbb
......@@ -63,13 +63,6 @@ static void sis_cleanup(void)
(previous_size->size_value & ~(0x03)));
}
static unsigned long sis_mask_memory(unsigned long addr, int type)
{
/* Memory type is ignored */
return addr | agp_bridge->driver->masks[0].mask;
}
static struct aper_size_info_8 sis_generic_sizes[7] =
{
{256, 65536, 6, 99},
......@@ -81,14 +74,8 @@ static struct aper_size_info_8 sis_generic_sizes[7] =
{4, 1024, 0, 3}
};
static struct gatt_mask sis_generic_masks[] =
{
{.mask = 0x00000000, .type = 0}
};
struct agp_bridge_driver sis_driver = {
.owner = THIS_MODULE,
.masks = sis_generic_masks,
.aperture_sizes = sis_generic_sizes,
.size_type = U8_APER_SIZE,
.num_aperture_sizes = 7,
......@@ -96,7 +83,8 @@ struct agp_bridge_driver sis_driver = {
.fetch_size = sis_fetch_size,
.cleanup = sis_cleanup,
.tlb_flush = sis_tlbflush,
.mask_memory = sis_mask_memory,
.mask_memory = agp_generic_mask_memory,
.masks = NULL,
.agp_enable = agp_generic_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = agp_generic_create_gatt_table,
......@@ -107,8 +95,6 @@ struct agp_bridge_driver sis_driver = {
.free_by_type = agp_generic_free_by_type,
.agp_alloc_page = agp_generic_alloc_page,
.agp_destroy_page = agp_generic_destroy_page,
.suspend = agp_generic_suspend,
.resume = agp_generic_resume,
};
struct agp_device_ids sis_agp_device_ids[] __initdata =
......@@ -240,7 +226,7 @@ static struct pci_device_id agp_sis_pci_table[] __initdata = {
MODULE_DEVICE_TABLE(pci, agp_sis_pci_table);
static struct __initdata pci_driver agp_sis_pci_driver = {
static struct pci_driver agp_sis_pci_driver = {
.name = "agpgart-sis",
.id_table = agp_sis_pci_table,
.probe = agp_sis_probe,
......
drivers/char/agp/sworks-agp.c
View file @ 80981cbb
......@@ -308,13 +308,6 @@ static void serverworks_cleanup(void)
iounmap((void *) serverworks_private.registers);
}
static unsigned long serverworks_mask_memory(unsigned long addr, int type)
{
/* Only type 0 is supported by the serverworks chipsets */
return addr | agp_bridge->driver->masks[0].mask;
}
static int serverworks_insert_memory(agp_memory * mem,
off_t pg_start, int type)
{
......@@ -383,7 +376,7 @@ static int serverworks_remove_memory(agp_memory * mem, off_t pg_start,
static struct gatt_mask serverworks_masks[] =
{
{.mask = 0x00000001, .type = 0}
{.mask = 1, .type = 0}
};
static struct aper_size_info_lvl2 serverworks_sizes[7] =
......@@ -421,7 +414,6 @@ static void serverworks_agp_enable(u32 mode)
struct agp_bridge_driver sworks_driver = {
.owner = THIS_MODULE,
.masks = serverworks_masks,
.aperture_sizes = serverworks_sizes,
.size_type = LVL2_APER_SIZE,
.num_aperture_sizes = 7,
......@@ -429,7 +421,8 @@ struct agp_bridge_driver sworks_driver = {
.fetch_size = serverworks_fetch_size,
.cleanup = serverworks_cleanup,
.tlb_flush = serverworks_tlbflush,
.mask_memory = serverworks_mask_memory,
.mask_memory = agp_generic_mask_memory,
.masks = serverworks_masks,
.agp_enable = serverworks_agp_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = serverworks_create_gatt_table,
......@@ -440,8 +433,6 @@ struct agp_bridge_driver sworks_driver = {
.free_by_type = agp_generic_free_by_type,
.agp_alloc_page = agp_generic_alloc_page,
.agp_destroy_page = agp_generic_destroy_page,
.suspend = agp_generic_suspend,
.resume = agp_generic_resume,
};
static int __init agp_serverworks_probe(struct pci_dev *pdev,
......@@ -532,7 +523,7 @@ static struct pci_device_id agp_serverworks_pci_table[] __initdata = {
MODULE_DEVICE_TABLE(pci, agp_serverworks_pci_table);
static struct __initdata pci_driver agp_serverworks_pci_driver = {
static struct pci_driver agp_serverworks_pci_driver = {
.name = "agpgart-serverworks",
.id_table = agp_serverworks_pci_table,
.probe = agp_serverworks_probe,
......
drivers/char/agp/uninorth-agp.c 0 → 100644
View file @ 80981cbb
/*
* UniNorth AGPGART routines.
*/
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/pagemap.h>
#include <linux/agp_backend.h>
#include <asm/uninorth.h>
#include <asm/pci-bridge.h>
#include "agp.h"
static int agp_try_unsupported __initdata = 0;
static int uninorth_fetch_size(void)
{
int i;
u32 temp;
struct aper_size_info_32 *values;
pci_read_config_dword(agp_bridge->dev, UNI_N_CFG_GART_BASE, &temp);
temp &= ~(0xfffff000);
values = A_SIZE_32(agp_bridge->driver->aperture_sizes);
for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
if (temp == values[i].size_value) {
agp_bridge->previous_size =
agp_bridge->current_size = (void *) (values + i);
agp_bridge->aperture_size_idx = i;
return values[i].size;
}
}
agp_bridge->previous_size =
agp_bridge->current_size = (void *) (values + 1);
agp_bridge->aperture_size_idx = 1;
return values[1].size;
return 0;
}
static void uninorth_tlbflush(agp_memory * mem)
{
pci_write_config_dword(agp_bridge->dev, UNI_N_CFG_GART_CTRL,
UNI_N_CFG_GART_ENABLE | UNI_N_CFG_GART_INVAL);
pci_write_config_dword(agp_bridge->dev, UNI_N_CFG_GART_CTRL,
UNI_N_CFG_GART_ENABLE);
pci_write_config_dword(agp_bridge->dev, UNI_N_CFG_GART_CTRL,
UNI_N_CFG_GART_ENABLE | UNI_N_CFG_GART_2xRESET);
pci_write_config_dword(agp_bridge->dev, UNI_N_CFG_GART_CTRL,
UNI_N_CFG_GART_ENABLE);
}
static void uninorth_cleanup(void)
{
pci_write_config_dword(agp_bridge->dev, UNI_N_CFG_GART_CTRL,
UNI_N_CFG_GART_ENABLE | UNI_N_CFG_GART_INVAL);
pci_write_config_dword(agp_bridge->dev, UNI_N_CFG_GART_CTRL,
0);
pci_write_config_dword(agp_bridge->dev, UNI_N_CFG_GART_CTRL,
UNI_N_CFG_GART_2xRESET);
pci_write_config_dword(agp_bridge->dev, UNI_N_CFG_GART_CTRL,
0);
}
static int uninorth_configure(void)
{
struct aper_size_info_32 *current_size;
current_size = A_SIZE_32(agp_bridge->current_size);
printk(KERN_INFO PFX "configuring for size idx: %d\n",
current_size->size_value);
/* aperture size and gatt addr */
pci_write_config_dword(agp_bridge->dev,
UNI_N_CFG_GART_BASE,
(agp_bridge->gatt_bus_addr & 0xfffff000)
| current_size->size_value);
/* HACK ALERT
* UniNorth seem to be buggy enough not to handle properly when
* the AGP aperture isn't mapped at bus physical address 0
*/
agp_bridge->gart_bus_addr = 0;
pci_write_config_dword(agp_bridge->dev,
UNI_N_CFG_AGP_BASE, agp_bridge->gart_bus_addr);
return 0;
}
static int uninorth_insert_memory(agp_memory * mem, off_t pg_start, int type)
{
int i, j, num_entries;
void *temp;
temp = agp_bridge->current_size;
num_entries = A_SIZE_32(temp)->num_entries;
if (type != 0 || mem->type != 0)
/* We know nothing of memory types */
return -EINVAL;
if ((pg_start + mem->page_count) > num_entries)
return -EINVAL;
j = pg_start;
while (j < (pg_start + mem->page_count)) {
if (!PGE_EMPTY(agp_bridge, agp_bridge->gatt_table[j]))
return -EBUSY;
j++;
}
for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
agp_bridge->gatt_table[j] = cpu_to_le32((mem->memory[i] & 0xfffff000) | 0x00000001UL);
flush_dcache_range((unsigned long)__va(mem->memory[i]),
(unsigned long)__va(mem->memory[i])+0x1000);
}
(void)in_le32((volatile u32*)&agp_bridge->gatt_table[pg_start]);
mb();
flush_dcache_range((unsigned long)&agp_bridge->gatt_table[pg_start],
(unsigned long)&agp_bridge->gatt_table[pg_start + mem->page_count]);
uninorth_tlbflush(mem);
return 0;
}
static void uninorth_agp_enable(u32 mode)
{
u32 command, scratch;
int timeout;
pci_read_config_dword(agp_bridge->dev,
agp_bridge->capndx + PCI_AGP_STATUS,
&command);
command = agp_collect_device_status(mode, command);
command |= 0x100;
uninorth_tlbflush(NULL);
timeout = 0;
do {
pci_write_config_dword(agp_bridge->dev,
agp_bridge->capndx + PCI_AGP_COMMAND,
command);
pci_read_config_dword(agp_bridge->dev,
agp_bridge->capndx + PCI_AGP_COMMAND,
&scratch);
} while ((scratch & 0x100) == 0 && ++timeout < 1000);
if ((scratch & 0x100) == 0)
printk(KERN_ERR PFX "failed to write UniNorth AGP command reg\n");
agp_device_command(command, 0);
uninorth_tlbflush(NULL);
}
static int uninorth_create_gatt_table(void)
{
char *table;
char *table_end;
int size;
int page_order;
int num_entries;
int i;
void *temp;
struct page *page;
/* We can't handle 2 level gatt's */
if (agp_bridge->driver->size_type == LVL2_APER_SIZE)
return -EINVAL;
table = NULL;
i = agp_bridge->aperture_size_idx;
temp = agp_bridge->current_size;
size = page_order = num_entries = 0;
do {
size = A_SIZE_32(temp)->size;
page_order = A_SIZE_32(temp)->page_order;
num_entries = A_SIZE_32(temp)->num_entries;
table = (char *) __get_free_pages(GFP_KERNEL, page_order);
if (table == NULL) {
i++;
agp_bridge->current_size = A_IDX32(agp_bridge);
} else {
agp_bridge->aperture_size_idx = i;
}
} while (!table && (i < agp_bridge->driver->num_aperture_sizes));
if (table == NULL)
return -ENOMEM;
table_end = table + ((PAGE_SIZE * (1 << page_order)) - 1);
for (page = virt_to_page(table); page <= virt_to_page(table_end); page++)
SetPageReserved(page);
agp_bridge->gatt_table_real = (u32 *) table;
agp_bridge->gatt_table = (u32 *)table;
agp_bridge->gatt_bus_addr = virt_to_phys(table);
for (i = 0; i < num_entries; i++) {
agp_bridge->gatt_table[i] =
(unsigned long) agp_bridge->scratch_page;
}
flush_dcache_range((unsigned long)table, (unsigned long)table_end);
return 0;
}
static int uninorth_free_gatt_table(void)
{
int page_order;
char *table, *table_end;
void *temp;
struct page *page;
temp = agp_bridge->current_size;
page_order = A_SIZE_32(temp)->page_order;
/* Do not worry about freeing memory, because if this is
* called, then all agp memory is deallocated and removed
* from the table.
*/
table = (char *) agp_bridge->gatt_table_real;
table_end = table + ((PAGE_SIZE * (1 << page_order)) - 1);
for (page = virt_to_page(table); page <= virt_to_page(table_end); page++)
ClearPageReserved(page);
free_pages((unsigned long) agp_bridge->gatt_table_real, page_order);
return 0;
}
void null_cache_flush(void)
{
mb();
}
/* Setup function */
static struct aper_size_info_32 uninorth_sizes[7] =
{
#if 0 /* Not sure uninorth supports that high aperture sizes */
{256, 65536, 6, 64},
{128, 32768, 5, 32},
{64, 16384, 4, 16},
#endif
{32, 8192, 3, 8},
{16, 4096, 2, 4},
{8, 2048, 1, 2},
{4, 1024, 0, 1}
};
struct agp_bridge_driver uninorth_agp_driver = {
.owner = THIS_MODULE,
.aperture_sizes = (void *)uninorth_sizes,
.size_type = U32_APER_SIZE,
.num_aperture_sizes = 4,
.configure = uninorth_configure,
.fetch_size = uninorth_fetch_size,
.cleanup = uninorth_cleanup,
.tlb_flush = uninorth_tlbflush,
.mask_memory = agp_generic_mask_memory,
.masks = NULL,
.cache_flush = null_cache_flush,
.agp_enable = uninorth_agp_enable,
.create_gatt_table = uninorth_create_gatt_table,
.free_gatt_table = uninorth_free_gatt_table,
.insert_memory = uninorth_insert_memory,
.remove_memory = agp_generic_remove_memory,
.alloc_by_type = agp_generic_alloc_by_type,
.free_by_type = agp_generic_free_by_type,
.agp_alloc_page = agp_generic_alloc_page,
.agp_destroy_page = agp_generic_destroy_page,
.suspend = agp_generic_suspend,
.resume = agp_generic_resume,
.cant_use_aperture = 1,
};
struct agp_device_ids uninorth_agp_device_ids[] __initdata = {
{
.device_id = PCI_DEVICE_ID_APPLE_UNI_N_AGP,
.chipset_name = "UniNorth",
},
{
.device_id = PCI_DEVICE_ID_APPLE_UNI_N_AGP_P,
.chipset_name = "UniNorth/Pangea",
},
{
.device_id = PCI_DEVICE_ID_APPLE_UNI_N_AGP15,
.chipset_name = "UniNorth 1.5",
},
{
.device_id = PCI_DEVICE_ID_APPLE_UNI_N_AGP2,
.chipset_name = "UniNorth 2",
},
};
static int __init agp_uninorth_probe(struct pci_dev *pdev,
const struct pci_device_id *ent)
{
struct agp_device_ids *devs = uninorth_agp_device_ids;
struct agp_bridge_data *bridge;
u8 cap_ptr;
int j;
cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
if (cap_ptr == 0)
return -ENODEV;
/* probe for known chipsets */
for (j = 0; devs[j].chipset_name != NULL; ++j) {
if (pdev->device == devs[j].device_id) {
printk(KERN_INFO PFX "Detected Apple %s chipset\n",
devs[j].chipset_name);
goto found;
}
}
if (!agp_try_unsupported) {
printk(KERN_ERR PFX "Unsupported Apple chipset"
" (device id: %04x).\n", pdev->device);
printk(KERN_ERR PFX "You might want to try"
" agp_try_unsupported=1\n");
return -ENODEV;
}
printk(KERN_ERR PFX "Trying generic Uninorth routines"
" for device id %04x\n", pdev->device);
found:
bridge = agp_alloc_bridge();
if (!bridge)
return -ENOMEM;
bridge->driver = &uninorth_agp_driver;
bridge->dev = pdev;
bridge->capndx = cap_ptr;
/* Fill in the mode register */
pci_read_config_dword(pdev, cap_ptr+PCI_AGP_STATUS, &bridge->mode);
pci_set_drvdata(pdev, bridge);
return agp_add_bridge(bridge);
}
static void __devexit agp_uninorth_remove(struct pci_dev *pdev)
{
struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
agp_remove_bridge(bridge);
agp_put_bridge(bridge);
}
static struct pci_device_id agp_uninorth_pci_table[] __initdata = {
{
.class = (PCI_CLASS_BRIDGE_HOST << 8),
.class_mask = ~0,
.vendor = PCI_VENDOR_ID_APPLE,
.device = PCI_ANY_ID,
.subvendor = PCI_ANY_ID,
.subdevice = PCI_ANY_ID,
},
{ }
};
MODULE_DEVICE_TABLE(pci, agp_uninorth_pci_table);
static struct pci_driver agp_uninorth_pci_driver = {
.name = "agpgart-uninorth",
.id_table = agp_uninorth_pci_table,
.probe = agp_uninorth_probe,
.remove = agp_uninorth_remove,
};
static int __init agp_uninorth_init(void)
{
return pci_module_init(&agp_uninorth_pci_driver);
}
static void __exit agp_uninorth_cleanup(void)
{
pci_unregister_driver(&agp_uninorth_pci_driver);
}
module_init(agp_uninorth_init);
module_exit(agp_uninorth_cleanup);
MODULE_PARM(agp_try_unsupported, "1i");
MODULE_AUTHOR("Ben Herrenschmidt & Paul Mackerras");
MODULE_LICENSE("GPL");
drivers/char/agp/via-agp.c
View file @ 80981cbb
......@@ -75,14 +75,6 @@ static void via_tlbflush(agp_memory * mem)
}
static unsigned long via_mask_memory(unsigned long addr, int type)
{
/* Memory type is ignored */
return addr | agp_bridge->driver->masks[0].mask;
}
static struct aper_size_info_8 via_generic_sizes[7] =
{
{256, 65536, 6, 0},
......@@ -95,12 +87,6 @@ static struct aper_size_info_8 via_generic_sizes[7] =
};
static struct gatt_mask via_generic_masks[] =
{
{.mask = 0x00000000, .type = 0}
};
static int via_fetch_size_agp3(void)
{
int i;
......@@ -176,7 +162,6 @@ static struct aper_size_info_16 via_generic_agp3_sizes[11] =
struct agp_bridge_driver via_agp3_driver = {
.owner = THIS_MODULE,
.masks = via_generic_masks,
.aperture_sizes = via_generic_agp3_sizes,
.size_type = U8_APER_SIZE,
.num_aperture_sizes = 10,
......@@ -184,7 +169,8 @@ struct agp_bridge_driver via_agp3_driver = {
.fetch_size = via_fetch_size_agp3,
.cleanup = via_cleanup_agp3,
.tlb_flush = via_tlbflush_agp3,
.mask_memory = via_mask_memory,
.mask_memory = agp_generic_mask_memory,
.masks = NULL,
.agp_enable = agp_generic_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = agp_generic_create_gatt_table,
......@@ -195,13 +181,10 @@ struct agp_bridge_driver via_agp3_driver = {
.free_by_type = agp_generic_free_by_type,
.agp_alloc_page = agp_generic_alloc_page,
.agp_destroy_page = agp_generic_destroy_page,
.suspend = agp_generic_suspend,
.resume = agp_generic_resume,
};
struct agp_bridge_driver via_driver = {
.owner = THIS_MODULE,
.masks = via_generic_masks,
.aperture_sizes = via_generic_sizes,
.size_type = U8_APER_SIZE,
.num_aperture_sizes = 7,
......@@ -209,7 +192,8 @@ struct agp_bridge_driver via_driver = {
.fetch_size = via_fetch_size,
.cleanup = via_cleanup,
.tlb_flush = via_tlbflush,
.mask_memory = via_mask_memory,
.mask_memory = agp_generic_mask_memory,
.masks = NULL,
.agp_enable = agp_generic_enable,
.cache_flush = global_cache_flush,
.create_gatt_table = agp_generic_create_gatt_table,
......@@ -220,8 +204,6 @@ struct agp_bridge_driver via_driver = {
.free_by_type = agp_generic_free_by_type,
.agp_alloc_page = agp_generic_alloc_page,
.agp_destroy_page = agp_generic_destroy_page,
.suspend = agp_generic_suspend,
.resume = agp_generic_resume,
};
static struct agp_device_ids via_agp_device_ids[] __initdata =
......@@ -402,6 +384,7 @@ static int __init agp_via_probe(struct pci_dev *pdev,
bridge->dev = pdev;
bridge->capndx = cap_ptr;
bridge->driver = &via_driver;
switch (pdev->device) {
case PCI_DEVICE_ID_VIA_8367_0:
......@@ -427,7 +410,6 @@ static int __init agp_via_probe(struct pci_dev *pdev,
}
/*FALLTHROUGH*/
default:
bridge->driver = &via_driver;
break;
}
......@@ -466,7 +448,7 @@ static struct pci_device_id agp_via_pci_table[] __initdata = {
MODULE_DEVICE_TABLE(pci, agp_via_pci_table);
static struct __initdata pci_driver agp_via_pci_driver = {
static struct pci_driver agp_via_pci_driver = {
.name = "agpgart-via",
.id_table = agp_via_pci_table,
.probe = agp_via_probe,
......
include/asm-ppc/agp.h 0 → 100644
View file @ 80981cbb
#ifndef AGP_H
#define AGP_H 1
#include <asm/io.h>
/* nothing much needed here */
#define map_page_into_agp(page)
#define unmap_page_from_agp(page)
#define flush_agp_mappings()
#define flush_agp_cache() mb()
#endif
include/linux/pci_ids.h
View file @ 80981cbb
......@@ -1131,6 +1131,7 @@
#define PCI_DEVICE_ID_VIA_8754 0x3168
#define PCI_DEVICE_ID_VIA_8235 0x3177
#define PCI_DEVICE_ID_VIA_P4N333 0x3178
#define PCI_DEVICE_ID_VIA_K8T400M_0 0x3188
#define PCI_DEVICE_ID_VIA_8377_0 0x3189
#define PCI_DEVICE_ID_VIA_KM400 0x3205
#define PCI_DEVICE_ID_VIA_P4M400 0x3209
......
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