Commit 8177e112 authored by Chris Wilson's avatar Chris Wilson

drm/i915: Tidy up some error messages around reset failure

On blb and pnv, we are seeing sporadic

  i915 0000:00:02.0: Resetting chip after gpu hang
  [drm:intel_gpu_reset [i915]] rcs0: timed out on STOP_RING
  [drm:i915_reset [i915]] *ERROR* Failed hw init on reset -5

which notably lack the actual root cause of the error. Ostensibly it
should be the init_ring_common() that failed, but it's error paths are
covered by DRM_ERROR.
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180207111545.17078-1-chris@chris-wilson.co.uk
parent c22b355f
...@@ -1957,7 +1957,8 @@ void i915_reset(struct drm_i915_private *i915, unsigned int flags) ...@@ -1957,7 +1957,8 @@ void i915_reset(struct drm_i915_private *i915, unsigned int flags)
*/ */
ret = i915_ggtt_enable_hw(i915); ret = i915_ggtt_enable_hw(i915);
if (ret) { if (ret) {
DRM_ERROR("Failed to re-enable GGTT following reset %d\n", ret); DRM_ERROR("Failed to re-enable GGTT following reset (%d)\n",
ret);
goto error; goto error;
} }
...@@ -1974,7 +1975,8 @@ void i915_reset(struct drm_i915_private *i915, unsigned int flags) ...@@ -1974,7 +1975,8 @@ void i915_reset(struct drm_i915_private *i915, unsigned int flags)
*/ */
ret = i915_gem_init_hw(i915); ret = i915_gem_init_hw(i915);
if (ret) { if (ret) {
DRM_ERROR("Failed hw init on reset %d\n", ret); DRM_ERROR("Failed to initialise HW following reset (%d)\n",
ret);
goto error; goto error;
} }
......
...@@ -5065,9 +5065,12 @@ static int __i915_gem_restart_engines(void *data) ...@@ -5065,9 +5065,12 @@ static int __i915_gem_restart_engines(void *data)
for_each_engine(engine, i915, id) { for_each_engine(engine, i915, id) {
err = engine->init_hw(engine); err = engine->init_hw(engine);
if (err) if (err) {
DRM_ERROR("Failed to restart %s (%d)\n",
engine->name, err);
return err; return err;
} }
}
return 0; return 0;
} }
...@@ -5118,14 +5121,16 @@ int i915_gem_init_hw(struct drm_i915_private *dev_priv) ...@@ -5118,14 +5121,16 @@ int i915_gem_init_hw(struct drm_i915_private *dev_priv)
ret = i915_ppgtt_init_hw(dev_priv); ret = i915_ppgtt_init_hw(dev_priv);
if (ret) { if (ret) {
DRM_ERROR("PPGTT enable HW failed %d\n", ret); DRM_ERROR("Enabling PPGTT failed (%d)\n", ret);
goto out; goto out;
} }
/* We can't enable contexts until all firmware is loaded */ /* We can't enable contexts until all firmware is loaded */
ret = intel_uc_init_hw(dev_priv); ret = intel_uc_init_hw(dev_priv);
if (ret) if (ret) {
DRM_ERROR("Enabling uc failed (%d)\n", ret);
goto out; goto out;
}
intel_mocs_init_l3cc_table(dev_priv); intel_mocs_init_l3cc_table(dev_priv);
......
...@@ -453,7 +453,7 @@ static int init_ring_common(struct intel_engine_cs *engine) ...@@ -453,7 +453,7 @@ static int init_ring_common(struct intel_engine_cs *engine)
if (!stop_ring(engine)) { if (!stop_ring(engine)) {
/* G45 ring initialization often fails to reset head to zero */ /* G45 ring initialization often fails to reset head to zero */
DRM_DEBUG_KMS("%s head not reset to zero " DRM_DEBUG_DRIVER("%s head not reset to zero "
"ctl %08x head %08x tail %08x start %08x\n", "ctl %08x head %08x tail %08x start %08x\n",
engine->name, engine->name,
I915_READ_CTL(engine), I915_READ_CTL(engine),
...@@ -492,7 +492,7 @@ static int init_ring_common(struct intel_engine_cs *engine) ...@@ -492,7 +492,7 @@ static int init_ring_common(struct intel_engine_cs *engine)
/* WaClearRingBufHeadRegAtInit:ctg,elk */ /* WaClearRingBufHeadRegAtInit:ctg,elk */
if (I915_READ_HEAD(engine)) if (I915_READ_HEAD(engine))
DRM_DEBUG("%s initialization failed [head=%08x], fudging\n", DRM_DEBUG_DRIVER("%s initialization failed [head=%08x], fudging\n",
engine->name, I915_READ_HEAD(engine)); engine->name, I915_READ_HEAD(engine));
intel_ring_update_space(ring); intel_ring_update_space(ring);
......
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