Commit 819db468 authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman

Merge tag 'iio-fixes-for-4.4a' of...

Merge tag 'iio-fixes-for-4.4a' of ssh://ra.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-linus

Jonathan writes:

First set of IIO fixes for the 4.4 cycle.

This set does not include those for issues introduced during the merge
window.  Fixes of those will follow in a future series.

* ad5064
  - Make sure the local i2c_write returns 0 on success rather than the
    number of bytes transfered.  Otherwise we report an error on all writes.
  - Fix a shift for ad5629 and ad5669 which gives incorrect DAC output on
    these parts.
* ad7793
  - The product ID on the datasheet is wrong.  Fix it in the driver.
* IIO_DUMMY_EVGEN
  - select IRQ_WORK as a dependency.
* lpc32xx
  - make sure clock is prepared before enabling.
* si7020
  - data byte order was reversed. Fix it.
* vf610
  - Internal temperature calculation was wrong if a different
    reference voltage was used.  Now use a linear interpolation
    function to make it work over the full range.
  - Fix a division by zero in the case of a device tree property
    not being present (same issue two fixes).
* xilinx XADC
  - VREFN scale was wrong - fix it.
parents 8005c49d a57f8dac
......@@ -101,7 +101,7 @@
#define AD7795_CH_AIN1M_AIN1M 8 /* AIN1(-) - AIN1(-) */
/* ID Register Bit Designations (AD7793_REG_ID) */
#define AD7785_ID 0xB
#define AD7785_ID 0x3
#define AD7792_ID 0xA
#define AD7793_ID 0xB
#define AD7794_ID 0xF
......
......@@ -106,6 +106,13 @@
#define DEFAULT_SAMPLE_TIME 1000
/* V at 25°C of 696 mV */
#define VF610_VTEMP25_3V0 950
/* V at 25°C of 699 mV */
#define VF610_VTEMP25_3V3 867
/* Typical sensor slope coefficient at all temperatures */
#define VF610_TEMP_SLOPE_COEFF 1840
enum clk_sel {
VF610_ADCIOC_BUSCLK_SET,
VF610_ADCIOC_ALTCLK_SET,
......@@ -197,6 +204,8 @@ static inline void vf610_adc_calculate_rates(struct vf610_adc *info)
adc_feature->clk_div = 8;
}
adck_rate = ipg_rate / adc_feature->clk_div;
/*
* Determine the long sample time adder value to be used based
* on the default minimum sample time provided.
......@@ -221,7 +230,6 @@ static inline void vf610_adc_calculate_rates(struct vf610_adc *info)
* BCT (Base Conversion Time): fixed to 25 ADCK cycles for 12 bit mode
* LSTAdder(Long Sample Time): 3, 5, 7, 9, 13, 17, 21, 25 ADCK cycles
*/
adck_rate = ipg_rate / info->adc_feature.clk_div;
for (i = 0; i < ARRAY_SIZE(vf610_hw_avgs); i++)
info->sample_freq_avail[i] =
adck_rate / (6 + vf610_hw_avgs[i] *
......@@ -664,10 +672,12 @@ static int vf610_read_raw(struct iio_dev *indio_dev,
case IIO_TEMP:
/*
* Calculate in degree Celsius times 1000
* Using sensor slope of 1.84 mV/°C and
* V at 25°C of 696 mV
* Using the typical sensor slope of 1.84 mV/°C
* and VREFH_ADC at 3.3V, V at 25°C of 699 mV
*/
*val = 25000 - ((int)info->value - 864) * 1000000 / 1840;
*val = 25000 - ((int)info->value - VF610_VTEMP25_3V3) *
1000000 / VF610_TEMP_SLOPE_COEFF;
break;
default:
mutex_unlock(&indio_dev->mlock);
......
......@@ -841,6 +841,7 @@ static int xadc_read_raw(struct iio_dev *indio_dev,
case XADC_REG_VCCINT:
case XADC_REG_VCCAUX:
case XADC_REG_VREFP:
case XADC_REG_VREFN:
case XADC_REG_VCCBRAM:
case XADC_REG_VCCPINT:
case XADC_REG_VCCPAUX:
......
......@@ -113,12 +113,16 @@ enum ad5064_type {
ID_AD5065,
ID_AD5628_1,
ID_AD5628_2,
ID_AD5629_1,
ID_AD5629_2,
ID_AD5648_1,
ID_AD5648_2,
ID_AD5666_1,
ID_AD5666_2,
ID_AD5668_1,
ID_AD5668_2,
ID_AD5669_1,
ID_AD5669_2,
};
static int ad5064_write(struct ad5064_state *st, unsigned int cmd,
......@@ -291,7 +295,7 @@ static const struct iio_chan_spec_ext_info ad5064_ext_info[] = {
{ },
};
#define AD5064_CHANNEL(chan, addr, bits) { \
#define AD5064_CHANNEL(chan, addr, bits, _shift) { \
.type = IIO_VOLTAGE, \
.indexed = 1, \
.output = 1, \
......@@ -303,36 +307,39 @@ static const struct iio_chan_spec_ext_info ad5064_ext_info[] = {
.sign = 'u', \
.realbits = (bits), \
.storagebits = 16, \
.shift = 20 - bits, \
.shift = (_shift), \
}, \
.ext_info = ad5064_ext_info, \
}
#define DECLARE_AD5064_CHANNELS(name, bits) \
#define DECLARE_AD5064_CHANNELS(name, bits, shift) \
const struct iio_chan_spec name[] = { \
AD5064_CHANNEL(0, 0, bits), \
AD5064_CHANNEL(1, 1, bits), \
AD5064_CHANNEL(2, 2, bits), \
AD5064_CHANNEL(3, 3, bits), \
AD5064_CHANNEL(4, 4, bits), \
AD5064_CHANNEL(5, 5, bits), \
AD5064_CHANNEL(6, 6, bits), \
AD5064_CHANNEL(7, 7, bits), \
AD5064_CHANNEL(0, 0, bits, shift), \
AD5064_CHANNEL(1, 1, bits, shift), \
AD5064_CHANNEL(2, 2, bits, shift), \
AD5064_CHANNEL(3, 3, bits, shift), \
AD5064_CHANNEL(4, 4, bits, shift), \
AD5064_CHANNEL(5, 5, bits, shift), \
AD5064_CHANNEL(6, 6, bits, shift), \
AD5064_CHANNEL(7, 7, bits, shift), \
}
#define DECLARE_AD5065_CHANNELS(name, bits) \
#define DECLARE_AD5065_CHANNELS(name, bits, shift) \
const struct iio_chan_spec name[] = { \
AD5064_CHANNEL(0, 0, bits), \
AD5064_CHANNEL(1, 3, bits), \
AD5064_CHANNEL(0, 0, bits, shift), \
AD5064_CHANNEL(1, 3, bits, shift), \
}
static DECLARE_AD5064_CHANNELS(ad5024_channels, 12);
static DECLARE_AD5064_CHANNELS(ad5044_channels, 14);
static DECLARE_AD5064_CHANNELS(ad5064_channels, 16);
static DECLARE_AD5064_CHANNELS(ad5024_channels, 12, 8);
static DECLARE_AD5064_CHANNELS(ad5044_channels, 14, 6);
static DECLARE_AD5064_CHANNELS(ad5064_channels, 16, 4);
static DECLARE_AD5065_CHANNELS(ad5025_channels, 12);
static DECLARE_AD5065_CHANNELS(ad5045_channels, 14);
static DECLARE_AD5065_CHANNELS(ad5065_channels, 16);
static DECLARE_AD5065_CHANNELS(ad5025_channels, 12, 8);
static DECLARE_AD5065_CHANNELS(ad5045_channels, 14, 6);
static DECLARE_AD5065_CHANNELS(ad5065_channels, 16, 4);
static DECLARE_AD5064_CHANNELS(ad5629_channels, 12, 4);
static DECLARE_AD5064_CHANNELS(ad5669_channels, 16, 0);
static const struct ad5064_chip_info ad5064_chip_info_tbl[] = {
[ID_AD5024] = {
......@@ -382,6 +389,18 @@ static const struct ad5064_chip_info ad5064_chip_info_tbl[] = {
.channels = ad5024_channels,
.num_channels = 8,
},
[ID_AD5629_1] = {
.shared_vref = true,
.internal_vref = 2500000,
.channels = ad5629_channels,
.num_channels = 8,
},
[ID_AD5629_2] = {
.shared_vref = true,
.internal_vref = 5000000,
.channels = ad5629_channels,
.num_channels = 8,
},
[ID_AD5648_1] = {
.shared_vref = true,
.internal_vref = 2500000,
......@@ -418,6 +437,18 @@ static const struct ad5064_chip_info ad5064_chip_info_tbl[] = {
.channels = ad5064_channels,
.num_channels = 8,
},
[ID_AD5669_1] = {
.shared_vref = true,
.internal_vref = 2500000,
.channels = ad5669_channels,
.num_channels = 8,
},
[ID_AD5669_2] = {
.shared_vref = true,
.internal_vref = 5000000,
.channels = ad5669_channels,
.num_channels = 8,
},
};
static inline unsigned int ad5064_num_vref(struct ad5064_state *st)
......@@ -597,10 +628,16 @@ static int ad5064_i2c_write(struct ad5064_state *st, unsigned int cmd,
unsigned int addr, unsigned int val)
{
struct i2c_client *i2c = to_i2c_client(st->dev);
int ret;
st->data.i2c[0] = (cmd << 4) | addr;
put_unaligned_be16(val, &st->data.i2c[1]);
return i2c_master_send(i2c, st->data.i2c, 3);
ret = i2c_master_send(i2c, st->data.i2c, 3);
if (ret < 0)
return ret;
return 0;
}
static int ad5064_i2c_probe(struct i2c_client *i2c,
......@@ -616,12 +653,12 @@ static int ad5064_i2c_remove(struct i2c_client *i2c)
}
static const struct i2c_device_id ad5064_i2c_ids[] = {
{"ad5629-1", ID_AD5628_1},
{"ad5629-2", ID_AD5628_2},
{"ad5629-3", ID_AD5628_2}, /* similar enough to ad5629-2 */
{"ad5669-1", ID_AD5668_1},
{"ad5669-2", ID_AD5668_2},
{"ad5669-3", ID_AD5668_2}, /* similar enough to ad5669-2 */
{"ad5629-1", ID_AD5629_1},
{"ad5629-2", ID_AD5629_2},
{"ad5629-3", ID_AD5629_2}, /* similar enough to ad5629-2 */
{"ad5669-1", ID_AD5669_1},
{"ad5669-2", ID_AD5669_2},
{"ad5669-3", ID_AD5669_2}, /* similar enough to ad5669-2 */
{}
};
MODULE_DEVICE_TABLE(i2c, ad5064_i2c_ids);
......
......@@ -50,7 +50,7 @@ static int si7020_read_raw(struct iio_dev *indio_dev,
switch (mask) {
case IIO_CHAN_INFO_RAW:
ret = i2c_smbus_read_word_data(*client,
ret = i2c_smbus_read_word_swapped(*client,
chan->type == IIO_TEMP ?
SI7020CMD_TEMP_HOLD :
SI7020CMD_RH_HOLD);
......
......@@ -19,6 +19,7 @@ source "drivers/staging/iio/trigger/Kconfig"
config IIO_DUMMY_EVGEN
tristate
select IRQ_WORK
config IIO_SIMPLE_DUMMY
tristate "An example driver with no hardware requirements"
......
......@@ -76,7 +76,7 @@ static int lpc32xx_read_raw(struct iio_dev *indio_dev,
if (mask == IIO_CHAN_INFO_RAW) {
mutex_lock(&indio_dev->mlock);
clk_enable(info->clk);
clk_prepare_enable(info->clk);
/* Measurement setup */
__raw_writel(AD_INTERNAL | (chan->address) | AD_REFp | AD_REFm,
LPC32XX_ADC_SELECT(info->adc_base));
......@@ -84,7 +84,7 @@ static int lpc32xx_read_raw(struct iio_dev *indio_dev,
__raw_writel(AD_PDN_CTRL | AD_STROBE,
LPC32XX_ADC_CTRL(info->adc_base));
wait_for_completion(&info->completion); /* set by ISR */
clk_disable(info->clk);
clk_disable_unprepare(info->clk);
*val = info->value;
mutex_unlock(&indio_dev->mlock);
......
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