Commit 8398024b authored by Matt Roper's avatar Matt Roper Committed by Imre Deak

drm/i915/xelpd: add XE_LPD display characteristics

Let's start preparing for upcoming platforms that will use an XE_LPD
design.

v2:
 - Use the now-preferred "XE_LPD" term to refer to this design
 - Utilize DISPLAY_VER() rather than a feature flag
 - Drop unused mbus_size field (Lucas)
v3:
 - Adjust for dbuf.{size,slice_mask} (Ville)
Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com> (v2)
Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210506161930.309688-2-imre.deak@intel.com
parent 7c653e15
......@@ -380,6 +380,8 @@ intel_display_power_put_all_in_set(struct drm_i915_private *i915,
enum dbuf_slice {
DBUF_S1,
DBUF_S2,
DBUF_S3,
DBUF_S4,
I915_MAX_DBUF_SLICES
};
......
......@@ -939,6 +939,16 @@ static const struct intel_device_info adl_s_info = {
.dma_mask_size = 46,
};
#define XE_LPD_FEATURES \
.display.ver = 13, \
.display.has_psr_hw_tracking = 0, \
.abox_mask = GENMASK(1, 0), \
.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D), \
.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
BIT(TRANSCODER_C) | BIT(TRANSCODER_D), \
.dbuf.size = 4096, \
.dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2) | BIT(DBUF_S3) | BIT(DBUF_S4)
#undef GEN
#undef PLATFORM
......
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