drm/i915: pass dev_priv explicitly to PIPEDSL

Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the PIPEDSL register macro.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/53b751f5a883318d44b690284d2e9d5a43fba860.1717514638.git.jani.nikula@intel.comSigned-off-by: Jani Nikula <jani.nikula@intel.com>

drivers/gpu/drm/i915/display/intel_crt.c

@@ -771,9 +771,9 @@ intel_crt_load_detect(struct intel_crt *crt, enum pipe pipe)
 		/*
 		 * Wait for the border to be displayed
 		 */
-		while (intel_de_read(dev_priv, PIPEDSL(pipe)) >= vactive)
+		while (intel_de_read(dev_priv, PIPEDSL(dev_priv, pipe)) >= vactive)
 			;
-		while ((dsl = intel_de_read(dev_priv, PIPEDSL(pipe))) <= vsample)
+		while ((dsl = intel_de_read(dev_priv, PIPEDSL(dev_priv, pipe))) <= vsample)
 			;
 		/*
 		 * Watch ST00 for an entire scanline
@@ -786,7 +786,7 @@ intel_crt_load_detect(struct intel_crt *crt, enum pipe pipe)
 			st00 = intel_de_read8(dev_priv, _VGA_MSR_WRITE);
 			if (st00 & (1 << 4))
 				detect++;
-		} while ((intel_de_read(dev_priv, PIPEDSL(pipe)) == dsl));
+		} while ((intel_de_read(dev_priv, PIPEDSL(dev_priv, pipe)) == dsl));
 
 		/* restore vblank if necessary */
 		if (restore_vblank)

drivers/gpu/drm/i915/display/intel_hdmi.c

@@ -1476,7 +1476,8 @@ static int kbl_repositioning_enc_en_signal(struct intel_connector *connector,
 	int ret;
 
 	for (;;) {
-		scanline = intel_de_read(dev_priv, PIPEDSL(crtc->pipe));
+		scanline = intel_de_read(dev_priv,
+					 PIPEDSL(dev_priv, crtc->pipe));
 		if (scanline > 100 && scanline < 200)
 			break;
 		usleep_range(25, 50);

drivers/gpu/drm/i915/display/intel_vblank.c

@@ -248,7 +248,7 @@ static int __intel_get_crtc_scanline(struct intel_crtc *crtc)
 
 	vtotal = intel_mode_vtotal(mode);
 
-	position = intel_de_read_fw(dev_priv, PIPEDSL(pipe)) & PIPEDSL_LINE_MASK;
+	position = intel_de_read_fw(dev_priv, PIPEDSL(dev_priv, pipe)) & PIPEDSL_LINE_MASK;
 
 	/*
 	 * On HSW, the DSL reg (0x70000) appears to return 0 if we
@@ -267,7 +267,8 @@ static int __intel_get_crtc_scanline(struct intel_crtc *crtc)
 
 		for (i = 0; i < 100; i++) {
 			udelay(1);
-			temp = intel_de_read_fw(dev_priv, PIPEDSL(pipe)) & PIPEDSL_LINE_MASK;
+			temp = intel_de_read_fw(dev_priv,
+						PIPEDSL(dev_priv, pipe)) & PIPEDSL_LINE_MASK;
 			if (temp != position) {
 				position = temp;
 				break;
@@ -474,7 +475,7 @@ int intel_get_crtc_scanline(struct intel_crtc *crtc)
 static bool pipe_scanline_is_moving(struct drm_i915_private *dev_priv,
 				    enum pipe pipe)
 {
-	i915_reg_t reg = PIPEDSL(pipe);
+	i915_reg_t reg = PIPEDSL(dev_priv, pipe);
 	u32 line1, line2;
 
 	line1 = intel_de_read(dev_priv, reg) & PIPEDSL_LINE_MASK;

drivers/gpu/drm/i915/i915_reg.h

@@ -1796,7 +1796,7 @@
 #define PIPESTAT_INT_STATUS_MASK		0x0000ffff
 
 #define TRANSCONF(dev_priv, trans)	_MMIO_PIPE2(dev_priv, (trans), _TRANSACONF)
-#define PIPEDSL(pipe)		_MMIO_PIPE2(dev_priv, pipe, _PIPEADSL)
+#define PIPEDSL(dev_priv, pipe)		_MMIO_PIPE2(dev_priv, pipe, _PIPEADSL)
 #define PIPEFRAME(pipe)		_MMIO_PIPE2(dev_priv, pipe, _PIPEAFRAMEHIGH)
 #define PIPEFRAMEPIXEL(pipe)	_MMIO_PIPE2(dev_priv, pipe, _PIPEAFRAMEPIXEL)
 #define PIPESTAT(pipe)		_MMIO_PIPE2(dev_priv, pipe, _PIPEASTAT)

drivers/gpu/drm/i915/intel_gvt_mmio_table.c

@@ -126,10 +126,10 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter)
 	MMIO_D(_MMIO(0x650b4));
 	MMIO_D(_MMIO(0xc4040));
 	MMIO_D(DERRMR);
-	MMIO_D(PIPEDSL(PIPE_A));
-	MMIO_D(PIPEDSL(PIPE_B));
-	MMIO_D(PIPEDSL(PIPE_C));
-	MMIO_D(PIPEDSL(_PIPE_EDP));
+	MMIO_D(PIPEDSL(dev_priv, PIPE_A));
+	MMIO_D(PIPEDSL(dev_priv, PIPE_B));
+	MMIO_D(PIPEDSL(dev_priv, PIPE_C));
+	MMIO_D(PIPEDSL(dev_priv, _PIPE_EDP));
 	MMIO_D(TRANSCONF(dev_priv, TRANSCODER_A));
 	MMIO_D(TRANSCONF(dev_priv, TRANSCODER_B));
 	MMIO_D(TRANSCONF(dev_priv, TRANSCODER_C));