drm/amd/display: Revert "Rework DC Z10 restore"

This reverts commit e6f82bd4.

It caused intermittent hangs when enabling IPS on static screen.
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Acked-by: Roman Li <roman.li@amd.com>
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drivers/gpu/drm/amd/display/dc/core/dc.c

@@ -1836,8 +1836,8 @@ static enum dc_status dc_commit_state_no_check(struct dc *dc, struct dc_state *c
 	struct dc_state *old_state;
 	bool subvp_prev_use = false;
 
-	dc_allow_idle_optimizations(dc, false);
 	dc_z10_restore(dc);
+	dc_allow_idle_optimizations(dc, false);
 
 	for (i = 0; i < dc->res_pool->pipe_count; i++) {
 		struct pipe_ctx *old_pipe = &dc->current_state->res_ctx.pipe_ctx[i];
@@ -3376,9 +3376,6 @@ static void commit_planes_for_stream_fast(struct dc *dc,
 	int i, j;
 	struct pipe_ctx *top_pipe_to_program = NULL;
 	struct dc_stream_status *stream_status = NULL;
-	if (dc->caps.ips_support)
-		dc_allow_idle_optimizations(dc, false);
-
 	dc_z10_restore(dc);
 
 	top_pipe_to_program = resource_get_otg_master_for_stream(
@@ -3506,9 +3503,6 @@ static void commit_planes_for_stream(struct dc *dc,
 	// dc->current_state anymore, so we have to cache it before we apply
 	// the new SubVP context
 	subvp_prev_use = false;
-	if (dc->caps.ips_support)
-		dc_allow_idle_optimizations(dc, false);
-
 	dc_z10_restore(dc);
 	if (update_type == UPDATE_TYPE_FULL)
 		wait_for_outstanding_hw_updates(dc, context);
@@ -4692,9 +4686,6 @@ void dc_set_power_state(
 	case DC_ACPI_CM_POWER_STATE_D0:
 		dc_state_construct(dc, dc->current_state);
 
-		if (dc->caps.ips_support)
-			dc_allow_idle_optimizations(dc, false);
-
 		dc_z10_restore(dc);
 
 		dc->hwss.init_hw(dc);

drivers/gpu/drm/amd/display/dc/core/dc_stream.c

@@ -309,6 +309,7 @@ bool dc_stream_set_cursor_attributes(
 
 	stream->cursor_attributes = *attributes;
 
+	dc_z10_restore(dc);
 	/* disable idle optimizations while updating cursor */
 	if (dc->idle_optimizations_allowed) {
 		dc_allow_idle_optimizations(dc, false);
@@ -380,14 +381,12 @@ bool dc_stream_set_cursor_position(
 	}
 
 	dc = stream->ctx->dc;
+	dc_z10_restore(dc);
 
 	/* disable idle optimizations if enabling cursor */
-	if (dc->idle_optimizations_allowed &&
-	    (!stream->cursor_position.enable || dc->debug.exit_idle_opt_for_cursor_updates ||
-	     dc->caps.ips_support) &&
-	    position->enable) {
+	if (dc->idle_optimizations_allowed && (!stream->cursor_position.enable || dc->debug.exit_idle_opt_for_cursor_updates)
+			&& position->enable) {
 		dc_allow_idle_optimizations(dc, false);
-		dc_z10_restore(dc);
 		reset_idle_optimizations = true;
 	}
 

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c

@@ -708,6 +708,8 @@ void dcn35_z10_restore(const struct dc *dc)
 	if (dc->debug.disable_z10)
 		return;
 
+	dc_dmub_srv_apply_idle_power_optimizations(dc, false);
+
 	dcn31_z10_restore(dc);
 }