Commit 847fd278 authored by Pierre-Louis Bossart's avatar Pierre-Louis Bossart Committed by Mark Brown

ASoC: SOF: Intel: hda-stream: use snd_sof_dsp_updateb() helper

No functionality change, only code consistency.
Signed-off-by: default avatarPierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: default avatarBard Liao <yung-chuan.liao@linux.intel.com>
Reviewed-by: default avatarRanjani Sridharan <ranjani.sridharan@linux.intel.com>
Link: https://lore.kernel.org/r/20221024165310.246183-16-pierre-louis.bossart@linux.intel.comSigned-off-by: default avatarMark Brown <broonie@kernel.org>
parent e1e71c60
...@@ -398,7 +398,6 @@ int hda_dsp_iccmax_stream_hw_params(struct snd_sof_dev *sdev, struct hdac_ext_st ...@@ -398,7 +398,6 @@ int hda_dsp_iccmax_stream_hw_params(struct snd_sof_dev *sdev, struct hdac_ext_st
struct snd_dma_buffer *dmab, struct snd_dma_buffer *dmab,
struct snd_pcm_hw_params *params) struct snd_pcm_hw_params *params)
{ {
struct hdac_bus *bus = sof_to_bus(sdev);
struct hdac_stream *hstream = &hext_stream->hstream; struct hdac_stream *hstream = &hext_stream->hstream;
int sd_offset = SOF_STREAM_SD_OFFSET(hstream); int sd_offset = SOF_STREAM_SD_OFFSET(hstream);
int ret; int ret;
...@@ -456,7 +455,8 @@ int hda_dsp_iccmax_stream_hw_params(struct snd_sof_dev *sdev, struct hdac_ext_st ...@@ -456,7 +455,8 @@ int hda_dsp_iccmax_stream_hw_params(struct snd_sof_dev *sdev, struct hdac_ext_st
mask, mask); mask, mask);
/* Follow HW recommendation to set the guardband value to 95us during FW boot */ /* Follow HW recommendation to set the guardband value to 95us during FW boot */
snd_hdac_chip_updateb(bus, VS_LTRP, HDA_VS_INTEL_LTRP_GB_MASK, HDA_LTRP_GB_VALUE_US); snd_sof_dsp_updateb(sdev, HDA_DSP_HDA_BAR, HDA_VS_INTEL_LTRP,
HDA_VS_INTEL_LTRP_GB_MASK, HDA_LTRP_GB_VALUE_US);
/* start DMA */ /* start DMA */
snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, sd_offset, snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, sd_offset,
......
...@@ -307,6 +307,7 @@ ...@@ -307,6 +307,7 @@
/* Intel Vendor Specific Registers */ /* Intel Vendor Specific Registers */
#define HDA_VS_INTEL_EM2 0x1030 #define HDA_VS_INTEL_EM2 0x1030
#define HDA_VS_INTEL_EM2_L1SEN BIT(13) #define HDA_VS_INTEL_EM2_L1SEN BIT(13)
#define HDA_VS_INTEL_LTRP 0x1048
#define HDA_VS_INTEL_LTRP_GB_MASK 0x3F #define HDA_VS_INTEL_LTRP_GB_MASK 0x3F
/* HIPCI */ /* HIPCI */
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment