Commit 8669b46e authored by Paul Mackerras's avatar Paul Mackerras

Merge bk://24.221.152.185/linux-2.5-openpic

into cargo.(none):/home/paulus/kernel/for-linus-ppc
parents afae6f7c 73926916
...@@ -123,10 +123,16 @@ if [ "$CONFIG_6xx" = "y" -a "$CONFIG_8260" = "n" ]; then ...@@ -123,10 +123,16 @@ if [ "$CONFIG_6xx" = "y" -a "$CONFIG_8260" = "n" ]; then
SBS-K2 CONFIG_K2 \ SBS-K2 CONFIG_K2 \
Synergy-Gemini CONFIG_GEMINI \ Synergy-Gemini CONFIG_GEMINI \
Zynx-ZX4500 CONFIG_ZX4500" CHRP/PowerMac/PReP Zynx-ZX4500 CONFIG_ZX4500" CHRP/PowerMac/PReP
fi
if [ "$CONFIG_PCORE" = "y" -o "$CONFIG_POWERPMC250" = "y" ]; then if [ "$CONFIG_SANDPOINT" = "y" ]; then
bool ' Sandpoint X3' CONFIG_SANDPOINT_X3
fi
if [ "$CONFIG_PCORE" = "y" -o "$CONFIG_POWERPMC250" = "y" ]; then
define_bool CONFIG_FORCE y define_bool CONFIG_FORCE y
fi
if [ "$CONFIG_LOPEC" = "y" -o "$CONFIG_SANDPOINT_X3" = "y" ]; then
define_bool CONFIG_EPIC_SERIAL_MODE y
fi
fi fi
if [ "$CONFIG_FORCE" = "y" -o "$CONFIG_MENF1" = "y" \ if [ "$CONFIG_FORCE" = "y" -o "$CONFIG_MENF1" = "y" \
...@@ -147,13 +153,6 @@ if [ "$CONFIG_MVME5100" = "y" ]; then ...@@ -147,13 +153,6 @@ if [ "$CONFIG_MVME5100" = "y" ]; then
bool 'MVME5100 configured with an IPMC761' CONFIG_MVME5100_IPMC761_PRESENT bool 'MVME5100 configured with an IPMC761' CONFIG_MVME5100_IPMC761_PRESENT
fi fi
if [ "$CONFIG_SANDPOINT" = "y" ]; then
bool 'Sandpoint X3' CONFIG_SANDPOINT_X3
if [ "$CONFIG_SANDPOINT_X3" = "y" ]; then
define_bool CONFIG_EPIC_SERIAL_MODE y
fi
fi
if [ "$CONFIG_SPRUCE" = "y" ]; then if [ "$CONFIG_SPRUCE" = "y" ]; then
bool 'Spruce baud clock support' CONFIG_SPRUCE_BAUD_33M bool 'Spruce baud clock support' CONFIG_SPRUCE_BAUD_33M
fi fi
...@@ -620,9 +619,10 @@ fi ...@@ -620,9 +619,10 @@ fi
if [ "$CONFIG_ALL_PPC" = "y" ]; then if [ "$CONFIG_ALL_PPC" = "y" ]; then
bool 'Support for early boot text console (BootX or OpenFirmware only)' CONFIG_BOOTX_TEXT bool 'Support for early boot text console (BootX or OpenFirmware only)' CONFIG_BOOTX_TEXT
fi fi
if [ "$CONFIG_MCPN765" = "y" -o "$CONFIG_SANDPOINT" = "y" \ if [ "$CONFIG_4xx" = "y" -o "$CONFIG_GT64260" = "y" \
-o "$CONFIG_ZX4500" = "y" -o "$CONFIG_PRPMC800" = "y" \ -o "$CONFIG_LOPEC" = "y" -o "$CONFIG_MCPN765" = "y" \
-o "$CONFIG_4xx" = "y" -o "$CONFIG_GT64260" = "y" ]; then -o "$CONFIG_PRPMC800" = "y" -o "$CONFIG_SANDPOINT" = "y" \
-o "$CONFIG_ZX4500" = "y" ]; then
bool 'Support for early boot texts over serial port' CONFIG_SERIAL_TEXT_DEBUG bool 'Support for early boot texts over serial port' CONFIG_SERIAL_TEXT_DEBUG
fi fi
endmenu endmenu
...@@ -11,7 +11,7 @@ ...@@ -11,7 +11,7 @@
#include <asm/io.h> #include <asm/io.h>
#include <asm/i8259.h> #include <asm/i8259.h>
static volatile char *pci_intack; /* RO, gives us the irq vector */ static volatile unsigned char *pci_intack; /* RO, gives us the irq vector */
unsigned char cached_8259[2] = { 0xff, 0xff }; unsigned char cached_8259[2] = { 0xff, 0xff };
#define cached_A1 (cached_8259[0]) #define cached_A1 (cached_8259[0])
...@@ -24,13 +24,13 @@ int i8259_pic_irq_offset; ...@@ -24,13 +24,13 @@ int i8259_pic_irq_offset;
/* Acknowledge the irq using the PCI host bridge's interrupt acknowledge /* Acknowledge the irq using the PCI host bridge's interrupt acknowledge
* feature. (Polling is somehow broken on some IBM and Motorola PReP boxes.) * feature. (Polling is somehow broken on some IBM and Motorola PReP boxes.)
*/ */
int i8259_irq(void) int i8259_irq(struct pt_regs *regs)
{ {
int irq; int irq;
spin_lock/*_irqsave*/(&i8259_lock/*, flags*/); spin_lock/*_irqsave*/(&i8259_lock/*, flags*/);
irq = *pci_intack & 0xff; irq = *pci_intack;
if (irq==7) { if (irq==7) {
/* /*
* This may be a spurious interrupt. * This may be a spurious interrupt.
...@@ -171,6 +171,10 @@ static struct resource pic_edgectrl_iores = { ...@@ -171,6 +171,10 @@ static struct resource pic_edgectrl_iores = {
"8259 edge control", 0x4d0, 0x4d1, IORESOURCE_BUSY "8259 edge control", 0x4d0, 0x4d1, IORESOURCE_BUSY
}; };
/* i8259_init()
* intack_addr - PCI interrupt acknowledge (real) address which will return
* the active irq from the 8259
*/
void __init i8259_init(long intack_addr) void __init i8259_init(long intack_addr)
{ {
unsigned long flags; unsigned long flags;
...@@ -205,6 +209,9 @@ void __init i8259_init(long intack_addr) ...@@ -205,6 +209,9 @@ void __init i8259_init(long intack_addr)
request_resource(&ioport_resource, &pic2_iores); request_resource(&ioport_resource, &pic2_iores);
request_resource(&ioport_resource, &pic_edgectrl_iores); request_resource(&ioport_resource, &pic_edgectrl_iores);
if (intack_addr) /* XXX remove me after board maintainers fix their i8259_init calls */
if (intack_addr == 0)
panic("You must supply a PCI interrupt acknowledge address to i8259_init()\n");
pci_intack = ioremap(intack_addr, 1); pci_intack = ioremap(intack_addr, 1);
} }
...@@ -34,6 +34,11 @@ ...@@ -34,6 +34,11 @@
void* OpenPIC_Addr; void* OpenPIC_Addr;
static volatile struct OpenPIC *OpenPIC = NULL; static volatile struct OpenPIC *OpenPIC = NULL;
/*
* We define OpenPIC_InitSenses table thusly:
* bit 0x1: sense, 0 for edge and 1 for level.
* bit 0x2: polarity, 0 for negative, 1 for positive.
*/
u_int OpenPIC_NumInitSenses __initdata = 0; u_int OpenPIC_NumInitSenses __initdata = 0;
u_char *OpenPIC_InitSenses __initdata = NULL; u_char *OpenPIC_InitSenses __initdata = NULL;
extern int use_of_interrupt_tree; extern int use_of_interrupt_tree;
...@@ -41,16 +46,12 @@ extern int use_of_interrupt_tree; ...@@ -41,16 +46,12 @@ extern int use_of_interrupt_tree;
static u_int NumProcessors; static u_int NumProcessors;
static u_int NumSources; static u_int NumSources;
static int open_pic_irq_offset; static int open_pic_irq_offset;
static volatile unsigned char* chrp_int_ack_special;
static volatile OpenPIC_Source *ISR[NR_IRQS]; static volatile OpenPIC_Source *ISR[NR_IRQS];
/* Global Operations */ /* Global Operations */
static void openpic_disable_8259_pass_through(void); static void openpic_disable_8259_pass_through(void);
static void openpic_set_priority(u_int pri); static void openpic_set_priority(u_int pri);
static void openpic_set_spurious(u_int vector); static void openpic_set_spurious(u_int vector);
static void openpic_enable_sie(void);
static void openpic_eicr_set_clk(u_int clkval);
static void openpic_eicr_set_clk(u_int clkval);
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
/* Interprocessor Interrupts */ /* Interprocessor Interrupts */
...@@ -73,7 +74,6 @@ static void openpic_mapirq(u_int irq, u_int cpumask, u_int keepmask); ...@@ -73,7 +74,6 @@ static void openpic_mapirq(u_int irq, u_int cpumask, u_int keepmask);
* These functions are not used but the code is kept here * These functions are not used but the code is kept here
* for completeness and future reference. * for completeness and future reference.
*/ */
static void openpic_reset(void);
#ifdef notused #ifdef notused
static void openpic_enable_8259_pass_through(void); static void openpic_enable_8259_pass_through(void);
static u_int openpic_get_priority(void); static u_int openpic_get_priority(void);
...@@ -263,6 +263,31 @@ static void openpic_safe_writefield_IPI(volatile u_int *addr, u_int mask, u_int ...@@ -263,6 +263,31 @@ static void openpic_safe_writefield_IPI(volatile u_int *addr, u_int mask, u_int
} }
#endif /* CONFIG_SMP */ #endif /* CONFIG_SMP */
#if defined(CONFIG_EPIC_SERIAL_MODE) || defined(CONFIG_PMAC_PBOOK)
static void openpic_reset(void)
{
openpic_setfield(&OpenPIC->Global.Global_Configuration0,
OPENPIC_CONFIG_RESET);
while (openpic_readfield(&OpenPIC->Global.Global_Configuration0,
OPENPIC_CONFIG_RESET))
mb();
}
#endif
#ifdef CONFIG_EPIC_SERIAL_MODE
static void openpic_enable_sie(void)
{
openpic_setfield(&OpenPIC->Global.Global_Configuration1,
OPENPIC_EICR_SIE);
}
static void openpic_eicr_set_clk(u_int clkval)
{
openpic_writefield(&OpenPIC->Global.Global_Configuration1,
OPENPIC_EICR_S_CLK_MASK, (clkval << 28));
}
#endif
void openpic_set_sources(int first_irq, int num_irqs, void *first_ISR) void openpic_set_sources(int first_irq, int num_irqs, void *first_ISR)
{ {
volatile OpenPIC_Source *src = first_ISR; volatile OpenPIC_Source *src = first_ISR;
...@@ -277,8 +302,7 @@ void openpic_set_sources(int first_irq, int num_irqs, void *first_ISR) ...@@ -277,8 +302,7 @@ void openpic_set_sources(int first_irq, int num_irqs, void *first_ISR)
ISR[i] = src; ISR[i] = src;
} }
void __init openpic_init(int main_pic, int offset, unsigned char* chrp_ack, void __init openpic_init(int main_pic, int offset, int programmer_switch_irq)
int programmer_switch_irq)
{ {
u_int t, i; u_int t, i;
u_int timerfreq; u_int timerfreq;
...@@ -331,7 +355,6 @@ void __init openpic_init(int main_pic, int offset, unsigned char* chrp_ack, ...@@ -331,7 +355,6 @@ void __init openpic_init(int main_pic, int offset, unsigned char* chrp_ack,
return; return;
open_pic_irq_offset = offset; open_pic_irq_offset = offset;
chrp_int_ack_special = (volatile unsigned char*)chrp_ack;
/* Initialize timer interrupts */ /* Initialize timer interrupts */
if ( ppc_md.progress ) ppc_md.progress("openpic timer",0x3ba); if ( ppc_md.progress ) ppc_md.progress("openpic timer",0x3ba);
...@@ -359,14 +382,8 @@ void __init openpic_init(int main_pic, int offset, unsigned char* chrp_ack, ...@@ -359,14 +382,8 @@ void __init openpic_init(int main_pic, int offset, unsigned char* chrp_ack,
openpic_set_priority(0xf); openpic_set_priority(0xf);
/* SIOint (8259 cascade) is special */ /* Init all external sources, including possibly the cascade. */
if (offset) { for (i = 0; i < NumSources; i++) {
openpic_initirq(0, 8, offset, 1, 1);
openpic_mapirq(0, 1<<0, 0);
}
/* Init all external sources */
for (i = 1; i < NumSources; i++) {
int pri, sense; int pri, sense;
if (ISR[i] == 0) if (ISR[i] == 0)
...@@ -376,12 +393,18 @@ void __init openpic_init(int main_pic, int offset, unsigned char* chrp_ack, ...@@ -376,12 +393,18 @@ void __init openpic_init(int main_pic, int offset, unsigned char* chrp_ack,
openpic_disable_irq(i+offset); openpic_disable_irq(i+offset);
pri = (i == programmer_switch_irq)? 9: 8; pri = (i == programmer_switch_irq)? 9: 8;
/*
* We find the vale from either the InitSenses table
* or assume a negative polarity level interrupt.
*/
sense = (i < OpenPIC_NumInitSenses)? OpenPIC_InitSenses[i]: 1; sense = (i < OpenPIC_NumInitSenses)? OpenPIC_InitSenses[i]: 1;
if (sense)
if ((sense & IRQ_SENSE_MASK) == 1)
irq_desc[i+offset].status = IRQ_LEVEL; irq_desc[i+offset].status = IRQ_LEVEL;
/* Enabled, Priority 8 or 9 */ /* Enabled, Priority 8 or 9 */
openpic_initirq(i, pri, i+offset, !sense, sense); openpic_initirq(i, pri, i+offset, (sense & IRQ_POLARITY_MASK),
(sense & IRQ_SENSE_MASK));
/* Processor 0 */ /* Processor 0 */
openpic_mapirq(i, 1<<0, 0); openpic_mapirq(i, 1<<0, 0);
} }
...@@ -400,40 +423,16 @@ void __init openpic_init(int main_pic, int offset, unsigned char* chrp_ack, ...@@ -400,40 +423,16 @@ void __init openpic_init(int main_pic, int offset, unsigned char* chrp_ack,
"82c59 cascade", NULL)) "82c59 cascade", NULL))
printk("Unable to get OpenPIC IRQ 0 for cascade\n"); printk("Unable to get OpenPIC IRQ 0 for cascade\n");
} }
#ifdef CONFIG_EPIC_SERIAL_MODE
openpic_disable_8259_pass_through(); openpic_disable_8259_pass_through();
#ifdef CONFIG_EPIC_SERIAL_MODE
openpic_eicr_set_clk(7); /* Slowest value until we know better */ openpic_eicr_set_clk(7); /* Slowest value until we know better */
openpic_enable_sie(); openpic_enable_sie();
openpic_set_priority(0);
#else
openpic_disable_8259_pass_through();
openpic_set_priority(0);
#endif #endif
openpic_set_priority(0);
if (ppc_md.progress) ppc_md.progress("openpic exit",0x222); if (ppc_md.progress) ppc_md.progress("openpic exit",0x222);
} }
static void openpic_reset(void)
{
openpic_setfield(&OpenPIC->Global.Global_Configuration0,
OPENPIC_CONFIG_RESET);
while (openpic_readfield(&OpenPIC->Global.Global_Configuration0,
OPENPIC_CONFIG_RESET))
mb();
}
static void openpic_enable_sie(void)
{
openpic_setfield(&OpenPIC->Global.Global_Configuration1,
OPENPIC_EICR_SIE);
}
static void openpic_eicr_set_clk(u_int clkval)
{
openpic_writefield(&OpenPIC->Global.Global_Configuration1,
OPENPIC_EICR_S_CLK_MASK, (clkval << 28));
}
#ifdef notused #ifdef notused
static void openpic_enable_8259_pass_through(void) static void openpic_enable_8259_pass_through(void)
{ {
...@@ -533,7 +532,9 @@ void openpic_reset_processor_phys(u_int mask) ...@@ -533,7 +532,9 @@ void openpic_reset_processor_phys(u_int mask)
openpic_write(&OpenPIC->Global.Processor_Initialization, mask); openpic_write(&OpenPIC->Global.Processor_Initialization, mask);
} }
#if defined(CONFIG_SMP) || defined(CONFIG_PMAC_PBOOK)
static spinlock_t openpic_setup_lock = SPIN_LOCK_UNLOCKED; static spinlock_t openpic_setup_lock = SPIN_LOCK_UNLOCKED;
#endif
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
/* /*
...@@ -812,14 +813,8 @@ openpic_get_irq(struct pt_regs *regs) ...@@ -812,14 +813,8 @@ openpic_get_irq(struct pt_regs *regs)
/* Yep - because openpic !=> i8259, for one thing. -VAL */ /* Yep - because openpic !=> i8259, for one thing. -VAL */
if (open_pic_irq_offset && irq == open_pic_irq_offset) if (open_pic_irq_offset && irq == open_pic_irq_offset)
{ {
/*
* This magic address generates a PCI IACK cycle.
*/
if ( chrp_int_ack_special )
irq = *chrp_int_ack_special;
#ifndef CONFIG_GEMINI #ifndef CONFIG_GEMINI
else irq = i8259_irq(regs); /* get IRQ from cascade */
irq = i8259_poll();
#endif #endif
openpic_eoi(); openpic_eoi();
} }
......
...@@ -773,7 +773,12 @@ prom_get_irq_senses(unsigned char *senses, int off, int max) ...@@ -773,7 +773,12 @@ prom_get_irq_senses(unsigned char *senses, int off, int max)
for (j = 0; j < np->n_intrs; j++) { for (j = 0; j < np->n_intrs; j++) {
i = np->intrs[j].line; i = np->intrs[j].line;
if (i >= off && i < max) if (i >= off && i < max)
senses[i-off] = np->intrs[j].sense; if (np->intrs[j].sense == 1)
senses[i-off] = (IRQ_SENSE_LEVEL
| IRQ_POLARITY_NEGATIVE);
else
senses[i-off] = (IRQ_SENSE_EDGE
| IRQ_POLARITY_POSITIVE);
} }
} }
} }
......
...@@ -386,7 +386,7 @@ void __init chrp_init_IRQ(void) ...@@ -386,7 +386,7 @@ void __init chrp_init_IRQ(void)
{ {
struct device_node *np; struct device_node *np;
int i; int i;
unsigned char* chrp_int_ack_special = 0; unsigned long chrp_int_ack;
unsigned char init_senses[NR_IRQS - NUM_8259_INTERRUPTS]; unsigned char init_senses[NR_IRQS - NUM_8259_INTERRUPTS];
int nmi_irq = -1; int nmi_irq = -1;
#if defined(CONFIG_VT) && defined(CONFIG_ADB_KEYBOARD) && defined(XMON) #if defined(CONFIG_VT) && defined(CONFIG_ADB_KEYBOARD) && defined(XMON)
...@@ -396,14 +396,14 @@ void __init chrp_init_IRQ(void) ...@@ -396,14 +396,14 @@ void __init chrp_init_IRQ(void)
for (np = find_devices("pci"); np != NULL; np = np->next) { for (np = find_devices("pci"); np != NULL; np = np->next) {
unsigned int *addrp = (unsigned int *) unsigned int *addrp = (unsigned int *)
get_property(np, "8259-interrupt-acknowledge", NULL); get_property(np, "8259-interrupt-acknowledge", NULL);
if (addrp == NULL) if (addrp == NULL)
continue; continue;
chrp_int_ack_special = (unsigned char *) chrp_int_ack = addrp[prom_n_addr_cells(np)-1];
ioremap(addrp[prom_n_addr_cells(np)-1], 1);
break; break;
} }
if (np == NULL) if (np == NULL)
printk("Cannot find pci to get ack address\n"); printk(KERN_ERR "Cannot find PCI interrupt acknowledge address\n");
chrp_find_openpic(); chrp_find_openpic();
...@@ -411,11 +411,11 @@ void __init chrp_init_IRQ(void) ...@@ -411,11 +411,11 @@ void __init chrp_init_IRQ(void)
OpenPIC_InitSenses = init_senses; OpenPIC_InitSenses = init_senses;
OpenPIC_NumInitSenses = NR_IRQS - NUM_8259_INTERRUPTS; OpenPIC_NumInitSenses = NR_IRQS - NUM_8259_INTERRUPTS;
openpic_init(1, NUM_8259_INTERRUPTS, chrp_int_ack_special, nmi_irq); openpic_init(1, NUM_8259_INTERRUPTS, nmi_irq);
for (i = 0; i < NUM_8259_INTERRUPTS; i++) for (i = 0; i < NUM_8259_INTERRUPTS; i++)
irq_desc[i].handler = &i8259_pic; irq_desc[i].handler = &i8259_pic;
i8259_init(0); i8259_init(chrp_int_ack);
#if defined(CONFIG_VT) && defined(CONFIG_ADB_KEYBOARD) && defined(XMON) #if defined(CONFIG_VT) && defined(CONFIG_ADB_KEYBOARD) && defined(XMON)
/* see if there is a keyboard in the device tree /* see if there is a keyboard in the device tree
......
...@@ -6,7 +6,7 @@ ...@@ -6,7 +6,7 @@
* Author: Dan Cox * Author: Dan Cox
* danc@mvista.com * danc@mvista.com
* *
* Copyright 2001 MontaVista Software Inc. * Copyright 2001-2002 MontaVista Software Inc.
* *
* This program is free software; you can redistribute it and/or modify it * This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the * under the terms of the GNU General Public License as published by the
...@@ -44,21 +44,35 @@ ...@@ -44,21 +44,35 @@
#include <asm/bootinfo.h> #include <asm/bootinfo.h>
#include <asm/mpc10x.h> #include <asm/mpc10x.h>
#define LOPEC_SIO_IRQ 16
#define LOPEC_SYSSTAT1 0xffe00000
extern void lopec_find_bridges(void); extern void lopec_find_bridges(void);
static u_char lopec_openpic_initsenses[32] __initdata = { /*
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, * Define all of the IRQ senses and polarities. Taken from the
0, 1, 0, 1, 0, 0, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1 * LoPEC Programmer's Reference Guide.
*/
static u_char lopec_openpic_initsenses[16] __initdata = {
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* IRQ 0 */
(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ 1 */
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* IRQ 2 */
(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ 3 */
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* IRQ 4 */
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* IRQ 5 */
(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ 6 */
(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ 7 */
(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ 8 */
(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ 9 */
(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ 10 */
(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ 11 */
(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ 12 */
(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* IRQ 13 */
(IRQ_SENSE_EDGE | IRQ_POLARITY_NEGATIVE), /* IRQ 14 */
(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE) /* IRQ 15 */
}; };
static int static int
lopec_show_cpuinfo(struct seq_file *m) lopec_show_cpuinfo(struct seq_file *m)
{ {
seq_printf(m, "machine\t\t: Motorola LoPec\n"); seq_printf(m, "machine\t\t: Motorola LoPEC\n");
return 0; return 0;
} }
...@@ -74,6 +88,7 @@ lopec_irq_cannonicalize(u32 irq) ...@@ -74,6 +88,7 @@ lopec_irq_cannonicalize(u32 irq)
static void static void
lopec_restart(char *cmd) lopec_restart(char *cmd)
{ {
#define LOPEC_SYSSTAT1 0xffe00000
/* force a hard reset, if possible */ /* force a hard reset, if possible */
unsigned char reg = *((unsigned char *) LOPEC_SYSSTAT1); unsigned char reg = *((unsigned char *) LOPEC_SYSSTAT1);
reg |= 0x80; reg |= 0x80;
...@@ -81,6 +96,7 @@ lopec_restart(char *cmd) ...@@ -81,6 +96,7 @@ lopec_restart(char *cmd)
__cli(); __cli();
while(1); while(1);
#undef LOPEC_SYSSTAT1
} }
static void static void
...@@ -96,27 +112,6 @@ lopec_power_off(void) ...@@ -96,27 +112,6 @@ lopec_power_off(void)
lopec_halt(); lopec_halt();
} }
static int
lopec_get_irq(struct pt_regs *regs)
{
int irq, cascade_irq;
irq = openpic_irq();
if (irq == LOPEC_SIO_IRQ) {
cascade_irq = i8259_poll();
if (cascade_irq != -1) {
irq = cascade_irq;
openpic_eoi();
}
}
else if (irq == OPENPIC_VEC_SPURIOUS)
irq = -1;
return irq;
}
#if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE) #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
int lopec_ide_ports_known = 0; int lopec_ide_ports_known = 0;
static ide_ioreg_t lopec_ide_regbase[MAX_HWIFS]; static ide_ioreg_t lopec_ide_regbase[MAX_HWIFS];
...@@ -202,24 +197,41 @@ lopec_init_IRQ(void) ...@@ -202,24 +197,41 @@ lopec_init_IRQ(void)
{ {
int i; int i;
/*
* Provide the open_pic code with the correct table of interrupts.
*/
OpenPIC_InitSenses = lopec_openpic_initsenses; OpenPIC_InitSenses = lopec_openpic_initsenses;
OpenPIC_NumInitSenses = sizeof(lopec_openpic_initsenses); OpenPIC_NumInitSenses = sizeof(lopec_openpic_initsenses);
openpic_init(1, 0, NULL, -1);
/*
* We need to tell openpic_set_sources where things actually are.
* mpc10x_common will setup OpenPIC_Addr at ioremap(EUMB phys base +
* EPIC offset (0x40000)); The EPIC IRQ Register Address Map -
* Interrupt Source Configuration Registers gives these numbers
* as offsets starting at 0x50200, we need to adjust occordinly.
*/
/* Map serial interrupts 0-15 */
openpic_set_sources(0, 16, OpenPIC_Addr + 0x10200);
/* Skip reserved space and map i2c and DMA Ch[01] */
openpic_set_sources(16, 3, OpenPIC_Addr + 0x11020);
/* Skip reserved space and map Message Unit Interrupt (I2O) */
openpic_set_sources(19, 1, OpenPIC_Addr + 0x110C0);
openpic_init(1, NUM_8259_INTERRUPTS, -1);
/* Map i8259 interrupts */
for(i = 0; i < NUM_8259_INTERRUPTS; i++) for(i = 0; i < NUM_8259_INTERRUPTS; i++)
irq_desc[i].handler = &i8259_pic; irq_desc[i].handler = &i8259_pic;
if (request_irq(LOPEC_SIO_IRQ, no_action, SA_INTERRUPT, /*
"8259 cascade to EPIC", NULL)) { * The EPIC allows for a read in the range of 0xFEF00000 ->
printk("Unable to get EPIC %d for cascade.\n", * 0xFEFFFFFF to generate a PCI interrupt-acknowledge transaction.
LOPEC_SIO_IRQ); */
} i8259_init(0xfef00000);
i8259_init(NULL);
} }
static void __init void __init
lopec_init2(void) lopec_request_io(void)
{ {
outb(0x00, 0x4d0); outb(0x00, 0x4d0);
outb(0xc0, 0x4d1); outb(0xc0, 0x4d1);
...@@ -232,6 +244,8 @@ lopec_init2(void) ...@@ -232,6 +244,8 @@ lopec_init2(void)
request_region(0xc0, 0x20, "dma2"); request_region(0xc0, 0x20, "dma2");
} }
arch_initcall(lopec_request_io);
static void __init static void __init
lopec_map_io(void) lopec_map_io(void)
{ {
...@@ -255,10 +269,47 @@ lopec_set_bat(void) ...@@ -255,10 +269,47 @@ lopec_set_bat(void)
: "=r" (batu), "=r" (batl)); : "=r" (batu), "=r" (batl));
} }
#ifdef CONFIG_SERIAL_TEXT_DEBUG
#include <linux/serial.h>
#include <linux/serialP.h>
#include <linux/serial_reg.h>
#include <asm/serial.h>
static struct serial_state rs_table[RS_TABLE_SIZE] = {
SERIAL_PORT_DFNS /* Defined in <asm/serial.h> */
};
volatile unsigned char *com_port;
volatile unsigned char *com_port_lsr;
static void
serial_writechar(char c)
{
while ((*com_port_lsr & UART_LSR_THRE) == 0)
;
*com_port = c;
}
void
lopec_progress(char *s, unsigned short hex)
{
volatile char c;
com_port = (volatile unsigned char *) rs_table[0].port;
com_port_lsr = com_port + UART_LSR;
while ((c = *s++) != 0)
serial_writechar(c);
/* Most messages don't have a newline in them */
serial_writechar('\n');
serial_writechar('\r');
}
#endif /* CONFIG_SERIAL_TEXT_DEBUG */
static unsigned long __init static unsigned long __init
lopec_find_end_of_memory(void) lopec_find_end_of_memory(void)
{ {
lopec_set_bat();
return mpc10x_get_mem_size(MPC10X_MEM_MAP_B); return mpc10x_get_mem_size(MPC10X_MEM_MAP_B);
} }
...@@ -281,7 +332,7 @@ lopec_setup_arch(void) ...@@ -281,7 +332,7 @@ lopec_setup_arch(void)
else else
#elif defined(CONFIG_ROOT_NFS) #elif defined(CONFIG_ROOT_NFS)
ROOT_DEV = to_kdev_t(0x00ff); ROOT_DEV = to_kdev_t(0x00ff);
#elif defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_ID_MODULE) #elif defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
ROOT_DEV = to_kdev_t(0x0301); ROOT_DEV = to_kdev_t(0x0301);
#else #else
ROOT_DEV = to_kdev_t(0x0801); ROOT_DEV = to_kdev_t(0x0801);
...@@ -297,6 +348,7 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5, ...@@ -297,6 +348,7 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
unsigned long r6, unsigned long r7) unsigned long r6, unsigned long r7)
{ {
parse_bootinfo(find_bootinfo()); parse_bootinfo(find_bootinfo());
lopec_set_bat();
isa_io_base = MPC10X_MAPB_ISA_IO_BASE; isa_io_base = MPC10X_MAPB_ISA_IO_BASE;
isa_mem_base = MPC10X_MAPB_ISA_MEM_BASE; isa_mem_base = MPC10X_MAPB_ISA_MEM_BASE;
...@@ -309,8 +361,7 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5, ...@@ -309,8 +361,7 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
ppc_md.show_cpuinfo = lopec_show_cpuinfo; ppc_md.show_cpuinfo = lopec_show_cpuinfo;
ppc_md.irq_cannonicalize = lopec_irq_cannonicalize; ppc_md.irq_cannonicalize = lopec_irq_cannonicalize;
ppc_md.init_IRQ = lopec_init_IRQ; ppc_md.init_IRQ = lopec_init_IRQ;
ppc_md.get_irq = lopec_get_irq; ppc_md.get_irq = openpic_get_irq;
ppc_md.init = lopec_init2;
ppc_md.restart = lopec_restart; ppc_md.restart = lopec_restart;
ppc_md.power_off = lopec_power_off; ppc_md.power_off = lopec_power_off;
...@@ -332,4 +383,7 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5, ...@@ -332,4 +383,7 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
ppc_ide_md.default_io_base = lopec_ide_default_io_base; ppc_ide_md.default_io_base = lopec_ide_default_io_base;
ppc_ide_md.ide_init_hwif = lopec_ide_init_hwif_ports; ppc_ide_md.ide_init_hwif = lopec_ide_init_hwif_ports;
#endif #endif
#ifdef CONFIG_SERIAL_TEXT_DEBUG
ppc_md.progress = lopec_progress;
#endif
} }
...@@ -373,7 +373,7 @@ pmac_pic_init(void) ...@@ -373,7 +373,7 @@ pmac_pic_init(void)
ppc_md.get_irq = openpic_get_irq; ppc_md.get_irq = openpic_get_irq;
OpenPIC_Addr = ioremap(irqctrler->addrs[0].address, OpenPIC_Addr = ioremap(irqctrler->addrs[0].address,
irqctrler->addrs[0].size); irqctrler->addrs[0].size);
openpic_init(1, 0, 0, nmi_irq); openpic_init(1, 0, nmi_irq);
#ifdef CONFIG_XMON #ifdef CONFIG_XMON
if (nmi_irq >= 0) if (nmi_irq >= 0)
request_irq(nmi_irq, xmon_irq, 0, request_irq(nmi_irq, xmon_irq, 0,
......
...@@ -666,21 +666,21 @@ static struct pci_ops prep_pci_ops = ...@@ -666,21 +666,21 @@ static struct pci_ops prep_pci_ops =
#define MOT_PROC2_BIT 0x800 #define MOT_PROC2_BIT 0x800
static u_char mvme2600_openpic_initsenses[] __initdata = { static u_char mvme2600_openpic_initsenses[] __initdata = {
1, /* MVME2600_INT_SIO */ (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_SIO */
0, /* MVME2600_INT_FALCN_ECC_ERR */ (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* MVME2600_INT_FALCN_ECC_ERR */
1, /* MVME2600_INT_PCI_ETHERNET */ (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_ETHERNET */
1, /* MVME2600_INT_PCI_SCSI */ (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_SCSI */
1, /* MVME2600_INT_PCI_GRAPHICS */ (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_GRAPHICS */
1, /* MVME2600_INT_PCI_VME0 */ (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_VME0 */
1, /* MVME2600_INT_PCI_VME1 */ (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_VME1 */
1, /* MVME2600_INT_PCI_VME2 */ (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_VME2 */
1, /* MVME2600_INT_PCI_VME3 */ (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_VME3 */
1, /* MVME2600_INT_PCI_INTA */ (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_INTA */
1, /* MVME2600_INT_PCI_INTB */ (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_INTB */
1, /* MVME2600_INT_PCI_INTC */ (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_INTC */
1, /* MVME2600_INT_PCI_INTD */ (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_PCI_INTD */
1, /* MVME2600_INT_LM_SIG0 */ (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_LM_SIG0 */
1, /* MVME2600_INT_LM_SIG1 */ (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* MVME2600_INT_LM_SIG1 */
}; };
#define MOT_RAVEN_PRESENT 0x1 #define MOT_RAVEN_PRESENT 0x1
......
...@@ -685,19 +685,13 @@ prep_irq_cannonicalize(u_int irq) ...@@ -685,19 +685,13 @@ prep_irq_cannonicalize(u_int irq)
} }
} }
static int __prep
prep_get_irq(struct pt_regs *regs)
{
return i8259_irq();
}
static void __init static void __init
prep_init_IRQ(void) prep_init_IRQ(void)
{ {
int i; int i;
if (OpenPIC_Addr != NULL) if (OpenPIC_Addr != NULL)
openpic_init(1, NUM_8259_INTERRUPTS, 0, -1); openpic_init(1, NUM_8259_INTERRUPTS, -1);
for ( i = 0 ; i < NUM_8259_INTERRUPTS ; i++ ) for ( i = 0 ; i < NUM_8259_INTERRUPTS ; i++ )
irq_desc[i].handler = &i8259_pic; irq_desc[i].handler = &i8259_pic;
i8259_init(0xbffffff0); /* PCI interrupt ack address for MPC105 and 106 */ i8259_init(0xbffffff0); /* PCI interrupt ack address for MPC105 and 106 */
...@@ -867,7 +861,7 @@ prep_init(unsigned long r3, unsigned long r4, unsigned long r5, ...@@ -867,7 +861,7 @@ prep_init(unsigned long r3, unsigned long r4, unsigned long r5,
ppc_md.irq_cannonicalize = prep_irq_cannonicalize; ppc_md.irq_cannonicalize = prep_irq_cannonicalize;
ppc_md.init_IRQ = prep_init_IRQ; ppc_md.init_IRQ = prep_init_IRQ;
/* this gets changed later on if we have an OpenPIC -- Cort */ /* this gets changed later on if we have an OpenPIC -- Cort */
ppc_md.get_irq = prep_get_irq; ppc_md.get_irq = i8259_irq;
ppc_md.init = prep_init2; ppc_md.init = prep_init2;
ppc_md.restart = prep_restart; ppc_md.restart = prep_restart;
......
...@@ -10,7 +10,7 @@ ...@@ -10,7 +10,7 @@
extern struct hw_interrupt_type i8259_pic; extern struct hw_interrupt_type i8259_pic;
void i8259_init(long); void i8259_init(long);
int i8259_irq(void); int i8259_irq(struct pt_regs *regs);
int i8259_poll(void); int i8259_poll(void);
#endif /* _PPC_KERNEL_i8259_H */ #endif /* _PPC_KERNEL_i8259_H */
...@@ -28,6 +28,19 @@ ...@@ -28,6 +28,19 @@
#define OPENPIC_VEC_IPI 72 /* and up */ #define OPENPIC_VEC_IPI 72 /* and up */
#define OPENPIC_VEC_SPURIOUS 127 #define OPENPIC_VEC_SPURIOUS 127
/*
* For the OpenPIC_InitSenses table, we include both the sense
* and polarity in one number and mask out the value we want
* later on. -- Tom
*/
#define IRQ_SENSE_MASK 0x1
#define IRQ_SENSE_LEVEL 0x1
#define IRQ_SENSE_EDGE 0x0
#define IRQ_POLARITY_MASK 0x2
#define IRQ_POLARITY_POSITIVE 0x2
#define IRQ_POLARITY_NEGATIVE 0x0
/* OpenPIC IRQ controller structure */ /* OpenPIC IRQ controller structure */
extern struct hw_interrupt_type open_pic; extern struct hw_interrupt_type open_pic;
...@@ -42,7 +55,7 @@ extern void* OpenPIC_Addr; ...@@ -42,7 +55,7 @@ extern void* OpenPIC_Addr;
/* Exported functions */ /* Exported functions */
extern void openpic_set_sources(int first_irq, int num_irqs, void *isr); extern void openpic_set_sources(int first_irq, int num_irqs, void *isr);
extern void openpic_init(int, int, unsigned char *, int); extern void openpic_init(int, int, int);
extern u_int openpic_irq(void); extern u_int openpic_irq(void);
extern void openpic_eoi(void); extern void openpic_eoi(void);
extern void openpic_request_IPIs(void); extern void openpic_request_IPIs(void);
......
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