Commit 87507500 authored by Chao Xie's avatar Chao Xie Committed by Russell King

ARM: 6524/1: GIC irq desciptor bug fix

gic_set_cpu will directly use irq_desc[]. If CONFIG_SPARSE_IRQ is
enabled, there is no irq_desc[]. So we need use irq_to_desc(irq) to
get the descriptor for irq.
Signed-off-by: default avatarChao Xie <chao.xie@marvell.com>
Acked-by: default avatarKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent a5542a0f
...@@ -146,9 +146,15 @@ static int gic_set_cpu(unsigned int irq, const struct cpumask *mask_val) ...@@ -146,9 +146,15 @@ static int gic_set_cpu(unsigned int irq, const struct cpumask *mask_val)
unsigned int shift = (irq % 4) * 8; unsigned int shift = (irq % 4) * 8;
unsigned int cpu = cpumask_first(mask_val); unsigned int cpu = cpumask_first(mask_val);
u32 val; u32 val;
struct irq_desc *desc;
spin_lock(&irq_controller_lock); spin_lock(&irq_controller_lock);
irq_desc[irq].node = cpu; desc = irq_to_desc(irq);
if (desc == NULL) {
spin_unlock(&irq_controller_lock);
return -EINVAL;
}
desc->node = cpu;
val = readl(reg) & ~(0xff << shift); val = readl(reg) & ~(0xff << shift);
val |= 1 << (cpu + shift); val |= 1 << (cpu + shift);
writel(val, reg); writel(val, reg);
......
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