[PATCH] parisc: arch/parisc/kernel/perf_asm.S

Indentation and comment cleanup
Committed-by: Grant Grundler <grundler@parisc-linux.org>

arch/parisc/kernel/perf_asm.S

@@ -2,6 +2,7 @@
 /*    low-level asm for "intrigue" (PA8500-8700 CPU perf counters)
  * 
  *    Copyright (C) 2001 Randolph Chung <tausq at parisc-linux.org>
+ *    Copyright (C) 2001 Hewlett-Packard (Grant Grundler)
  * 
  *    This program is free software; you can redistribute it and/or modify
  *    it under the terms of the GNU General Public License as published by
@@ -87,35 +88,35 @@ perf_intrigue_disable_perf_counters:
 	.exit
 	.procend
 
-;************************************************************************
-;*																		*
-;* Name: perf_rdr_shift_in_W												*
-;*																		*
-;* Description:															*
-;*	This routine shifts data in from the RDR in arg0 and returns		*
-;*	the result in ret0.  If the RDR is <= 64 bits in length, it			*
-;*	is shifted shifted backup immediately.  This is to compensate		*
-;*	for RDR10 which has bits that preclude PDC stack operations			*
-;*	when they are in the wrong state.									*
-;*																		*
-;* Arguments:															*
-;*	arg0 : rdr to be read												*
-;*	arg1 : bit length of rdr											*
-;*																		*
-;* Returns:																*
-;*	ret0 = next 64 bits of rdr data from staging register				*
-;*																		*
-;* Register usage:														*
-;*	arg0 : rdr to be read												*
-;*	arg1 : bit length of rdr											*
-;*	%r24  - original DR2 value											*
-;*	%r1   - scratch														*
-;*  %r29  - scratch														*
-;*																		*
-;* Returns:																*
-;*	ret0 = RDR data (right justified)									*
-;*																		*
-;************************************************************************
+;***********************************************************************
+;*
+;* Name: perf_rdr_shift_in_W
+;*
+;* Description:
+;*	This routine shifts data in from the RDR in arg0 and returns
+;*	the result in ret0.  If the RDR is <= 64 bits in length, it
+;*	is shifted shifted backup immediately.  This is to compensate
+;*	for RDR10 which has bits that preclude PDC stack operations
+;*	when they are in the wrong state.
+;*
+;* Arguments:
+;*	arg0 : rdr to be read
+;*	arg1 : bit length of rdr
+;*
+;* Returns:
+;*	ret0 = next 64 bits of rdr data from staging register
+;*
+;* Register usage:
+;*	arg0 : rdr to be read
+;*	arg1 : bit length of rdr
+;*	%r24  - original DR2 value
+;*	%r1   - scratch
+;*  %r29  - scratch
+;*
+;* Returns:
+;*	ret0 = RDR data (right justified)
+;*
+;***********************************************************************
 
 	.export perf_rdr_shift_in_W,code
 perf_rdr_shift_in_W:
@@ -146,7 +147,7 @@ perf_rdr_shift_in_W:
 	nop
 	nop
 	nop
-	extrd,u		arg1,63,6,%r1    ; setup shift amount based on bits to move 
+	extrd,u		arg1,63,6,%r1	; setup shift amount by bits to move 
 
 	mtsar		%r1
 	shladd		arg0,2,%r0,%r1	; %r1 = 4 * RDR number
@@ -340,7 +341,7 @@ perf_rdr_shift_in_W:
 	;
 	; RDR 15 read sequence
 	;
-	sync				; RDR 15 read sequence
+	sync
 	ssm		0,0
 	SFDIAG		(15)
 	ssm		0,0
@@ -352,7 +353,7 @@ perf_rdr_shift_in_W:
 	;
 	; RDR 16 read sequence
 	;
-	sync				; RDR 16 read sequence
+	sync
 	ssm		0,0
 	SFDIAG		(16)
 	ssm		0,0
@@ -385,9 +386,9 @@ perf_rdr_shift_in_W:
 	ssm		0,0
 	b,n         perf_rdr_shift_in_W_leave
 
-;
-; RDR 19 read sequence
-;
+	;
+	; RDR 19 read sequence
+	;
 	b,n         perf_rdr_shift_in_W_leave
 	nop
 	nop
@@ -552,28 +553,28 @@ perf_rdr_shift_in_W_leave:
 	.procend
 
 
-;************************************************************************
-;*																		*
-;* Name: perf_rdr_shift_out_W												*
-;*																		*
-;* Description:															*
-;*	This routine moves data to the RDR's.  The double-word that			*
-;*	arg1 points to is loaded and moved into the staging register.		*
-;*	Then the STDIAG instruction for the RDR # in arg0 is called			*
-;*	to move the data to the RDR.										*
-;*																		*
-;* Arguments:															*
-;*	arg0 = rdr number													*
-;*	arg1 = 64-bit value to write										*
-;*	%r24 - DR2 | DR2_SLOW_RET											*
-;*	%r23 - original DR2 value											*
-;*																		*
-;* Returns:																*
-;*	None																*
-;*																		*
-;* Register usage:														*
-;*																		*
-;************************************************************************
+;***********************************************************************
+;*
+;* Name: perf_rdr_shift_out_W
+;*
+;* Description:
+;*	This routine moves data to the RDR's.  The double-word that
+;*	arg1 points to is loaded and moved into the staging register.
+;*	Then the STDIAG instruction for the RDR # in arg0 is called
+;*	to move the data to the RDR.
+;*
+;* Arguments:
+;*	arg0 = rdr number
+;*	arg1 = 64-bit value to write
+;*	%r24 - DR2 | DR2_SLOW_RET
+;*	%r23 - original DR2 value
+;*
+;* Returns:
+;*	None
+;*
+;* Register usage:
+;*
+;***********************************************************************
 
 	.export perf_rdr_shift_out_W,code
 perf_rdr_shift_out_W:
@@ -589,7 +590,6 @@ perf_rdr_shift_out_W:
 	MFDIAG_2	(23)
 	or		%r24,%r23,%r24
 	MTDIAG_2	(24)		; set DR2_SLOW_RET
-
 	MTDIAG_1	(25)		; data to the staging register
 	shladd		arg0,2,%r0,%r1	; %r1 = 4 * RDR number
 	blr		    %r1,%r0	; branch to 8-instruction sequence
@@ -986,34 +986,32 @@ perf_rdr_shift_out_W_leave:
 	.procend
 
 
-;**************************** CHRIS ***********************************
-
-;************************************************************************
-;*																		*
-;* Name: rdr_shift_in_U													*
-;*																		*
-;* Description:															*
-;*	This routine shifts data in from the RDR in arg0 and returns		*
-;*	the result in ret0.  If the RDR is <= 64 bits in length, it			*
-;*	is shifted shifted backup immediately.  This is to compensate		*
-;*	for RDR10 which has bits that preclude PDC stack operations			*
-;*	when they are in the wrong state.									*
-;*																		*
-;* Arguments:															*
-;*	arg0 : rdr to be read												*
-;*	arg1 : bit length of rdr											*
-;*																		*
-;* Returns:																*
-;*	ret0 = next 64 bits of rdr data from staging register				*
-;*																		*
-;* Register usage:														*
-;*	arg0 : rdr to be read						                        *
-;*	arg1 : bit length of rdr					                        *
-;*	%r24 - original DR2 value											*
-;*	%r23 - DR2 | DR2_SLOW_RET											*
-;*	%r1  - scratch														*
-;*																		*
-;************************************************************************
+;***********************************************************************
+;*
+;* Name: rdr_shift_in_U
+;*
+;* Description:
+;*	This routine shifts data in from the RDR in arg0 and returns
+;*	the result in ret0.  If the RDR is <= 64 bits in length, it
+;*	is shifted shifted backup immediately.  This is to compensate
+;*	for RDR10 which has bits that preclude PDC stack operations
+;*	when they are in the wrong state.
+;*
+;* Arguments:
+;*	arg0 : rdr to be read
+;*	arg1 : bit length of rdr
+;*
+;* Returns:
+;*	ret0 = next 64 bits of rdr data from staging register
+;*
+;* Register usage:
+;*	arg0 : rdr to be read						                        
+;*	arg1 : bit length of rdr					                        
+;*	%r24 - original DR2 value
+;*	%r23 - DR2 | DR2_SLOW_RET
+;*	%r1  - scratch
+;*
+;***********************************************************************
 
 	.export perf_rdr_shift_in_U,code
 perf_rdr_shift_in_U:
@@ -1347,30 +1345,30 @@ perf_rdr_shift_in_U_leave:
 	MTDIAG_2	(24)			; restore DR2
 	.procend
 
-;************************************************************************
-;*																		*
-;* Name: rdr_shift_out_U												*
-;*																		*
-;* Description:															*
-;*	This routine moves data to the RDR's.  The double-word that			*
-;*	arg1 points to is loaded and moved into the staging register.		*
-;*	Then the STDIAG instruction for the RDR # in arg0 is called			*
-;*	to move the data to the RDR.										*
-;*																		*
-;* Arguments:															*
-;*	arg0 = rdr target													*
-;*	arg1 = buffer pointer												*
-;*																		*
-;* Returns:																*
-;*	None																*
-;*																		*
-;* Register usage:														*
-;*	arg0 = rdr target													*
-;*	arg1 = buffer pointer												*
-;*	%r24 - DR2 | DR2_SLOW_RET											*
-;*	%r23 - original DR2 value											*
-;*																		*
-;************************************************************************
+;***********************************************************************
+;*
+;* Name: rdr_shift_out_U
+;*
+;* Description:
+;*	This routine moves data to the RDR's.  The double-word that
+;*	arg1 points to is loaded and moved into the staging register.
+;*	Then the STDIAG instruction for the RDR # in arg0 is called
+;*	to move the data to the RDR.
+;*
+;* Arguments:
+;*	arg0 = rdr target
+;*	arg1 = buffer pointer
+;*
+;* Returns:
+;*	None
+;*
+;* Register usage:
+;*	arg0 = rdr target
+;*	arg1 = buffer pointer
+;*	%r24 - DR2 | DR2_SLOW_RET
+;*	%r23 - original DR2 value
+;*
+;***********************************************************************
 
 	.export perf_rdr_shift_out_U,code
 perf_rdr_shift_out_U: