Commit 882d1db0 authored by Arkadiusz Hiler's avatar Arkadiusz Hiler Committed by Joonas Lahtinen

drm/i915/uc: Rename intel_?uc_{setup, load}() to _init_hw()

GuC historically has two "startup" functions called _init() and _setup()

Then HuC came with it's _init() and _load().

This commit renames intel_guc_setup() and intel_huc_load() to
*uc_init_hw() as they called from the i915_gem_init_hw().

The aim is to be consistent in that entry points called during
particular driver init phases (e.g. init_hw) are all suffixed by that
phase. When reading the leaf functions, it should be clear at what stage
during the driver load it is called and therefore what operations are
legal at that point.

Also, since the functions start with intel_guc and intel_huc they take
appropiate structure.

v2: commit message update (Chris Wilson)
v3: change taken parameters to be more "semantic" (M. Wajdeczko)

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Michal Winiarski <michal.winiarski@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Signed-off-by: default avatarArkadiusz Hiler <arkadiusz.hiler@intel.com>
Reviewed-by: default avatarJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
Signed-off-by: default avatarJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
parent 50beba55
...@@ -4541,7 +4541,7 @@ int i915_gem_init_hw(struct drm_i915_private *dev_priv) ...@@ -4541,7 +4541,7 @@ int i915_gem_init_hw(struct drm_i915_private *dev_priv)
intel_mocs_init_l3cc_table(dev_priv); intel_mocs_init_l3cc_table(dev_priv);
/* We can't enable contexts until all firmware is loaded */ /* We can't enable contexts until all firmware is loaded */
ret = intel_guc_setup(dev_priv); ret = intel_guc_init_hw(&dev_priv->guc);
if (ret) if (ret)
goto out; goto out;
......
...@@ -364,28 +364,28 @@ static int guc_hw_reset(struct drm_i915_private *dev_priv) ...@@ -364,28 +364,28 @@ static int guc_hw_reset(struct drm_i915_private *dev_priv)
} }
/** /**
* intel_guc_setup() - finish preparing the GuC for activity * intel_guc_init_hw() - finish preparing the GuC for activity
* @dev_priv: i915 device private * @guc: intel_guc structure
* *
* Called from gem_init_hw() during driver loading and also after a GPU reset. * Called during driver loading and also after a GPU reset.
* *
* The main action required here it to load the GuC uCode into the device. * The main action required here it to load the GuC uCode into the device.
* The firmware image should have already been fetched into memory by the * The firmware image should have already been fetched into memory by the
* earlier call to intel_guc_init(), so here we need only check that worked, * earlier call to intel_guc_init(), so here we need only check that
* and then transfer the image to the h/w. * worked, and then transfer the image to the h/w.
* *
* Return: non-zero code on error * Return: non-zero code on error
*/ */
int intel_guc_setup(struct drm_i915_private *dev_priv) int intel_guc_init_hw(struct intel_guc *guc)
{ {
struct intel_uc_fw *guc_fw = &dev_priv->guc.fw; struct drm_i915_private *dev_priv = guc_to_i915(guc);
const char *fw_path = guc_fw->path; const char *fw_path = guc->fw.path;
int retries, ret, err; int retries, ret, err;
DRM_DEBUG_DRIVER("GuC fw status: path %s, fetch %s, load %s\n", DRM_DEBUG_DRIVER("GuC fw status: path %s, fetch %s, load %s\n",
fw_path, fw_path,
intel_uc_fw_status_repr(guc_fw->fetch_status), intel_uc_fw_status_repr(guc->fw.fetch_status),
intel_uc_fw_status_repr(guc_fw->load_status)); intel_uc_fw_status_repr(guc->fw.load_status));
/* Loading forbidden, or no firmware to load? */ /* Loading forbidden, or no firmware to load? */
if (!i915.enable_guc_loading) { if (!i915.enable_guc_loading) {
...@@ -403,10 +403,10 @@ int intel_guc_setup(struct drm_i915_private *dev_priv) ...@@ -403,10 +403,10 @@ int intel_guc_setup(struct drm_i915_private *dev_priv)
} }
/* Fetch failed, or already fetched but failed to load? */ /* Fetch failed, or already fetched but failed to load? */
if (guc_fw->fetch_status != INTEL_UC_FIRMWARE_SUCCESS) { if (guc->fw.fetch_status != INTEL_UC_FIRMWARE_SUCCESS) {
err = -EIO; err = -EIO;
goto fail; goto fail;
} else if (guc_fw->load_status == INTEL_UC_FIRMWARE_FAIL) { } else if (guc->fw.load_status == INTEL_UC_FIRMWARE_FAIL) {
err = -ENOEXEC; err = -ENOEXEC;
goto fail; goto fail;
} }
...@@ -416,11 +416,11 @@ int intel_guc_setup(struct drm_i915_private *dev_priv) ...@@ -416,11 +416,11 @@ int intel_guc_setup(struct drm_i915_private *dev_priv)
/* We need to notify the guc whenever we change the GGTT */ /* We need to notify the guc whenever we change the GGTT */
i915_ggtt_enable_guc(dev_priv); i915_ggtt_enable_guc(dev_priv);
guc_fw->load_status = INTEL_UC_FIRMWARE_PENDING; guc->fw.load_status = INTEL_UC_FIRMWARE_PENDING;
DRM_DEBUG_DRIVER("GuC fw status: fetch %s, load %s\n", DRM_DEBUG_DRIVER("GuC fw status: fetch %s, load %s\n",
intel_uc_fw_status_repr(guc_fw->fetch_status), intel_uc_fw_status_repr(guc->fw.fetch_status),
intel_uc_fw_status_repr(guc_fw->load_status)); intel_uc_fw_status_repr(guc->fw.load_status));
err = i915_guc_submission_init(dev_priv); err = i915_guc_submission_init(dev_priv);
if (err) if (err)
...@@ -441,7 +441,7 @@ int intel_guc_setup(struct drm_i915_private *dev_priv) ...@@ -441,7 +441,7 @@ int intel_guc_setup(struct drm_i915_private *dev_priv)
if (err) if (err)
goto fail; goto fail;
intel_huc_load(dev_priv); intel_huc_init_hw(&dev_priv->huc);
err = guc_ucode_xfer(dev_priv); err = guc_ucode_xfer(dev_priv);
if (!err) if (!err)
break; break;
...@@ -453,7 +453,7 @@ int intel_guc_setup(struct drm_i915_private *dev_priv) ...@@ -453,7 +453,7 @@ int intel_guc_setup(struct drm_i915_private *dev_priv)
"retry %d more time(s)\n", err, retries); "retry %d more time(s)\n", err, retries);
} }
guc_fw->load_status = INTEL_UC_FIRMWARE_SUCCESS; guc->fw.load_status = INTEL_UC_FIRMWARE_SUCCESS;
intel_guc_auth_huc(dev_priv); intel_guc_auth_huc(dev_priv);
...@@ -468,14 +468,14 @@ int intel_guc_setup(struct drm_i915_private *dev_priv) ...@@ -468,14 +468,14 @@ int intel_guc_setup(struct drm_i915_private *dev_priv)
DRM_INFO("GuC %s (firmware %s [version %u.%u])\n", DRM_INFO("GuC %s (firmware %s [version %u.%u])\n",
i915.enable_guc_submission ? "submission enabled" : "loaded", i915.enable_guc_submission ? "submission enabled" : "loaded",
guc_fw->path, guc->fw.path,
guc_fw->major_ver_found, guc_fw->minor_ver_found); guc->fw.major_ver_found, guc->fw.minor_ver_found);
return 0; return 0;
fail: fail:
if (guc_fw->load_status == INTEL_UC_FIRMWARE_PENDING) if (guc->fw.load_status == INTEL_UC_FIRMWARE_PENDING)
guc_fw->load_status = INTEL_UC_FIRMWARE_FAIL; guc->fw.load_status = INTEL_UC_FIRMWARE_FAIL;
i915_guc_submission_disable(dev_priv); i915_guc_submission_disable(dev_priv);
i915_guc_submission_fini(dev_priv); i915_guc_submission_fini(dev_priv);
...@@ -662,7 +662,7 @@ void intel_uc_fw_fetch(struct drm_i915_private *dev_priv, ...@@ -662,7 +662,7 @@ void intel_uc_fw_fetch(struct drm_i915_private *dev_priv,
* Called early during driver load, but after GEM is initialised. * Called early during driver load, but after GEM is initialised.
* *
* The firmware will be transferred to the GuC's memory later, * The firmware will be transferred to the GuC's memory later,
* when intel_guc_setup() is called. * when intel_guc_init_hw() is called.
*/ */
void intel_guc_init(struct drm_i915_private *dev_priv) void intel_guc_init(struct drm_i915_private *dev_priv)
{ {
......
...@@ -150,7 +150,7 @@ static int huc_ucode_xfer(struct drm_i915_private *dev_priv) ...@@ -150,7 +150,7 @@ static int huc_ucode_xfer(struct drm_i915_private *dev_priv)
* is not capable or driver yet support it. And there will be no error message * is not capable or driver yet support it. And there will be no error message
* for INTEL_UC_FIRMWARE_NONE cases. * for INTEL_UC_FIRMWARE_NONE cases.
* *
* The DMA-copying to HW is done later when intel_huc_load() is called. * The DMA-copying to HW is done later when intel_huc_init_hw() is called.
*/ */
void intel_huc_init(struct drm_i915_private *dev_priv) void intel_huc_init(struct drm_i915_private *dev_priv)
{ {
...@@ -193,8 +193,8 @@ void intel_huc_init(struct drm_i915_private *dev_priv) ...@@ -193,8 +193,8 @@ void intel_huc_init(struct drm_i915_private *dev_priv)
} }
/** /**
* intel_huc_load() - load HuC uCode to device * intel_huc_init_hw() - load HuC uCode to device
* @dev_priv: the drm_i915_private device * @huc: intel_huc structure
* *
* Called from guc_setup() during driver loading and also after a GPU reset. * Called from guc_setup() during driver loading and also after a GPU reset.
* Be note that HuC loading must be done before GuC loading. * Be note that HuC loading must be done before GuC loading.
...@@ -205,26 +205,26 @@ void intel_huc_init(struct drm_i915_private *dev_priv) ...@@ -205,26 +205,26 @@ void intel_huc_init(struct drm_i915_private *dev_priv)
* *
* Return: non-zero code on error * Return: non-zero code on error
*/ */
int intel_huc_load(struct drm_i915_private *dev_priv) int intel_huc_init_hw(struct intel_huc *huc)
{ {
struct intel_uc_fw *huc_fw = &dev_priv->huc.fw; struct drm_i915_private *dev_priv = huc_to_i915(huc);
int err; int err;
if (huc_fw->fetch_status == INTEL_UC_FIRMWARE_NONE) if (huc->fw.fetch_status == INTEL_UC_FIRMWARE_NONE)
return 0; return 0;
DRM_DEBUG_DRIVER("%s fw status: fetch %s, load %s\n", DRM_DEBUG_DRIVER("%s fw status: fetch %s, load %s\n",
huc_fw->path, huc->fw.path,
intel_uc_fw_status_repr(huc_fw->fetch_status), intel_uc_fw_status_repr(huc->fw.fetch_status),
intel_uc_fw_status_repr(huc_fw->load_status)); intel_uc_fw_status_repr(huc->fw.load_status));
if (huc_fw->fetch_status == INTEL_UC_FIRMWARE_SUCCESS && if (huc->fw.fetch_status == INTEL_UC_FIRMWARE_SUCCESS &&
huc_fw->load_status == INTEL_UC_FIRMWARE_FAIL) huc->fw.load_status == INTEL_UC_FIRMWARE_FAIL)
return -ENOEXEC; return -ENOEXEC;
huc_fw->load_status = INTEL_UC_FIRMWARE_PENDING; huc->fw.load_status = INTEL_UC_FIRMWARE_PENDING;
switch (huc_fw->fetch_status) { switch (huc->fw.fetch_status) {
case INTEL_UC_FIRMWARE_FAIL: case INTEL_UC_FIRMWARE_FAIL:
/* something went wrong :( */ /* something went wrong :( */
err = -EIO; err = -EIO;
...@@ -235,9 +235,9 @@ int intel_huc_load(struct drm_i915_private *dev_priv) ...@@ -235,9 +235,9 @@ int intel_huc_load(struct drm_i915_private *dev_priv)
default: default:
/* "can't happen" */ /* "can't happen" */
WARN_ONCE(1, "HuC fw %s invalid fetch_status %s [%d]\n", WARN_ONCE(1, "HuC fw %s invalid fetch_status %s [%d]\n",
huc_fw->path, huc->fw.path,
intel_uc_fw_status_repr(huc_fw->fetch_status), intel_uc_fw_status_repr(huc->fw.fetch_status),
huc_fw->fetch_status); huc->fw.fetch_status);
err = -ENXIO; err = -ENXIO;
goto fail; goto fail;
...@@ -249,18 +249,18 @@ int intel_huc_load(struct drm_i915_private *dev_priv) ...@@ -249,18 +249,18 @@ int intel_huc_load(struct drm_i915_private *dev_priv)
if (err) if (err)
goto fail; goto fail;
huc_fw->load_status = INTEL_UC_FIRMWARE_SUCCESS; huc->fw.load_status = INTEL_UC_FIRMWARE_SUCCESS;
DRM_DEBUG_DRIVER("%s fw status: fetch %s, load %s\n", DRM_DEBUG_DRIVER("%s fw status: fetch %s, load %s\n",
huc_fw->path, huc->fw.path,
intel_uc_fw_status_repr(huc_fw->fetch_status), intel_uc_fw_status_repr(huc->fw.fetch_status),
intel_uc_fw_status_repr(huc_fw->load_status)); intel_uc_fw_status_repr(huc->fw.load_status));
return 0; return 0;
fail: fail:
if (huc_fw->load_status == INTEL_UC_FIRMWARE_PENDING) if (huc->fw.load_status == INTEL_UC_FIRMWARE_PENDING)
huc_fw->load_status = INTEL_UC_FIRMWARE_FAIL; huc->fw.load_status = INTEL_UC_FIRMWARE_FAIL;
DRM_ERROR("Failed to complete HuC uCode load with ret %d\n", err); DRM_ERROR("Failed to complete HuC uCode load with ret %d\n", err);
......
...@@ -190,7 +190,7 @@ int intel_guc_sample_forcewake(struct intel_guc *guc); ...@@ -190,7 +190,7 @@ int intel_guc_sample_forcewake(struct intel_guc *guc);
/* intel_guc_loader.c */ /* intel_guc_loader.c */
void intel_guc_init(struct drm_i915_private *dev_priv); void intel_guc_init(struct drm_i915_private *dev_priv);
int intel_guc_setup(struct drm_i915_private *dev_priv); int intel_guc_init_hw(struct intel_guc *guc);
void intel_guc_fini(struct drm_i915_private *dev_priv); void intel_guc_fini(struct drm_i915_private *dev_priv);
const char *intel_uc_fw_status_repr(enum intel_uc_fw_status status); const char *intel_uc_fw_status_repr(enum intel_uc_fw_status status);
int intel_guc_suspend(struct drm_i915_private *dev_priv); int intel_guc_suspend(struct drm_i915_private *dev_priv);
...@@ -225,7 +225,7 @@ static inline u32 guc_ggtt_offset(struct i915_vma *vma) ...@@ -225,7 +225,7 @@ static inline u32 guc_ggtt_offset(struct i915_vma *vma)
/* intel_huc.c */ /* intel_huc.c */
void intel_huc_init(struct drm_i915_private *dev_priv); void intel_huc_init(struct drm_i915_private *dev_priv);
void intel_huc_fini(struct drm_i915_private *dev_priv); void intel_huc_fini(struct drm_i915_private *dev_priv);
int intel_huc_load(struct drm_i915_private *dev_priv); int intel_huc_init_hw(struct intel_huc *huc);
void intel_guc_auth_huc(struct drm_i915_private *dev_priv); void intel_guc_auth_huc(struct drm_i915_private *dev_priv);
#endif #endif
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment