Commit 89e18ae6 authored by Michal Kalderon's avatar Michal Kalderon Committed by David S. Miller

bnx2x: Correct number of MSI-X vectors for VFs

Number of VFs in PCIe configuration space is zero-based. Driver incorrectly
sets the number of VFs to be larger by one than what actually is feasible by
HW, which might cause later VFs to fail to allocate their MSI-X interrupts.
Signed-off-by: default avatarMichal Kalderon <michals@broadcom.com>
Signed-off-by: default avatarYuval Mintz <yuvalmin@broadcom.com>
Signed-off-by: default avatarAriel Elior <ariele@broadcom.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent e848582c
...@@ -3202,13 +3202,16 @@ int bnx2x_enable_sriov(struct bnx2x *bp) ...@@ -3202,13 +3202,16 @@ int bnx2x_enable_sriov(struct bnx2x *bp)
bnx2x_iov_static_resc(bp, vf); bnx2x_iov_static_resc(bp, vf);
} }
/* prepare msix vectors in VF configuration space */ /* prepare msix vectors in VF configuration space - the value in the
* PCI configuration space should be the index of the last entry,
* namely one less than the actual size of the table
*/
for (vf_idx = first_vf; vf_idx < first_vf + req_vfs; vf_idx++) { for (vf_idx = first_vf; vf_idx < first_vf + req_vfs; vf_idx++) {
bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf_idx)); bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf_idx));
REG_WR(bp, PCICFG_OFFSET + GRC_CONFIG_REG_VF_MSIX_CONTROL, REG_WR(bp, PCICFG_OFFSET + GRC_CONFIG_REG_VF_MSIX_CONTROL,
num_vf_queues); num_vf_queues - 1);
DP(BNX2X_MSG_IOV, "set msix vec num in VF %d cfg space to %d\n", DP(BNX2X_MSG_IOV, "set msix vec num in VF %d cfg space to %d\n",
vf_idx, num_vf_queues); vf_idx, num_vf_queues - 1);
} }
bnx2x_pretend_func(bp, BP_ABS_FUNC(bp)); bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
......
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