Commit 89ed34f3 authored by Paul Mundt's avatar Paul Mundt

sh: sh7780 evt2irq migration.

Migrate SH7780 to evt2irq() backed hwirq lookups.
Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent f454314c
...@@ -14,6 +14,7 @@ ...@@ -14,6 +14,7 @@
#include <linux/serial_sci.h> #include <linux/serial_sci.h>
#include <linux/sh_dma.h> #include <linux/sh_dma.h>
#include <linux/sh_timer.h> #include <linux/sh_timer.h>
#include <linux/sh_intc.h>
#include <cpu/dma-register.h> #include <cpu/dma-register.h>
static struct plat_sci_port scif0_platform_data = { static struct plat_sci_port scif0_platform_data = {
...@@ -22,7 +23,7 @@ static struct plat_sci_port scif0_platform_data = { ...@@ -22,7 +23,7 @@ static struct plat_sci_port scif0_platform_data = {
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
.scbrr_algo_id = SCBRR_ALGO_1, .scbrr_algo_id = SCBRR_ALGO_1,
.type = PORT_SCIF, .type = PORT_SCIF,
.irqs = { 40, 40, 40, 40 }, .irqs = SCIx_IRQ_MUXED(evt2irq(0x700)),
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
}; };
...@@ -40,7 +41,7 @@ static struct plat_sci_port scif1_platform_data = { ...@@ -40,7 +41,7 @@ static struct plat_sci_port scif1_platform_data = {
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
.scbrr_algo_id = SCBRR_ALGO_1, .scbrr_algo_id = SCBRR_ALGO_1,
.type = PORT_SCIF, .type = PORT_SCIF,
.irqs = { 76, 76, 76, 76 }, .irqs = SCIx_IRQ_MUXED(evt2irq(0xb80)),
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
}; };
...@@ -65,7 +66,7 @@ static struct resource tmu0_resources[] = { ...@@ -65,7 +66,7 @@ static struct resource tmu0_resources[] = {
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, },
[1] = { [1] = {
.start = 28, .start = evt2irq(0x580),
.flags = IORESOURCE_IRQ, .flags = IORESOURCE_IRQ,
}, },
}; };
...@@ -93,7 +94,7 @@ static struct resource tmu1_resources[] = { ...@@ -93,7 +94,7 @@ static struct resource tmu1_resources[] = {
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, },
[1] = { [1] = {
.start = 29, .start = evt2irq(0x5a0),
.flags = IORESOURCE_IRQ, .flags = IORESOURCE_IRQ,
}, },
}; };
...@@ -120,7 +121,7 @@ static struct resource tmu2_resources[] = { ...@@ -120,7 +121,7 @@ static struct resource tmu2_resources[] = {
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, },
[1] = { [1] = {
.start = 30, .start = evt2irq(0x5c0),
.flags = IORESOURCE_IRQ, .flags = IORESOURCE_IRQ,
}, },
}; };
...@@ -147,7 +148,7 @@ static struct resource tmu3_resources[] = { ...@@ -147,7 +148,7 @@ static struct resource tmu3_resources[] = {
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, },
[1] = { [1] = {
.start = 96, .start = evt2irq(0xe00),
.flags = IORESOURCE_IRQ, .flags = IORESOURCE_IRQ,
}, },
}; };
...@@ -174,7 +175,7 @@ static struct resource tmu4_resources[] = { ...@@ -174,7 +175,7 @@ static struct resource tmu4_resources[] = {
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, },
[1] = { [1] = {
.start = 97, .start = evt2irq(0xe20),
.flags = IORESOURCE_IRQ, .flags = IORESOURCE_IRQ,
}, },
}; };
...@@ -201,7 +202,7 @@ static struct resource tmu5_resources[] = { ...@@ -201,7 +202,7 @@ static struct resource tmu5_resources[] = {
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, },
[1] = { [1] = {
.start = 98, .start = evt2irq(0xe40),
.flags = IORESOURCE_IRQ, .flags = IORESOURCE_IRQ,
}, },
}; };
...@@ -224,7 +225,7 @@ static struct resource rtc_resources[] = { ...@@ -224,7 +225,7 @@ static struct resource rtc_resources[] = {
}, },
[1] = { [1] = {
/* Shared Period/Carry/Alarm IRQ */ /* Shared Period/Carry/Alarm IRQ */
.start = 20, .start = evt2irq(0x480),
.flags = IORESOURCE_IRQ, .flags = IORESOURCE_IRQ,
}, },
}; };
...@@ -321,10 +322,13 @@ static struct resource sh7780_dmae0_resources[] = { ...@@ -321,10 +322,13 @@ static struct resource sh7780_dmae0_resources[] = {
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, },
{ {
/* Real DMA error IRQ is 38, and channel IRQs are 34-37, 44-45 */ /*
* Real DMA error vector is 0x6c0, and channel
* vectors are 0x640-0x6a0, 0x780-0x7a0
*/
.name = "error_irq", .name = "error_irq",
.start = 34, .start = evt2irq(0x640),
.end = 34, .end = evt2irq(0x640),
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE, .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
}, },
}; };
...@@ -338,10 +342,13 @@ static struct resource sh7780_dmae1_resources[] = { ...@@ -338,10 +342,13 @@ static struct resource sh7780_dmae1_resources[] = {
}, },
/* DMAC1 has no DMARS */ /* DMAC1 has no DMARS */
{ {
/* Real DMA error IRQ is 38, and channel IRQs are 46-47, 92-95 */ /*
* Real DMA error vector is 0x6c0, and channel
* vectors are 0x7c0-0x7e0, 0xd80-0xde0
*/
.name = "error_irq", .name = "error_irq",
.start = 46, .start = evt2irq(0x7c0),
.end = 46, .end = evt2irq(0x7c0),
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE, .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
}, },
}; };
......
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