[PATCH] 2.5.14: New PCI allocation code (alpha, arm, parisc) [1/2]
This changes PCI resource allocation algorithm to 3 passes vs. current 2 passes. Extra pass is used for calculation of required size and alignment of PCI buses behind PCI-PCI bridges. After that, in the pass #3, these buses get allocated like regular PCI devices. This gives tighter PCI IO and memory packing - for instance, this fixes allocation problems on certain alphas with very small (112Mb) PCI memory range. Also, the new code - will allow mixed approach to resource allocation: architecture can keep BIOS settings for some devices, and re-allocate resources for others, including improperly initialized bridges; - makes prefetchable ranges support much simpler; - allows sizing of IO and memory ranges for the host bridges, which might be very useful in some situations. It was tested on various alphas; I haven't heard any complaints from rmk and rth, so probably all of this is ok. :-) Part 1: - for all archs, 4th argument (align) added to pcibios_align_resource (and its callers). It's necessary because this function will be called for bus resources as well, and in this case size != alignment. - for several archs, dead/bogus code removed from pcibios_fixup_pbus_ranges().
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