Commit 8a75f0a0 authored by Kevin Hilman's avatar Kevin Hilman

Merge tag 'samsung-cleanup-1' of...

Merge tag 'samsung-cleanup-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/cleanup

From Kukjin Kim:
samsung cleanup for v3.12
- cleanup non-dt stuff in exynos
- remove 0x from exynos dt files
- remove unused codes

* tag 'samsung-cleanup-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  ARM: SAMSUNG: Remove unnecessary exynos4_default_sdhci*()
  ARM: dts: Remove '0x's from Exynos5440 DTS file
  ARM: dts: Remove '0x's from Exynos5420 DTS file
  ARM: dts: Remove '0x's from Exynos5250 DTS file
  ARM: dts: Remove '0x's from Exynos4x12 DTSI file
  ARM: dts: Remove '0x's from Exynos4210 DTSI file
  ARM: EXYNOS: Cleanup common.h file
  irqchip: exynos: cleanup non-DT stuff in exynos-combiner
Signed-off-by: default avatarKevin Hilman <khilman@linaro.org>
parents 30f9c3bd 8c3736e2
...@@ -72,7 +72,7 @@ mct_map: mct-map { ...@@ -72,7 +72,7 @@ mct_map: mct-map {
}; };
}; };
clock: clock-controller@0x10030000 { clock: clock-controller@10030000 {
compatible = "samsung,exynos4210-clock"; compatible = "samsung,exynos4210-clock";
reg = <0x10030000 0x20000>; reg = <0x10030000 0x20000>;
#clock-cells = <1>; #clock-cells = <1>;
......
...@@ -28,7 +28,7 @@ aliases { ...@@ -28,7 +28,7 @@ aliases {
pinctrl3 = &pinctrl_3; pinctrl3 = &pinctrl_3;
}; };
clock: clock-controller@0x10030000 { clock: clock-controller@10030000 {
compatible = "samsung,exynos4412-clock"; compatible = "samsung,exynos4412-clock";
reg = <0x10030000 0x20000>; reg = <0x10030000 0x20000>;
#clock-cells = <1>; #clock-cells = <1>;
......
...@@ -68,17 +68,17 @@ cpu@1 { ...@@ -68,17 +68,17 @@ cpu@1 {
}; };
}; };
pd_gsc: gsc-power-domain@0x10044000 { pd_gsc: gsc-power-domain@10044000 {
compatible = "samsung,exynos4210-pd"; compatible = "samsung,exynos4210-pd";
reg = <0x10044000 0x20>; reg = <0x10044000 0x20>;
}; };
pd_mfc: mfc-power-domain@0x10044040 { pd_mfc: mfc-power-domain@10044040 {
compatible = "samsung,exynos4210-pd"; compatible = "samsung,exynos4210-pd";
reg = <0x10044040 0x20>; reg = <0x10044040 0x20>;
}; };
clock: clock-controller@0x10010000 { clock: clock-controller@10010000 {
compatible = "samsung,exynos5250-clock"; compatible = "samsung,exynos5250-clock";
reg = <0x10010000 0x30000>; reg = <0x10010000 0x30000>;
#clock-cells = <1>; #clock-cells = <1>;
...@@ -562,7 +562,7 @@ mdma1: mdma@11C10000 { ...@@ -562,7 +562,7 @@ mdma1: mdma@11C10000 {
}; };
}; };
gsc_0: gsc@0x13e00000 { gsc_0: gsc@13e00000 {
compatible = "samsung,exynos5-gsc"; compatible = "samsung,exynos5-gsc";
reg = <0x13e00000 0x1000>; reg = <0x13e00000 0x1000>;
interrupts = <0 85 0>; interrupts = <0 85 0>;
...@@ -571,7 +571,7 @@ gsc_0: gsc@0x13e00000 { ...@@ -571,7 +571,7 @@ gsc_0: gsc@0x13e00000 {
clock-names = "gscl"; clock-names = "gscl";
}; };
gsc_1: gsc@0x13e10000 { gsc_1: gsc@13e10000 {
compatible = "samsung,exynos5-gsc"; compatible = "samsung,exynos5-gsc";
reg = <0x13e10000 0x1000>; reg = <0x13e10000 0x1000>;
interrupts = <0 86 0>; interrupts = <0 86 0>;
...@@ -580,7 +580,7 @@ gsc_1: gsc@0x13e10000 { ...@@ -580,7 +580,7 @@ gsc_1: gsc@0x13e10000 {
clock-names = "gscl"; clock-names = "gscl";
}; };
gsc_2: gsc@0x13e20000 { gsc_2: gsc@13e20000 {
compatible = "samsung,exynos5-gsc"; compatible = "samsung,exynos5-gsc";
reg = <0x13e20000 0x1000>; reg = <0x13e20000 0x1000>;
interrupts = <0 87 0>; interrupts = <0 87 0>;
...@@ -589,7 +589,7 @@ gsc_2: gsc@0x13e20000 { ...@@ -589,7 +589,7 @@ gsc_2: gsc@0x13e20000 {
clock-names = "gscl"; clock-names = "gscl";
}; };
gsc_3: gsc@0x13e30000 { gsc_3: gsc@13e30000 {
compatible = "samsung,exynos5-gsc"; compatible = "samsung,exynos5-gsc";
reg = <0x13e30000 0x1000>; reg = <0x13e30000 0x1000>;
interrupts = <0 88 0>; interrupts = <0 88 0>;
......
...@@ -59,7 +59,7 @@ cpu3: cpu@3 { ...@@ -59,7 +59,7 @@ cpu3: cpu@3 {
}; };
}; };
clock: clock-controller@0x10010000 { clock: clock-controller@10010000 {
compatible = "samsung,exynos5420-clock"; compatible = "samsung,exynos5420-clock";
reg = <0x10010000 0x30000>; reg = <0x10010000 0x30000>;
#clock-cells = <1>; #clock-cells = <1>;
......
...@@ -20,7 +20,7 @@ aliases { ...@@ -20,7 +20,7 @@ aliases {
spi0 = &spi_0; spi0 = &spi_0;
}; };
clock: clock-controller@0x160000 { clock: clock-controller@160000 {
compatible = "samsung,exynos5440-clock"; compatible = "samsung,exynos5440-clock";
reg = <0x160000 0x1000>; reg = <0x160000 0x1000>;
#clock-cells = <1>; #clock-cells = <1>;
......
...@@ -17,7 +17,6 @@ ...@@ -17,7 +17,6 @@
void mct_init(void __iomem *base, int irq_g0, int irq_l0, int irq_l1); void mct_init(void __iomem *base, int irq_g0, int irq_l0, int irq_l1);
void exynos_init_time(void); void exynos_init_time(void);
extern unsigned long xxti_f, xusbxti_f;
struct map_desc; struct map_desc;
void exynos_init_io(void); void exynos_init_io(void);
...@@ -25,56 +24,14 @@ void exynos4_restart(enum reboot_mode mode, const char *cmd); ...@@ -25,56 +24,14 @@ void exynos4_restart(enum reboot_mode mode, const char *cmd);
void exynos5_restart(enum reboot_mode mode, const char *cmd); void exynos5_restart(enum reboot_mode mode, const char *cmd);
void exynos_init_late(void); void exynos_init_late(void);
/* ToDo: remove these after migrating legacy exynos4 platforms to dt */
void exynos4_clk_init(struct device_node *np, int is_exynos4210, void __iomem *reg_base, unsigned long xom);
void exynos4_clk_register_fixed_ext(unsigned long, unsigned long);
void exynos_firmware_init(void); void exynos_firmware_init(void);
void exynos_set_timer_source(u8 channels);
#ifdef CONFIG_PM_GENERIC_DOMAINS #ifdef CONFIG_PM_GENERIC_DOMAINS
int exynos_pm_late_initcall(void); int exynos_pm_late_initcall(void);
#else #else
static inline int exynos_pm_late_initcall(void) { return 0; } static inline int exynos_pm_late_initcall(void) { return 0; }
#endif #endif
#ifdef CONFIG_ARCH_EXYNOS4
void exynos4_register_clocks(void);
void exynos4_setup_clocks(void);
#else
#define exynos4_register_clocks()
#define exynos4_setup_clocks()
#endif
#ifdef CONFIG_ARCH_EXYNOS5
void exynos5_register_clocks(void);
void exynos5_setup_clocks(void);
#else
#define exynos5_register_clocks()
#define exynos5_setup_clocks()
#endif
#ifdef CONFIG_CPU_EXYNOS4210
void exynos4210_register_clocks(void);
#else
#define exynos4210_register_clocks()
#endif
#ifdef CONFIG_SOC_EXYNOS4212
void exynos4212_register_clocks(void);
#else
#define exynos4212_register_clocks()
#endif
struct device_node;
void combiner_init(void __iomem *combiner_base, struct device_node *np,
unsigned int max_nr, int irq_base);
extern struct smp_operations exynos_smp_ops; extern struct smp_operations exynos_smp_ops;
extern void exynos_cpu_die(unsigned int cpu); extern void exynos_cpu_die(unsigned int cpu);
......
...@@ -260,44 +260,6 @@ static inline void s5pv210_default_sdhci3(void) { } ...@@ -260,44 +260,6 @@ static inline void s5pv210_default_sdhci3(void) { }
#endif /* CONFIG_S5PV210_SETUP_SDHCI */ #endif /* CONFIG_S5PV210_SETUP_SDHCI */
/* EXYNOS4 SDHCI setup */
#ifdef CONFIG_EXYNOS4_SETUP_SDHCI
static inline void exynos4_default_sdhci0(void)
{
#ifdef CONFIG_S3C_DEV_HSMMC
s3c_hsmmc0_def_platdata.cfg_gpio = exynos4_setup_sdhci0_cfg_gpio;
#endif
}
static inline void exynos4_default_sdhci1(void)
{
#ifdef CONFIG_S3C_DEV_HSMMC1
s3c_hsmmc1_def_platdata.cfg_gpio = exynos4_setup_sdhci1_cfg_gpio;
#endif
}
static inline void exynos4_default_sdhci2(void)
{
#ifdef CONFIG_S3C_DEV_HSMMC2
s3c_hsmmc2_def_platdata.cfg_gpio = exynos4_setup_sdhci2_cfg_gpio;
#endif
}
static inline void exynos4_default_sdhci3(void)
{
#ifdef CONFIG_S3C_DEV_HSMMC3
s3c_hsmmc3_def_platdata.cfg_gpio = exynos4_setup_sdhci3_cfg_gpio;
#endif
}
#else
static inline void exynos4_default_sdhci0(void) { }
static inline void exynos4_default_sdhci1(void) { }
static inline void exynos4_default_sdhci2(void) { }
static inline void exynos4_default_sdhci3(void) { }
#endif /* CONFIG_EXYNOS4_SETUP_SDHCI */
static inline void s3c_sdhci_setname(int id, char *name) static inline void s3c_sdhci_setname(int id, char *name)
{ {
switch (id) { switch (id) {
......
...@@ -19,10 +19,6 @@ ...@@ -19,10 +19,6 @@
#include <linux/of_irq.h> #include <linux/of_irq.h>
#include <asm/mach/irq.h> #include <asm/mach/irq.h>
#ifdef CONFIG_EXYNOS_ATAGS
#include <plat/cpu.h>
#endif
#include "irqchip.h" #include "irqchip.h"
#define COMBINER_ENABLE_SET 0x0 #define COMBINER_ENABLE_SET 0x0
...@@ -138,7 +134,6 @@ static void __init combiner_init_one(struct combiner_chip_data *combiner_data, ...@@ -138,7 +134,6 @@ static void __init combiner_init_one(struct combiner_chip_data *combiner_data,
__raw_writel(combiner_data->irq_mask, base + COMBINER_ENABLE_CLEAR); __raw_writel(combiner_data->irq_mask, base + COMBINER_ENABLE_CLEAR);
} }
#ifdef CONFIG_OF
static int combiner_irq_domain_xlate(struct irq_domain *d, static int combiner_irq_domain_xlate(struct irq_domain *d,
struct device_node *controller, struct device_node *controller,
const u32 *intspec, unsigned int intsize, const u32 *intspec, unsigned int intsize,
...@@ -156,16 +151,6 @@ static int combiner_irq_domain_xlate(struct irq_domain *d, ...@@ -156,16 +151,6 @@ static int combiner_irq_domain_xlate(struct irq_domain *d,
return 0; return 0;
} }
#else
static int combiner_irq_domain_xlate(struct irq_domain *d,
struct device_node *controller,
const u32 *intspec, unsigned int intsize,
unsigned long *out_hwirq,
unsigned int *out_type)
{
return -EINVAL;
}
#endif
static int combiner_irq_domain_map(struct irq_domain *d, unsigned int irq, static int combiner_irq_domain_map(struct irq_domain *d, unsigned int irq,
irq_hw_number_t hw) irq_hw_number_t hw)
...@@ -184,26 +169,6 @@ static struct irq_domain_ops combiner_irq_domain_ops = { ...@@ -184,26 +169,6 @@ static struct irq_domain_ops combiner_irq_domain_ops = {
.map = combiner_irq_domain_map, .map = combiner_irq_domain_map,
}; };
static unsigned int combiner_lookup_irq(int group)
{
#ifdef CONFIG_EXYNOS_ATAGS
if (group < EXYNOS4210_MAX_COMBINER_NR || soc_is_exynos5250())
return IRQ_SPI(group);
switch (group) {
case 16:
return IRQ_SPI(107);
case 17:
return IRQ_SPI(108);
case 18:
return IRQ_SPI(48);
case 19:
return IRQ_SPI(42);
}
#endif
return 0;
}
static void __init combiner_init(void __iomem *combiner_base, static void __init combiner_init(void __iomem *combiner_base,
struct device_node *np, struct device_node *np,
unsigned int max_nr, unsigned int max_nr,
...@@ -229,12 +194,7 @@ static void __init combiner_init(void __iomem *combiner_base, ...@@ -229,12 +194,7 @@ static void __init combiner_init(void __iomem *combiner_base,
} }
for (i = 0; i < max_nr; i++) { for (i = 0; i < max_nr; i++) {
#ifdef CONFIG_OF
if (np)
irq = irq_of_parse_and_map(np, i); irq = irq_of_parse_and_map(np, i);
else
#endif
irq = combiner_lookup_irq(i);
combiner_init_one(&combiner_data[i], i, combiner_init_one(&combiner_data[i], i,
combiner_base + (i >> 2) * 0x10, irq); combiner_base + (i >> 2) * 0x10, irq);
...@@ -242,7 +202,6 @@ static void __init combiner_init(void __iomem *combiner_base, ...@@ -242,7 +202,6 @@ static void __init combiner_init(void __iomem *combiner_base,
} }
} }
#ifdef CONFIG_OF
static int __init combiner_of_init(struct device_node *np, static int __init combiner_of_init(struct device_node *np,
struct device_node *parent) struct device_node *parent)
{ {
...@@ -275,4 +234,3 @@ static int __init combiner_of_init(struct device_node *np, ...@@ -275,4 +234,3 @@ static int __init combiner_of_init(struct device_node *np,
} }
IRQCHIP_DECLARE(exynos4210_combiner, "samsung,exynos4210-combiner", IRQCHIP_DECLARE(exynos4210_combiner, "samsung,exynos4210-combiner",
combiner_of_init); combiner_of_init);
#endif
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