Commit 8b2bdc76 authored by Stephen Boyd's avatar Stephen Boyd Committed by Stephen Boyd

clk: h8300: Migrate to clk_hw based registration APIs

Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.

Cc: Yoshinori Sato <ysato@users.sourceforge.jp>
Cc: <uclinux-h8-devel@lists.sourceforge.jp>
Signed-off-by: default avatarStephen Boyd <stephen.boyd@linaro.org>
Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
parent 120c1552
...@@ -14,7 +14,7 @@ static DEFINE_SPINLOCK(clklock); ...@@ -14,7 +14,7 @@ static DEFINE_SPINLOCK(clklock);
static void __init h8300_div_clk_setup(struct device_node *node) static void __init h8300_div_clk_setup(struct device_node *node)
{ {
unsigned int num_parents; unsigned int num_parents;
struct clk *clk; struct clk_hw *hw;
const char *clk_name = node->name; const char *clk_name = node->name;
const char *parent_name; const char *parent_name;
void __iomem *divcr = NULL; void __iomem *divcr = NULL;
...@@ -38,15 +38,15 @@ static void __init h8300_div_clk_setup(struct device_node *node) ...@@ -38,15 +38,15 @@ static void __init h8300_div_clk_setup(struct device_node *node)
parent_name = of_clk_get_parent_name(node, 0); parent_name = of_clk_get_parent_name(node, 0);
of_property_read_u32(node, "renesas,width", &width); of_property_read_u32(node, "renesas,width", &width);
clk = clk_register_divider(NULL, clk_name, parent_name, hw = clk_hw_register_divider(NULL, clk_name, parent_name,
CLK_SET_RATE_GATE, divcr, offset, width, CLK_SET_RATE_GATE, divcr, offset, width,
CLK_DIVIDER_POWER_OF_TWO, &clklock); CLK_DIVIDER_POWER_OF_TWO, &clklock);
if (!IS_ERR(clk)) { if (!IS_ERR(hw)) {
of_clk_add_provider(node, of_clk_src_simple_get, clk); of_clk_add_hw_provider(node, of_clk_hw_simple_get, hw);
return; return;
} }
pr_err("%s: failed to register %s div clock (%ld)\n", pr_err("%s: failed to register %s div clock (%ld)\n",
__func__, clk_name, PTR_ERR(clk)); __func__, clk_name, PTR_ERR(hw));
error: error:
if (divcr) if (divcr)
iounmap(divcr); iounmap(divcr);
......
...@@ -84,11 +84,11 @@ static const struct clk_ops pll_ops = { ...@@ -84,11 +84,11 @@ static const struct clk_ops pll_ops = {
static void __init h8s2678_pll_clk_setup(struct device_node *node) static void __init h8s2678_pll_clk_setup(struct device_node *node)
{ {
unsigned int num_parents; unsigned int num_parents;
struct clk *clk;
const char *clk_name = node->name; const char *clk_name = node->name;
const char *parent_name; const char *parent_name;
struct pll_clock *pll_clock; struct pll_clock *pll_clock;
struct clk_init_data init; struct clk_init_data init;
int ret;
num_parents = of_clk_get_parent_count(node); num_parents = of_clk_get_parent_count(node);
if (!num_parents) { if (!num_parents) {
...@@ -121,14 +121,14 @@ static void __init h8s2678_pll_clk_setup(struct device_node *node) ...@@ -121,14 +121,14 @@ static void __init h8s2678_pll_clk_setup(struct device_node *node)
init.num_parents = 1; init.num_parents = 1;
pll_clock->hw.init = &init; pll_clock->hw.init = &init;
clk = clk_register(NULL, &pll_clock->hw); ret = clk_hw_register(NULL, &pll_clock->hw);
if (IS_ERR(clk)) { if (ret) {
pr_err("%s: failed to register %s div clock (%ld)\n", pr_err("%s: failed to register %s div clock (%d)\n",
__func__, clk_name, PTR_ERR(clk)); __func__, clk_name, ret);
goto unmap_pllcr; goto unmap_pllcr;
} }
of_clk_add_provider(node, of_clk_src_simple_get, clk); of_clk_add_hw_provider(node, of_clk_hw_simple_get, &pll_clock->hw);
return; return;
unmap_pllcr: unmap_pllcr:
......
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