Commit 8b4092fd authored by Michael Walle's avatar Michael Walle Committed by Claudiu Beznea

ARM: dts: lan966x: swap dma channels for crypto node

The YAML binding (crypto/atmel,at91sam9g46-aes.yaml) mandates the order
of the channels. Swap them to pass devicetree validation.

Fixes: 290deaa1 ("ARM: dts: add DT for lan966 SoC and 2-port board pcb8291")
Signed-off-by: default avatarMichael Walle <michael@walle.cc>
Reviewed-by: default avatarClaudiu Beznea <claudiu.beznea@microchip.com>
Tested-by: default avatarHoratiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: default avatarClaudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220502224127.2604333-2-michael@walle.ccSigned-off-by: default avatarNicolas Ferre <nicolas.ferre@microchip.com>
parent 47afe2b5
...@@ -114,9 +114,9 @@ aes: crypto@e004c000 { ...@@ -114,9 +114,9 @@ aes: crypto@e004c000 {
compatible = "atmel,at91sam9g46-aes"; compatible = "atmel,at91sam9g46-aes";
reg = <0xe004c000 0x100>; reg = <0xe004c000 0x100>;
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dma0 AT91_XDMAC_DT_PERID(13)>, dmas = <&dma0 AT91_XDMAC_DT_PERID(12)>,
<&dma0 AT91_XDMAC_DT_PERID(12)>; <&dma0 AT91_XDMAC_DT_PERID(13)>;
dma-names = "rx", "tx"; dma-names = "tx", "rx";
clocks = <&nic_clk>; clocks = <&nic_clk>;
clock-names = "aes_clk"; clock-names = "aes_clk";
}; };
......
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