Commit 8b9a2810 authored by Rajendra Nayak's avatar Rajendra Nayak Committed by Tony Lindgren

ARM: OMAP4+: Move SRAM data to DT

Use drivers/misc/sram.c driver to manage SRAM on all DT only
OMAP platforms (am33xx, am43xx, omap4 and omap5) instead of
the existing private plat-omap/sram.c

Address and size related data  is removed from mach-omap2/sram.c
and now passed to drivers/misc/sram.c from DT.

Users can hence use general purpose allocator apis instead of
OMAP private ones to manage and use SRAM.
Signed-off-by: default avatarRajendra Nayak <rnayak@ti.com>
Signed-off-by: default avatarDave Gerlach <d-gerlach@ti.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 0616f4ee
...@@ -726,9 +726,8 @@ phy_sel: cpsw-phy-sel@44e10650 { ...@@ -726,9 +726,8 @@ phy_sel: cpsw-phy-sel@44e10650 {
}; };
ocmcram: ocmcram@40300000 { ocmcram: ocmcram@40300000 {
compatible = "ti,am3352-ocmcram"; compatible = "mmio-sram";
reg = <0x40300000 0x10000>; reg = <0x40300000 0x10000>; /* 64k */
ti,hwmods = "ocmcram";
}; };
wkup_m3: wkup_m3@44d00000 { wkup_m3: wkup_m3@44d00000 {
......
...@@ -885,6 +885,11 @@ rfbi: rfbi@4832a800 { ...@@ -885,6 +885,11 @@ rfbi: rfbi@4832a800 {
clock-names = "fck"; clock-names = "fck";
}; };
}; };
ocmcram: ocmcram@40300000 {
compatible = "mmio-sram";
reg = <0x40300000 0x40000>; /* 256k */
};
}; };
}; };
......
...@@ -209,6 +209,11 @@ pbias_mmc_reg: pbias_mmc_omap4 { ...@@ -209,6 +209,11 @@ pbias_mmc_reg: pbias_mmc_omap4 {
}; };
}; };
ocmcram: ocmcram@40304000 {
compatible = "mmio-sram";
reg = <0x40304000 0xa000>; /* 40k */
};
sdma: dma-controller@4a056000 { sdma: dma-controller@4a056000 {
compatible = "ti,omap4430-sdma"; compatible = "ti,omap4430-sdma";
reg = <0x4a056000 0x1000>; reg = <0x4a056000 0x1000>;
......
...@@ -220,6 +220,11 @@ pbias_mmc_reg: pbias_mmc_omap5 { ...@@ -220,6 +220,11 @@ pbias_mmc_reg: pbias_mmc_omap5 {
}; };
}; };
ocmcram: ocmcram@40300000 {
compatible = "mmio-sram";
reg = <0x40300000 0x20000>; /* 128k */
};
sdma: dma-controller@4a056000 { sdma: dma-controller@4a056000 {
compatible = "ti,omap4430-sdma"; compatible = "ti,omap4430-sdma";
reg = <0x4a056000 0x1000>; reg = <0x4a056000 0x1000>;
......
...@@ -122,6 +122,7 @@ CONFIG_BLK_DEV_RAM_SIZE=16384 ...@@ -122,6 +122,7 @@ CONFIG_BLK_DEV_RAM_SIZE=16384
CONFIG_SENSORS_TSL2550=m CONFIG_SENSORS_TSL2550=m
CONFIG_BMP085_I2C=m CONFIG_BMP085_I2C=m
CONFIG_SENSORS_LIS3_I2C=m CONFIG_SENSORS_LIS3_I2C=m
CONFIG_SRAM=y
CONFIG_SCSI=y CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y CONFIG_BLK_DEV_SD=y
CONFIG_SCSI_SCAN_ASYNC=y CONFIG_SCSI_SCAN_ASYNC=y
......
...@@ -32,12 +32,6 @@ ...@@ -32,12 +32,6 @@
#define OMAP2_SRAM_PUB_PA (OMAP2_SRAM_PA + 0xf800) #define OMAP2_SRAM_PUB_PA (OMAP2_SRAM_PA + 0xf800)
#define OMAP3_SRAM_PUB_PA (OMAP3_SRAM_PA + 0x8000) #define OMAP3_SRAM_PUB_PA (OMAP3_SRAM_PA + 0x8000)
#ifdef CONFIG_OMAP4_ERRATA_I688
#define OMAP4_SRAM_PUB_PA OMAP4_SRAM_PA
#else
#define OMAP4_SRAM_PUB_PA (OMAP4_SRAM_PA + 0x4000)
#endif
#define OMAP5_SRAM_PA 0x40300000
#define SRAM_BOOTLOADER_SZ 0x00 #define SRAM_BOOTLOADER_SZ 0x00
...@@ -105,32 +99,14 @@ static void __init omap_detect_sram(void) ...@@ -105,32 +99,14 @@ static void __init omap_detect_sram(void)
} else { } else {
omap_sram_size = 0x8000; /* 32K */ omap_sram_size = 0x8000; /* 32K */
} }
} else if (cpu_is_omap44xx()) {
omap_sram_start = OMAP4_SRAM_PUB_PA;
omap_sram_size = 0xa000; /* 40K */
} else if (soc_is_omap54xx()) {
omap_sram_start = OMAP5_SRAM_PA;
omap_sram_size = SZ_128K; /* 128KB */
} else { } else {
omap_sram_start = OMAP2_SRAM_PUB_PA; omap_sram_start = OMAP2_SRAM_PUB_PA;
omap_sram_size = 0x800; /* 2K */ omap_sram_size = 0x800; /* 2K */
} }
} else { } else {
if (soc_is_am33xx()) { if (cpu_is_omap34xx()) {
omap_sram_start = AM33XX_SRAM_PA;
omap_sram_size = 0x10000; /* 64K */
} else if (soc_is_am43xx()) {
omap_sram_start = AM33XX_SRAM_PA;
omap_sram_size = SZ_256K;
} else if (cpu_is_omap34xx()) {
omap_sram_start = OMAP3_SRAM_PA; omap_sram_start = OMAP3_SRAM_PA;
omap_sram_size = 0x10000; /* 64K */ omap_sram_size = 0x10000; /* 64K */
} else if (cpu_is_omap44xx()) {
omap_sram_start = OMAP4_SRAM_PA;
omap_sram_size = 0xe000; /* 56K */
} else if (soc_is_omap54xx()) {
omap_sram_start = OMAP5_SRAM_PA;
omap_sram_size = SZ_128K; /* 128KB */
} else { } else {
omap_sram_start = OMAP2_SRAM_PA; omap_sram_start = OMAP2_SRAM_PA;
if (cpu_is_omap242x()) if (cpu_is_omap242x())
......
...@@ -80,4 +80,3 @@ static inline void omap_push_sram_idle(void) {} ...@@ -80,4 +80,3 @@ static inline void omap_push_sram_idle(void) {}
#else #else
#define OMAP4_SRAM_PA 0x40300000 #define OMAP4_SRAM_PA 0x40300000
#endif #endif
#define AM33XX_SRAM_PA 0x40300000
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