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Commit 8c30d2cf authored by Richard Henderson's avatar Richard Henderson
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From Art Haas: C99 initializers for arch/alpha.

parent a14f13f8
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Showing with 770 additions and 770 deletions
arch/alpha/kernel/irq.c
View file @ 8c30d2cf
......@@ -62,13 +62,13 @@ no_irq_ack(unsigned int irq)
}
struct hw_interrupt_type no_irq_type = {
typename: "none",
startup: no_irq_startup,
shutdown: no_irq_enable_disable,
enable: no_irq_enable_disable,
disable: no_irq_enable_disable,
ack: no_irq_ack,
end: no_irq_enable_disable,
.typename = "none",
.startup = no_irq_startup,
.shutdown = no_irq_enable_disable,
.enable = no_irq_enable_disable,
.disable = no_irq_enable_disable,
.ack = no_irq_ack,
.end = no_irq_enable_disable,
};
int
......
arch/alpha/kernel/irq_alpha.c
View file @ 8c30d2cf
......@@ -213,19 +213,19 @@ static void rtc_enable_disable(unsigned int irq) { }
static unsigned int rtc_startup(unsigned int irq) { return 0; }
struct irqaction timer_irqaction = {
handler: timer_interrupt,
flags: SA_INTERRUPT,
name: "timer",
.handler = timer_interrupt,
.flags = SA_INTERRUPT,
.name = "timer",
};
static struct hw_interrupt_type rtc_irq_type = {
typename: "RTC",
startup: rtc_startup,
shutdown: rtc_enable_disable,
enable: rtc_enable_disable,
disable: rtc_enable_disable,
ack: rtc_enable_disable,
end: rtc_enable_disable,
.typename = "RTC",
.startup = rtc_startup,
.shutdown = rtc_enable_disable,
.enable = rtc_enable_disable,
.disable = rtc_enable_disable,
.ack = rtc_enable_disable,
.end = rtc_enable_disable,
};
void __init
......@@ -238,16 +238,16 @@ init_rtc_irq(void)
/* Dummy irqactions. */
struct irqaction isa_cascade_irqaction = {
handler: no_action,
name: "isa-cascade"
.handler = no_action,
.name = "isa-cascade"
};
struct irqaction timer_cascade_irqaction = {
handler: no_action,
name: "timer-cascade"
.handler = no_action,
.name = "timer-cascade"
};
struct irqaction halt_switch_irqaction = {
handler: no_action,
name: "halt-switch"
.handler = no_action,
.name = "halt-switch"
};
arch/alpha/kernel/irq_i8259.c
View file @ 8c30d2cf
......@@ -85,21 +85,21 @@ i8259a_end_irq(unsigned int irq)
}
struct hw_interrupt_type i8259a_irq_type = {
typename: "XT-PIC",
startup: i8259a_startup_irq,
shutdown: i8259a_disable_irq,
enable: i8259a_enable_irq,
disable: i8259a_disable_irq,
ack: i8259a_mask_and_ack_irq,
end: i8259a_end_irq,
.typename = "XT-PIC",
.startup = i8259a_startup_irq,
.shutdown = i8259a_disable_irq,
.enable = i8259a_enable_irq,
.disable = i8259a_disable_irq,
.ack = i8259a_mask_and_ack_irq,
.end = i8259a_end_irq,
};
void __init
init_i8259a_irqs(void)
{
static struct irqaction cascade = {
handler: no_action,
name: "cascade",
.handler = no_action,
.name = "cascade",
};
long i;
......
arch/alpha/kernel/irq_pyxis.c
View file @ 8c30d2cf
......@@ -71,13 +71,13 @@ pyxis_mask_and_ack_irq(unsigned int irq)
}
static struct hw_interrupt_type pyxis_irq_type = {
typename: "PYXIS",
startup: pyxis_startup_irq,
shutdown: pyxis_disable_irq,
enable: pyxis_enable_irq,
disable: pyxis_disable_irq,
ack: pyxis_mask_and_ack_irq,
end: pyxis_end_irq,
.typename = "PYXIS",
.startup = pyxis_startup_irq,
.shutdown = pyxis_disable_irq,
.enable = pyxis_enable_irq,
.disable = pyxis_disable_irq,
.ack = pyxis_mask_and_ack_irq,
.end = pyxis_end_irq,
};
void
......
arch/alpha/kernel/irq_srm.c
View file @ 8c30d2cf
......@@ -49,13 +49,13 @@ srm_end_irq(unsigned int irq)
/* Handle interrupts from the SRM, assuming no additional weirdness. */
static struct hw_interrupt_type srm_irq_type = {
typename: "SRM",
startup: srm_startup_irq,
shutdown: srm_disable_irq,
enable: srm_enable_irq,
disable: srm_disable_irq,
ack: srm_disable_irq,
end: srm_end_irq,
.typename = "SRM",
.startup = srm_startup_irq,
.shutdown = srm_disable_irq,
.enable = srm_enable_irq,
.disable = srm_disable_irq,
.ack = srm_disable_irq,
.end = srm_end_irq,
};
void __init
......
arch/alpha/kernel/setup.c
View file @ 8c30d2cf
......@@ -112,12 +112,12 @@ char saved_command_line[COMMAND_LINE_SIZE];
*/
struct screen_info screen_info = {
orig_x: 0,
orig_y: 25,
orig_video_cols: 80,
orig_video_lines: 25,
orig_video_isVGA: 1,
orig_video_points: 16
.orig_x = 0,
.orig_y = 25,
.orig_video_cols = 80,
.orig_video_lines = 25,
.orig_video_isVGA = 1,
.orig_video_points = 16
};
/*
......@@ -452,12 +452,12 @@ static int __init srm_console_setup(struct console *co, char *options)
}
static struct console srmcons = {
name: "srm0",
write: srm_console_write,
device: srm_console_device,
setup: srm_console_setup,
flags: CON_PRINTBUFFER | CON_ENABLED, /* fake it out */
index: -1,
.name = "srm0",
.write = srm_console_write,
.device = srm_console_device,
.setup = srm_console_setup,
.flags = CON_PRINTBUFFER | CON_ENABLED, /* fake it out */
.index = -1,
};
#else
......@@ -1150,10 +1150,10 @@ c_stop(struct seq_file *f, void *v)
}
struct seq_operations cpuinfo_op = {
start: c_start,
next: c_next,
stop: c_stop,
show: show_cpuinfo,
.start = c_start,
.next = c_next,
.stop = c_stop,
.show = show_cpuinfo,
};
......
arch/alpha/kernel/sys_alcor.c
View file @ 8c30d2cf
......@@ -91,13 +91,13 @@ alcor_end_irq(unsigned int irq)
}
static struct hw_interrupt_type alcor_irq_type = {
typename: "ALCOR",
startup: alcor_startup_irq,
shutdown: alcor_disable_irq,
enable: alcor_enable_irq,
disable: alcor_disable_irq,
ack: alcor_mask_and_ack_irq,
end: alcor_end_irq,
.typename = "ALCOR",
.startup = alcor_startup_irq,
.shutdown = alcor_disable_irq,
.enable = alcor_enable_irq,
.disable = alcor_disable_irq,
.ack = alcor_mask_and_ack_irq,
.end = alcor_end_irq,
};
static void
......@@ -245,29 +245,29 @@ alcor_kill_arch(int mode)
#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_ALCOR)
struct alpha_machine_vector alcor_mv __initmv = {
vector_name: "Alcor",
.vector_name = "Alcor",
DO_EV5_MMU,
DO_DEFAULT_RTC,
DO_CIA_IO,
DO_CIA_BUS,
machine_check: cia_machine_check,
max_dma_address: ALPHA_ALCOR_MAX_DMA_ADDRESS,
min_io_address: EISA_DEFAULT_IO_BASE,
min_mem_address: CIA_DEFAULT_MEM_BASE,
nr_irqs: 48,
device_interrupt: alcor_device_interrupt,
init_arch: cia_init_arch,
init_irq: alcor_init_irq,
init_rtc: common_init_rtc,
init_pci: cia_init_pci,
kill_arch: alcor_kill_arch,
pci_map_irq: alcor_map_irq,
pci_swizzle: common_swizzle,
sys: { cia: {
gru_int_req_bits: ALCOR_GRU_INT_REQ_BITS
.machine_check = cia_machine_check,
.max_dma_address = ALPHA_ALCOR_MAX_DMA_ADDRESS,
.min_io_address = EISA_DEFAULT_IO_BASE,
.min_mem_address = CIA_DEFAULT_MEM_BASE,
.nr_irqs = 48,
.device_interrupt = alcor_device_interrupt,
.init_arch = cia_init_arch,
.init_irq = alcor_init_irq,
.init_rtc = common_init_rtc,
.init_pci = cia_init_pci,
.kill_arch = alcor_kill_arch,
.pci_map_irq = alcor_map_irq,
.pci_swizzle = common_swizzle,
.sys = { .cia = {
.gru_int_req_bits = ALCOR_GRU_INT_REQ_BITS
}}
};
ALIAS_MV(alcor)
......@@ -275,29 +275,29 @@ ALIAS_MV(alcor)
#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_XLT)
struct alpha_machine_vector xlt_mv __initmv = {
vector_name: "XLT",
.vector_name = "XLT",
DO_EV5_MMU,
DO_DEFAULT_RTC,
DO_CIA_IO,
DO_CIA_BUS,
machine_check: cia_machine_check,
max_dma_address: ALPHA_MAX_DMA_ADDRESS,
min_io_address: EISA_DEFAULT_IO_BASE,
min_mem_address: CIA_DEFAULT_MEM_BASE,
nr_irqs: 48,
device_interrupt: alcor_device_interrupt,
init_arch: cia_init_arch,
init_irq: alcor_init_irq,
init_rtc: common_init_rtc,
init_pci: cia_init_pci,
kill_arch: alcor_kill_arch,
pci_map_irq: alcor_map_irq,
pci_swizzle: common_swizzle,
sys: { cia: {
gru_int_req_bits: XLT_GRU_INT_REQ_BITS
.machine_check = cia_machine_check,
.max_dma_address = ALPHA_MAX_DMA_ADDRESS,
.min_io_address = EISA_DEFAULT_IO_BASE,
.min_mem_address = CIA_DEFAULT_MEM_BASE,
.nr_irqs = 48,
.device_interrupt = alcor_device_interrupt,
.init_arch = cia_init_arch,
.init_irq = alcor_init_irq,
.init_rtc = common_init_rtc,
.init_pci = cia_init_pci,
.kill_arch = alcor_kill_arch,
.pci_map_irq = alcor_map_irq,
.pci_swizzle = common_swizzle,
.sys = { .cia = {
.gru_int_req_bits = XLT_GRU_INT_REQ_BITS
}}
};
ALIAS_MV(xlt)
......
arch/alpha/kernel/sys_cabriolet.c
View file @ 8c30d2cf
......@@ -73,13 +73,13 @@ cabriolet_end_irq(unsigned int irq)
}
static struct hw_interrupt_type cabriolet_irq_type = {
typename: "CABRIOLET",
startup: cabriolet_startup_irq,
shutdown: cabriolet_disable_irq,
enable: cabriolet_enable_irq,
disable: cabriolet_disable_irq,
ack: cabriolet_disable_irq,
end: cabriolet_end_irq,
.typename = "CABRIOLET",
.startup = cabriolet_startup_irq,
.shutdown = cabriolet_disable_irq,
.enable = cabriolet_enable_irq,
.disable = cabriolet_disable_irq,
.ack = cabriolet_disable_irq,
.end = cabriolet_end_irq,
};
static void
......@@ -321,26 +321,26 @@ alphapc164_init_pci(void)
#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_CABRIOLET)
struct alpha_machine_vector cabriolet_mv __initmv = {
vector_name: "Cabriolet",
.vector_name = "Cabriolet",
DO_EV4_MMU,
DO_DEFAULT_RTC,
DO_APECS_IO,
DO_APECS_BUS,
machine_check: apecs_machine_check,
max_dma_address: ALPHA_MAX_DMA_ADDRESS,
min_io_address: DEFAULT_IO_BASE,
min_mem_address: APECS_AND_LCA_DEFAULT_MEM_BASE,
nr_irqs: 35,
device_interrupt: cabriolet_device_interrupt,
init_arch: apecs_init_arch,
init_irq: cabriolet_init_irq,
init_rtc: common_init_rtc,
init_pci: cabriolet_init_pci,
kill_arch: NULL,
pci_map_irq: cabriolet_map_irq,
pci_swizzle: common_swizzle,
.machine_check = apecs_machine_check,
.max_dma_address = ALPHA_MAX_DMA_ADDRESS,
.min_io_address = DEFAULT_IO_BASE,
.min_mem_address = APECS_AND_LCA_DEFAULT_MEM_BASE,
.nr_irqs = 35,
.device_interrupt = cabriolet_device_interrupt,
.init_arch = apecs_init_arch,
.init_irq = cabriolet_init_irq,
.init_rtc = common_init_rtc,
.init_pci = cabriolet_init_pci,
.kill_arch = NULL,
.pci_map_irq = cabriolet_map_irq,
.pci_swizzle = common_swizzle,
};
#ifndef CONFIG_ALPHA_EB64P
ALIAS_MV(cabriolet)
......@@ -349,101 +349,101 @@ ALIAS_MV(cabriolet)
#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_EB164)
struct alpha_machine_vector eb164_mv __initmv = {
vector_name: "EB164",
.vector_name = "EB164",
DO_EV5_MMU,
DO_DEFAULT_RTC,
DO_CIA_IO,
DO_CIA_BUS,
machine_check: cia_machine_check,
max_dma_address: ALPHA_MAX_DMA_ADDRESS,
min_io_address: DEFAULT_IO_BASE,
min_mem_address: CIA_DEFAULT_MEM_BASE,
nr_irqs: 35,
device_interrupt: cabriolet_device_interrupt,
init_arch: cia_init_arch,
init_irq: cabriolet_init_irq,
init_rtc: common_init_rtc,
init_pci: cia_cab_init_pci,
pci_map_irq: cabriolet_map_irq,
pci_swizzle: common_swizzle,
.machine_check = cia_machine_check,
.max_dma_address = ALPHA_MAX_DMA_ADDRESS,
.min_io_address = DEFAULT_IO_BASE,
.min_mem_address = CIA_DEFAULT_MEM_BASE,
.nr_irqs = 35,
.device_interrupt = cabriolet_device_interrupt,
.init_arch = cia_init_arch,
.init_irq = cabriolet_init_irq,
.init_rtc = common_init_rtc,
.init_pci = cia_cab_init_pci,
.pci_map_irq = cabriolet_map_irq,
.pci_swizzle = common_swizzle,
};
ALIAS_MV(eb164)
#endif
#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_EB66P)
struct alpha_machine_vector eb66p_mv __initmv = {
vector_name: "EB66+",
.vector_name = "EB66+",
DO_EV4_MMU,
DO_DEFAULT_RTC,
DO_LCA_IO,
DO_LCA_BUS,
machine_check: lca_machine_check,
max_dma_address: ALPHA_MAX_DMA_ADDRESS,
min_io_address: DEFAULT_IO_BASE,
min_mem_address: APECS_AND_LCA_DEFAULT_MEM_BASE,
nr_irqs: 35,
device_interrupt: cabriolet_device_interrupt,
init_arch: lca_init_arch,
init_irq: cabriolet_init_irq,
init_rtc: common_init_rtc,
init_pci: cabriolet_init_pci,
pci_map_irq: eb66p_map_irq,
pci_swizzle: common_swizzle,
.machine_check = lca_machine_check,
.max_dma_address = ALPHA_MAX_DMA_ADDRESS,
.min_io_address = DEFAULT_IO_BASE,
.min_mem_address = APECS_AND_LCA_DEFAULT_MEM_BASE,
.nr_irqs = 35,
.device_interrupt = cabriolet_device_interrupt,
.init_arch = lca_init_arch,
.init_irq = cabriolet_init_irq,
.init_rtc = common_init_rtc,
.init_pci = cabriolet_init_pci,
.pci_map_irq = eb66p_map_irq,
.pci_swizzle = common_swizzle,
};
ALIAS_MV(eb66p)
#endif
#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_LX164)
struct alpha_machine_vector lx164_mv __initmv = {
vector_name: "LX164",
.vector_name = "LX164",
DO_EV5_MMU,
DO_DEFAULT_RTC,
DO_PYXIS_IO,
DO_CIA_BUS,
machine_check: cia_machine_check,
max_dma_address: ALPHA_MAX_DMA_ADDRESS,
min_io_address: DEFAULT_IO_BASE,
min_mem_address: DEFAULT_MEM_BASE,
pci_dac_offset: PYXIS_DAC_OFFSET,
nr_irqs: 35,
device_interrupt: cabriolet_device_interrupt,
init_arch: pyxis_init_arch,
init_irq: cabriolet_init_irq,
init_rtc: common_init_rtc,
init_pci: alphapc164_init_pci,
pci_map_irq: alphapc164_map_irq,
pci_swizzle: common_swizzle,
.machine_check = cia_machine_check,
.max_dma_address = ALPHA_MAX_DMA_ADDRESS,
.min_io_address = DEFAULT_IO_BASE,
.min_mem_address = DEFAULT_MEM_BASE,
.pci_dac_offset = PYXIS_DAC_OFFSET,
.nr_irqs = 35,
.device_interrupt = cabriolet_device_interrupt,
.init_arch = pyxis_init_arch,
.init_irq = cabriolet_init_irq,
.init_rtc = common_init_rtc,
.init_pci = alphapc164_init_pci,
.pci_map_irq = alphapc164_map_irq,
.pci_swizzle = common_swizzle,
};
ALIAS_MV(lx164)
#endif
#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_PC164)
struct alpha_machine_vector pc164_mv __initmv = {
vector_name: "PC164",
.vector_name = "PC164",
DO_EV5_MMU,
DO_DEFAULT_RTC,
DO_CIA_IO,
DO_CIA_BUS,
machine_check: cia_machine_check,
max_dma_address: ALPHA_MAX_DMA_ADDRESS,
min_io_address: DEFAULT_IO_BASE,
min_mem_address: CIA_DEFAULT_MEM_BASE,
nr_irqs: 35,
device_interrupt: pc164_device_interrupt,
init_arch: cia_init_arch,
init_irq: pc164_init_irq,
init_rtc: common_init_rtc,
init_pci: alphapc164_init_pci,
pci_map_irq: alphapc164_map_irq,
pci_swizzle: common_swizzle,
.machine_check = cia_machine_check,
.max_dma_address = ALPHA_MAX_DMA_ADDRESS,
.min_io_address = DEFAULT_IO_BASE,
.min_mem_address = CIA_DEFAULT_MEM_BASE,
.nr_irqs = 35,
.device_interrupt = pc164_device_interrupt,
.init_arch = cia_init_arch,
.init_irq = pc164_init_irq,
.init_rtc = common_init_rtc,
.init_pci = alphapc164_init_pci,
.pci_map_irq = alphapc164_map_irq,
.pci_swizzle = common_swizzle,
};
ALIAS_MV(pc164)
#endif
arch/alpha/kernel/sys_dp264.c
View file @ 8c30d2cf
......@@ -197,25 +197,25 @@ clipper_set_affinity(unsigned int irq, unsigned long affinity)
}
static struct hw_interrupt_type dp264_irq_type = {
typename: "DP264",
startup: dp264_startup_irq,
shutdown: dp264_disable_irq,
enable: dp264_enable_irq,
disable: dp264_disable_irq,
ack: dp264_disable_irq,
end: dp264_end_irq,
set_affinity: dp264_set_affinity,
.typename = "DP264",
.startup = dp264_startup_irq,
.shutdown = dp264_disable_irq,
.enable = dp264_enable_irq,
.disable = dp264_disable_irq,
.ack = dp264_disable_irq,
.end = dp264_end_irq,
.set_affinity = dp264_set_affinity,
};
static struct hw_interrupt_type clipper_irq_type = {
typename: "CLIPPER",
startup: clipper_startup_irq,
shutdown: clipper_disable_irq,
enable: clipper_enable_irq,
disable: clipper_disable_irq,
ack: clipper_disable_irq,
end: clipper_end_irq,
set_affinity: clipper_set_affinity,
.typename = "CLIPPER",
.startup = clipper_startup_irq,
.shutdown = clipper_disable_irq,
.enable = clipper_enable_irq,
.disable = clipper_disable_irq,
.ack = clipper_disable_irq,
.end = clipper_end_irq,
.set_affinity = clipper_set_affinity,
};
static void
......@@ -566,100 +566,100 @@ webbrick_init_arch(void)
*/
struct alpha_machine_vector dp264_mv __initmv = {
vector_name: "DP264",
.vector_name = "DP264",
DO_EV6_MMU,
DO_DEFAULT_RTC,
DO_TSUNAMI_IO,
DO_TSUNAMI_BUS,
machine_check: tsunami_machine_check,
max_dma_address: ALPHA_MAX_DMA_ADDRESS,
min_io_address: DEFAULT_IO_BASE,
min_mem_address: DEFAULT_MEM_BASE,
pci_dac_offset: TSUNAMI_DAC_OFFSET,
nr_irqs: 64,
device_interrupt: dp264_device_interrupt,
init_arch: tsunami_init_arch,
init_irq: dp264_init_irq,
init_rtc: common_init_rtc,
init_pci: dp264_init_pci,
kill_arch: tsunami_kill_arch,
pci_map_irq: dp264_map_irq,
pci_swizzle: common_swizzle,
.machine_check = tsunami_machine_check,
.max_dma_address = ALPHA_MAX_DMA_ADDRESS,
.min_io_address = DEFAULT_IO_BASE,
.min_mem_address = DEFAULT_MEM_BASE,
.pci_dac_offset = TSUNAMI_DAC_OFFSET,
.nr_irqs = 64,
.device_interrupt = dp264_device_interrupt,
.init_arch = tsunami_init_arch,
.init_irq = dp264_init_irq,
.init_rtc = common_init_rtc,
.init_pci = dp264_init_pci,
.kill_arch = tsunami_kill_arch,
.pci_map_irq = dp264_map_irq,
.pci_swizzle = common_swizzle,
};
ALIAS_MV(dp264)
struct alpha_machine_vector monet_mv __initmv = {
vector_name: "Monet",
.vector_name = "Monet",
DO_EV6_MMU,
DO_DEFAULT_RTC,
DO_TSUNAMI_IO,
DO_TSUNAMI_BUS,
machine_check: tsunami_machine_check,
max_dma_address: ALPHA_MAX_DMA_ADDRESS,
min_io_address: DEFAULT_IO_BASE,
min_mem_address: DEFAULT_MEM_BASE,
pci_dac_offset: TSUNAMI_DAC_OFFSET,
nr_irqs: 64,
device_interrupt: dp264_device_interrupt,
init_arch: tsunami_init_arch,
init_irq: dp264_init_irq,
init_rtc: common_init_rtc,
init_pci: monet_init_pci,
kill_arch: tsunami_kill_arch,
pci_map_irq: monet_map_irq,
pci_swizzle: monet_swizzle,
.machine_check = tsunami_machine_check,
.max_dma_address = ALPHA_MAX_DMA_ADDRESS,
.min_io_address = DEFAULT_IO_BASE,
.min_mem_address = DEFAULT_MEM_BASE,
.pci_dac_offset = TSUNAMI_DAC_OFFSET,
.nr_irqs = 64,
.device_interrupt = dp264_device_interrupt,
.init_arch = tsunami_init_arch,
.init_irq = dp264_init_irq,
.init_rtc = common_init_rtc,
.init_pci = monet_init_pci,
.kill_arch = tsunami_kill_arch,
.pci_map_irq = monet_map_irq,
.pci_swizzle = monet_swizzle,
};
struct alpha_machine_vector webbrick_mv __initmv = {
vector_name: "Webbrick",
.vector_name = "Webbrick",
DO_EV6_MMU,
DO_DEFAULT_RTC,
DO_TSUNAMI_IO,
DO_TSUNAMI_BUS,
machine_check: tsunami_machine_check,
max_dma_address: ALPHA_MAX_DMA_ADDRESS,
min_io_address: DEFAULT_IO_BASE,
min_mem_address: DEFAULT_MEM_BASE,
pci_dac_offset: TSUNAMI_DAC_OFFSET,
nr_irqs: 64,
device_interrupt: dp264_device_interrupt,
init_arch: webbrick_init_arch,
init_irq: dp264_init_irq,
init_rtc: common_init_rtc,
init_pci: common_init_pci,
kill_arch: tsunami_kill_arch,
pci_map_irq: webbrick_map_irq,
pci_swizzle: common_swizzle,
.machine_check = tsunami_machine_check,
.max_dma_address = ALPHA_MAX_DMA_ADDRESS,
.min_io_address = DEFAULT_IO_BASE,
.min_mem_address = DEFAULT_MEM_BASE,
.pci_dac_offset = TSUNAMI_DAC_OFFSET,
.nr_irqs = 64,
.device_interrupt = dp264_device_interrupt,
.init_arch = webbrick_init_arch,
.init_irq = dp264_init_irq,
.init_rtc = common_init_rtc,
.init_pci = common_init_pci,
.kill_arch = tsunami_kill_arch,
.pci_map_irq = webbrick_map_irq,
.pci_swizzle = common_swizzle,
};
struct alpha_machine_vector clipper_mv __initmv = {
vector_name: "Clipper",
.vector_name = "Clipper",
DO_EV6_MMU,
DO_DEFAULT_RTC,
DO_TSUNAMI_IO,
DO_TSUNAMI_BUS,
machine_check: tsunami_machine_check,
max_dma_address: ALPHA_MAX_DMA_ADDRESS,
min_io_address: DEFAULT_IO_BASE,
min_mem_address: DEFAULT_MEM_BASE,
pci_dac_offset: TSUNAMI_DAC_OFFSET,
nr_irqs: 64,
device_interrupt: dp264_device_interrupt,
init_arch: tsunami_init_arch,
init_irq: clipper_init_irq,
init_rtc: common_init_rtc,
init_pci: common_init_pci,
kill_arch: tsunami_kill_arch,
pci_map_irq: clipper_map_irq,
pci_swizzle: common_swizzle,
.machine_check = tsunami_machine_check,
.max_dma_address = ALPHA_MAX_DMA_ADDRESS,
.min_io_address = DEFAULT_IO_BASE,
.min_mem_address = DEFAULT_MEM_BASE,
.pci_dac_offset = TSUNAMI_DAC_OFFSET,
.nr_irqs = 64,
.device_interrupt = dp264_device_interrupt,
.init_arch = tsunami_init_arch,
.init_irq = clipper_init_irq,
.init_rtc = common_init_rtc,
.init_pci = common_init_pci,
.kill_arch = tsunami_kill_arch,
.pci_map_irq = clipper_map_irq,
.pci_swizzle = common_swizzle,
};
/* Sharks strongly resemble Clipper, at least as far
......@@ -668,27 +668,27 @@ struct alpha_machine_vector clipper_mv __initmv = {
*/
struct alpha_machine_vector shark_mv __initmv = {
vector_name: "Shark",
.vector_name = "Shark",
DO_EV6_MMU,
DO_DEFAULT_RTC,
DO_TSUNAMI_IO,
DO_TSUNAMI_BUS,
machine_check: tsunami_machine_check,
max_dma_address: ALPHA_MAX_DMA_ADDRESS,
min_io_address: DEFAULT_IO_BASE,
min_mem_address: DEFAULT_MEM_BASE,
pci_dac_offset: TSUNAMI_DAC_OFFSET,
nr_irqs: 64,
device_interrupt: dp264_device_interrupt,
init_arch: tsunami_init_arch,
init_irq: clipper_init_irq,
init_rtc: common_init_rtc,
init_pci: common_init_pci,
kill_arch: tsunami_kill_arch,
pci_map_irq: clipper_map_irq,
pci_swizzle: common_swizzle,
.machine_check = tsunami_machine_check,
.max_dma_address = ALPHA_MAX_DMA_ADDRESS,
.min_io_address = DEFAULT_IO_BASE,
.min_mem_address = DEFAULT_MEM_BASE,
.pci_dac_offset = TSUNAMI_DAC_OFFSET,
.nr_irqs = 64,
.device_interrupt = dp264_device_interrupt,
.init_arch = tsunami_init_arch,
.init_irq = clipper_init_irq,
.init_rtc = common_init_rtc,
.init_pci = common_init_pci,
.kill_arch = tsunami_kill_arch,
.pci_map_irq = clipper_map_irq,
.pci_swizzle = common_swizzle,
};
/* No alpha_mv alias for webbrick/monet/clipper, since we compile them
......
arch/alpha/kernel/sys_eb64p.c
View file @ 8c30d2cf
......@@ -71,13 +71,13 @@ eb64p_end_irq(unsigned int irq)
}
static struct hw_interrupt_type eb64p_irq_type = {
typename: "EB64P",
startup: eb64p_startup_irq,
shutdown: eb64p_disable_irq,
enable: eb64p_enable_irq,
disable: eb64p_disable_irq,
ack: eb64p_disable_irq,
end: eb64p_end_irq,
.typename = "EB64P",
.startup = eb64p_startup_irq,
.shutdown = eb64p_disable_irq,
.enable = eb64p_enable_irq,
.disable = eb64p_disable_irq,
.ack = eb64p_disable_irq,
.end = eb64p_end_irq,
};
static void
......@@ -208,51 +208,51 @@ eb64p_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_EB64P)
struct alpha_machine_vector eb64p_mv __initmv = {
vector_name: "EB64+",
.vector_name = "EB64+",
DO_EV4_MMU,
DO_DEFAULT_RTC,
DO_APECS_IO,
DO_APECS_BUS,
machine_check: apecs_machine_check,
max_dma_address: ALPHA_MAX_DMA_ADDRESS,
min_io_address: DEFAULT_IO_BASE,
min_mem_address: APECS_AND_LCA_DEFAULT_MEM_BASE,
nr_irqs: 32,
device_interrupt: eb64p_device_interrupt,
init_arch: apecs_init_arch,
init_irq: eb64p_init_irq,
init_rtc: common_init_rtc,
init_pci: common_init_pci,
kill_arch: NULL,
pci_map_irq: eb64p_map_irq,
pci_swizzle: common_swizzle,
.machine_check = apecs_machine_check,
.max_dma_address = ALPHA_MAX_DMA_ADDRESS,
.min_io_address = DEFAULT_IO_BASE,
.min_mem_address = APECS_AND_LCA_DEFAULT_MEM_BASE,
.nr_irqs = 32,
.device_interrupt = eb64p_device_interrupt,
.init_arch = apecs_init_arch,
.init_irq = eb64p_init_irq,
.init_rtc = common_init_rtc,
.init_pci = common_init_pci,
.kill_arch = NULL,
.pci_map_irq = eb64p_map_irq,
.pci_swizzle = common_swizzle,
};
ALIAS_MV(eb64p)
#endif
#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_EB66)
struct alpha_machine_vector eb66_mv __initmv = {
vector_name: "EB66",
.vector_name = "EB66",
DO_EV4_MMU,
DO_DEFAULT_RTC,
DO_LCA_IO,
DO_LCA_BUS,
machine_check: lca_machine_check,
max_dma_address: ALPHA_MAX_DMA_ADDRESS,
min_io_address: DEFAULT_IO_BASE,
min_mem_address: APECS_AND_LCA_DEFAULT_MEM_BASE,
nr_irqs: 32,
device_interrupt: eb64p_device_interrupt,
init_arch: lca_init_arch,
init_irq: eb64p_init_irq,
init_rtc: common_init_rtc,
init_pci: common_init_pci,
pci_map_irq: eb64p_map_irq,
pci_swizzle: common_swizzle,
.machine_check = lca_machine_check,
.max_dma_address = ALPHA_MAX_DMA_ADDRESS,
.min_io_address = DEFAULT_IO_BASE,
.min_mem_address = APECS_AND_LCA_DEFAULT_MEM_BASE,
.nr_irqs = 32,
.device_interrupt = eb64p_device_interrupt,
.init_arch = lca_init_arch,
.init_irq = eb64p_init_irq,
.init_rtc = common_init_rtc,
.init_pci = common_init_pci,
.pci_map_irq = eb64p_map_irq,
.pci_swizzle = common_swizzle,
};
ALIAS_MV(eb66)
#endif
arch/alpha/kernel/sys_eiger.c
View file @ 8c30d2cf
......@@ -81,13 +81,13 @@ eiger_end_irq(unsigned int irq)
}
static struct hw_interrupt_type eiger_irq_type = {
typename: "EIGER",
startup: eiger_startup_irq,
shutdown: eiger_disable_irq,
enable: eiger_enable_irq,
disable: eiger_disable_irq,
ack: eiger_disable_irq,
end: eiger_end_irq,
.typename = "EIGER",
.startup = eiger_startup_irq,
.shutdown = eiger_disable_irq,
.enable = eiger_enable_irq,
.disable = eiger_disable_irq,
.ack = eiger_disable_irq,
.end = eiger_end_irq,
};
static void
......@@ -225,26 +225,26 @@ eiger_swizzle(struct pci_dev *dev, u8 *pinp)
*/
struct alpha_machine_vector eiger_mv __initmv = {
vector_name: "Eiger",
.vector_name = "Eiger",
DO_EV6_MMU,
DO_DEFAULT_RTC,
DO_TSUNAMI_IO,
DO_TSUNAMI_BUS,
machine_check: tsunami_machine_check,
max_dma_address: ALPHA_MAX_DMA_ADDRESS,
min_io_address: DEFAULT_IO_BASE,
min_mem_address: DEFAULT_MEM_BASE,
pci_dac_offset: TSUNAMI_DAC_OFFSET,
nr_irqs: 128,
device_interrupt: eiger_device_interrupt,
init_arch: tsunami_init_arch,
init_irq: eiger_init_irq,
init_rtc: common_init_rtc,
init_pci: common_init_pci,
kill_arch: tsunami_kill_arch,
pci_map_irq: eiger_map_irq,
pci_swizzle: eiger_swizzle,
.machine_check = tsunami_machine_check,
.max_dma_address = ALPHA_MAX_DMA_ADDRESS,
.min_io_address = DEFAULT_IO_BASE,
.min_mem_address = DEFAULT_MEM_BASE,
.pci_dac_offset = TSUNAMI_DAC_OFFSET,
.nr_irqs = 128,
.device_interrupt = eiger_device_interrupt,
.init_arch = tsunami_init_arch,
.init_irq = eiger_init_irq,
.init_rtc = common_init_rtc,
.init_pci = common_init_pci,
.kill_arch = tsunami_kill_arch,
.pci_map_irq = eiger_map_irq,
.pci_swizzle = eiger_swizzle,
};
ALIAS_MV(eiger)
arch/alpha/kernel/sys_jensen.c
View file @ 8c30d2cf
......@@ -119,13 +119,13 @@ jensen_local_end(unsigned int irq)
}
static struct hw_interrupt_type jensen_local_irq_type = {
typename: "LOCAL",
startup: jensen_local_startup,
shutdown: jensen_local_shutdown,
enable: jensen_local_enable,
disable: jensen_local_disable,
ack: jensen_local_ack,
end: jensen_local_end,
.typename = "LOCAL",
.startup = jensen_local_startup,
.shutdown = jensen_local_shutdown,
.enable = jensen_local_enable,
.disable = jensen_local_disable,
.ack = jensen_local_ack,
.end = jensen_local_end,
};
static void
......@@ -252,21 +252,21 @@ jensen_machine_check (u64 vector, u64 la, struct pt_regs *regs)
*/
struct alpha_machine_vector jensen_mv __initmv = {
vector_name: "Jensen",
.vector_name = "Jensen",
DO_EV4_MMU,
IO_LITE(JENSEN,jensen),
BUS(jensen),
machine_check: jensen_machine_check,
max_dma_address: ALPHA_MAX_DMA_ADDRESS,
rtc_port: 0x170,
nr_irqs: 16,
device_interrupt: jensen_device_interrupt,
init_arch: jensen_init_arch,
init_irq: jensen_init_irq,
init_rtc: common_init_rtc,
init_pci: NULL,
kill_arch: NULL,
.machine_check = jensen_machine_check,
.max_dma_address = ALPHA_MAX_DMA_ADDRESS,
.rtc_port = 0x170,
.nr_irqs = 16,
.device_interrupt = jensen_device_interrupt,
.init_arch = jensen_init_arch,
.init_irq = jensen_init_irq,
.init_rtc = common_init_rtc,
.init_pci = NULL,
.kill_arch = NULL,
};
ALIAS_MV(jensen)
arch/alpha/kernel/sys_miata.c
View file @ 8c30d2cf
......@@ -261,26 +261,26 @@ miata_kill_arch(int mode)
*/
struct alpha_machine_vector miata_mv __initmv = {
vector_name: "Miata",
.vector_name = "Miata",
DO_EV5_MMU,
DO_DEFAULT_RTC,
DO_PYXIS_IO,
DO_CIA_BUS,
machine_check: cia_machine_check,
max_dma_address: ALPHA_MAX_DMA_ADDRESS,
min_io_address: DEFAULT_IO_BASE,
min_mem_address: DEFAULT_MEM_BASE,
pci_dac_offset: PYXIS_DAC_OFFSET,
nr_irqs: 48,
device_interrupt: pyxis_device_interrupt,
init_arch: pyxis_init_arch,
init_irq: miata_init_irq,
init_rtc: common_init_rtc,
init_pci: miata_init_pci,
kill_arch: miata_kill_arch,
pci_map_irq: miata_map_irq,
pci_swizzle: miata_swizzle,
.machine_check = cia_machine_check,
.max_dma_address = ALPHA_MAX_DMA_ADDRESS,
.min_io_address = DEFAULT_IO_BASE,
.min_mem_address = DEFAULT_MEM_BASE,
.pci_dac_offset = PYXIS_DAC_OFFSET,
.nr_irqs = 48,
.device_interrupt = pyxis_device_interrupt,
.init_arch = pyxis_init_arch,
.init_irq = miata_init_irq,
.init_rtc = common_init_rtc,
.init_pci = miata_init_pci,
.kill_arch = miata_kill_arch,
.pci_map_irq = miata_map_irq,
.pci_swizzle = miata_swizzle,
};
ALIAS_MV(miata)
arch/alpha/kernel/sys_mikasa.c
View file @ 8c30d2cf
......@@ -70,13 +70,13 @@ mikasa_end_irq(unsigned int irq)
}
static struct hw_interrupt_type mikasa_irq_type = {
typename: "MIKASA",
startup: mikasa_startup_irq,
shutdown: mikasa_disable_irq,
enable: mikasa_enable_irq,
disable: mikasa_disable_irq,
ack: mikasa_disable_irq,
end: mikasa_end_irq,
.typename = "MIKASA",
.startup = mikasa_startup_irq,
.shutdown = mikasa_disable_irq,
.enable = mikasa_enable_irq,
.disable = mikasa_disable_irq,
.ack = mikasa_disable_irq,
.end = mikasa_end_irq,
};
static void
......@@ -217,51 +217,51 @@ mikasa_apecs_machine_check(unsigned long vector, unsigned long la_ptr,
#if defined(CONFIG_ALPHA_GENERIC) || !defined(CONFIG_ALPHA_PRIMO)
struct alpha_machine_vector mikasa_mv __initmv = {
vector_name: "Mikasa",
.vector_name = "Mikasa",
DO_EV4_MMU,
DO_DEFAULT_RTC,
DO_APECS_IO,
DO_APECS_BUS,
machine_check: mikasa_apecs_machine_check,
max_dma_address: ALPHA_MAX_DMA_ADDRESS,
min_io_address: DEFAULT_IO_BASE,
min_mem_address: APECS_AND_LCA_DEFAULT_MEM_BASE,
nr_irqs: 32,
device_interrupt: mikasa_device_interrupt,
init_arch: apecs_init_arch,
init_irq: mikasa_init_irq,
init_rtc: common_init_rtc,
init_pci: common_init_pci,
kill_arch: NULL,
pci_map_irq: mikasa_map_irq,
pci_swizzle: common_swizzle,
.machine_check = mikasa_apecs_machine_check,
.max_dma_address = ALPHA_MAX_DMA_ADDRESS,
.min_io_address = DEFAULT_IO_BASE,
.min_mem_address = APECS_AND_LCA_DEFAULT_MEM_BASE,
.nr_irqs = 32,
.device_interrupt = mikasa_device_interrupt,
.init_arch = apecs_init_arch,
.init_irq = mikasa_init_irq,
.init_rtc = common_init_rtc,
.init_pci = common_init_pci,
.kill_arch = NULL,
.pci_map_irq = mikasa_map_irq,
.pci_swizzle = common_swizzle,
};
ALIAS_MV(mikasa)
#endif
#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_PRIMO)
struct alpha_machine_vector mikasa_primo_mv __initmv = {
vector_name: "Mikasa-Primo",
.vector_name = "Mikasa-Primo",
DO_EV5_MMU,
DO_DEFAULT_RTC,
DO_CIA_IO,
DO_CIA_BUS,
machine_check: cia_machine_check,
max_dma_address: ALPHA_MAX_DMA_ADDRESS,
min_io_address: DEFAULT_IO_BASE,
min_mem_address: CIA_DEFAULT_MEM_BASE,
nr_irqs: 32,
device_interrupt: mikasa_device_interrupt,
init_arch: cia_init_arch,
init_irq: mikasa_init_irq,
init_rtc: common_init_rtc,
init_pci: cia_init_pci,
pci_map_irq: mikasa_map_irq,
pci_swizzle: common_swizzle,
.machine_check = cia_machine_check,
.max_dma_address = ALPHA_MAX_DMA_ADDRESS,
.min_io_address = DEFAULT_IO_BASE,
.min_mem_address = CIA_DEFAULT_MEM_BASE,
.nr_irqs = 32,
.device_interrupt = mikasa_device_interrupt,
.init_arch = cia_init_arch,
.init_irq = mikasa_init_irq,
.init_rtc = common_init_rtc,
.init_pci = cia_init_pci,
.pci_map_irq = mikasa_map_irq,
.pci_swizzle = common_swizzle,
};
ALIAS_MV(mikasa_primo)
#endif
arch/alpha/kernel/sys_nautilus.c
View file @ 8c30d2cf
......@@ -510,25 +510,25 @@ nautilus_machine_check(unsigned long vector, unsigned long la_ptr,
*/
struct alpha_machine_vector nautilus_mv __initmv = {
vector_name: "Nautilus",
.vector_name = "Nautilus",
DO_EV6_MMU,
DO_DEFAULT_RTC,
DO_IRONGATE_IO,
DO_IRONGATE_BUS,
machine_check: nautilus_machine_check,
max_dma_address: ALPHA_NAUTILUS_MAX_DMA_ADDRESS,
min_io_address: DEFAULT_IO_BASE,
min_mem_address: IRONGATE_DEFAULT_MEM_BASE,
nr_irqs: 16,
device_interrupt: isa_device_interrupt,
init_arch: irongate_init_arch,
init_irq: nautilus_init_irq,
init_rtc: common_init_rtc,
init_pci: common_init_pci,
kill_arch: nautilus_kill_arch,
pci_map_irq: nautilus_map_irq,
pci_swizzle: common_swizzle,
.machine_check = nautilus_machine_check,
.max_dma_address = ALPHA_NAUTILUS_MAX_DMA_ADDRESS,
.min_io_address = DEFAULT_IO_BASE,
.min_mem_address = IRONGATE_DEFAULT_MEM_BASE,
.nr_irqs = 16,
.device_interrupt = isa_device_interrupt,
.init_arch = irongate_init_arch,
.init_irq = nautilus_init_irq,
.init_rtc = common_init_rtc,
.init_pci = common_init_pci,
.kill_arch = nautilus_kill_arch,
.pci_map_irq = nautilus_map_irq,
.pci_swizzle = common_swizzle,
};
ALIAS_MV(nautilus)
arch/alpha/kernel/sys_noritake.c
View file @ 8c30d2cf
......@@ -68,13 +68,13 @@ noritake_startup_irq(unsigned int irq)
}
static struct hw_interrupt_type noritake_irq_type = {
typename: "NORITAKE",
startup: noritake_startup_irq,
shutdown: noritake_disable_irq,
enable: noritake_enable_irq,
disable: noritake_disable_irq,
ack: noritake_disable_irq,
end: noritake_enable_irq,
.typename = "NORITAKE",
.startup = noritake_startup_irq,
.shutdown = noritake_disable_irq,
.enable = noritake_enable_irq,
.disable = noritake_disable_irq,
.ack = noritake_disable_irq,
.end = noritake_enable_irq,
};
static void
......@@ -299,51 +299,51 @@ noritake_apecs_machine_check(unsigned long vector, unsigned long la_ptr,
#if defined(CONFIG_ALPHA_GENERIC) || !defined(CONFIG_ALPHA_PRIMO)
struct alpha_machine_vector noritake_mv __initmv = {
vector_name: "Noritake",
.vector_name = "Noritake",
DO_EV4_MMU,
DO_DEFAULT_RTC,
DO_APECS_IO,
DO_APECS_BUS,
machine_check: noritake_apecs_machine_check,
max_dma_address: ALPHA_MAX_DMA_ADDRESS,
min_io_address: EISA_DEFAULT_IO_BASE,
min_mem_address: APECS_AND_LCA_DEFAULT_MEM_BASE,
nr_irqs: 48,
device_interrupt: noritake_device_interrupt,
init_arch: apecs_init_arch,
init_irq: noritake_init_irq,
init_rtc: common_init_rtc,
init_pci: common_init_pci,
kill_arch: NULL,
pci_map_irq: noritake_map_irq,
pci_swizzle: noritake_swizzle,
.machine_check = noritake_apecs_machine_check,
.max_dma_address = ALPHA_MAX_DMA_ADDRESS,
.min_io_address = EISA_DEFAULT_IO_BASE,
.min_mem_address = APECS_AND_LCA_DEFAULT_MEM_BASE,
.nr_irqs = 48,
.device_interrupt = noritake_device_interrupt,
.init_arch = apecs_init_arch,
.init_irq = noritake_init_irq,
.init_rtc = common_init_rtc,
.init_pci = common_init_pci,
.kill_arch = NULL,
.pci_map_irq = noritake_map_irq,
.pci_swizzle = noritake_swizzle,
};
ALIAS_MV(noritake)
#endif
#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_PRIMO)
struct alpha_machine_vector noritake_primo_mv __initmv = {
vector_name: "Noritake-Primo",
.vector_name = "Noritake-Primo",
DO_EV5_MMU,
DO_DEFAULT_RTC,
DO_CIA_IO,
DO_CIA_BUS,
machine_check: cia_machine_check,
max_dma_address: ALPHA_MAX_DMA_ADDRESS,
min_io_address: EISA_DEFAULT_IO_BASE,
min_mem_address: CIA_DEFAULT_MEM_BASE,
nr_irqs: 48,
device_interrupt: noritake_device_interrupt,
init_arch: cia_init_arch,
init_irq: noritake_init_irq,
init_rtc: common_init_rtc,
init_pci: cia_init_pci,
pci_map_irq: noritake_map_irq,
pci_swizzle: noritake_swizzle,
.machine_check = cia_machine_check,
.max_dma_address = ALPHA_MAX_DMA_ADDRESS,
.min_io_address = EISA_DEFAULT_IO_BASE,
.min_mem_address = CIA_DEFAULT_MEM_BASE,
.nr_irqs = 48,
.device_interrupt = noritake_device_interrupt,
.init_arch = cia_init_arch,
.init_irq = noritake_init_irq,
.init_rtc = common_init_rtc,
.init_pci = cia_init_pci,
.pci_map_irq = noritake_map_irq,
.pci_swizzle = noritake_swizzle,
};
ALIAS_MV(noritake_primo)
#endif
arch/alpha/kernel/sys_rawhide.c
View file @ 8c30d2cf
......@@ -124,13 +124,13 @@ rawhide_end_irq(unsigned int irq)
}
static struct hw_interrupt_type rawhide_irq_type = {
typename: "RAWHIDE",
startup: rawhide_startup_irq,
shutdown: rawhide_disable_irq,
enable: rawhide_enable_irq,
disable: rawhide_disable_irq,
ack: rawhide_mask_and_ack_irq,
end: rawhide_end_irq,
.typename = "RAWHIDE",
.startup = rawhide_startup_irq,
.shutdown = rawhide_disable_irq,
.enable = rawhide_enable_irq,
.disable = rawhide_disable_irq,
.ack = rawhide_mask_and_ack_irq,
.end = rawhide_end_irq,
};
static void
......@@ -246,26 +246,26 @@ rawhide_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
*/
struct alpha_machine_vector rawhide_mv __initmv = {
vector_name: "Rawhide",
.vector_name = "Rawhide",
DO_EV5_MMU,
DO_DEFAULT_RTC,
DO_MCPCIA_IO,
DO_MCPCIA_BUS,
machine_check: mcpcia_machine_check,
max_dma_address: ALPHA_MAX_DMA_ADDRESS,
min_io_address: DEFAULT_IO_BASE,
min_mem_address: MCPCIA_DEFAULT_MEM_BASE,
pci_dac_offset: MCPCIA_DAC_OFFSET,
nr_irqs: 128,
device_interrupt: rawhide_srm_device_interrupt,
init_arch: mcpcia_init_arch,
init_irq: rawhide_init_irq,
init_rtc: common_init_rtc,
init_pci: common_init_pci,
kill_arch: NULL,
pci_map_irq: rawhide_map_irq,
pci_swizzle: common_swizzle,
.machine_check = mcpcia_machine_check,
.max_dma_address = ALPHA_MAX_DMA_ADDRESS,
.min_io_address = DEFAULT_IO_BASE,
.min_mem_address = MCPCIA_DEFAULT_MEM_BASE,
.pci_dac_offset = MCPCIA_DAC_OFFSET,
.nr_irqs = 128,
.device_interrupt = rawhide_srm_device_interrupt,
.init_arch = mcpcia_init_arch,
.init_irq = rawhide_init_irq,
.init_rtc = common_init_rtc,
.init_pci = common_init_pci,
.kill_arch = NULL,
.pci_map_irq = rawhide_map_irq,
.pci_swizzle = common_swizzle,
};
ALIAS_MV(rawhide)
arch/alpha/kernel/sys_ruffian.c
View file @ 8c30d2cf
......@@ -212,26 +212,26 @@ ruffian_get_bank_size(unsigned long offset)
*/
struct alpha_machine_vector ruffian_mv __initmv = {
vector_name: "Ruffian",
.vector_name = "Ruffian",
DO_EV5_MMU,
DO_DEFAULT_RTC,
DO_PYXIS_IO,
DO_CIA_BUS,
machine_check: cia_machine_check,
max_dma_address: ALPHA_RUFFIAN_MAX_DMA_ADDRESS,
min_io_address: DEFAULT_IO_BASE,
min_mem_address: DEFAULT_MEM_BASE,
pci_dac_offset: PYXIS_DAC_OFFSET,
nr_irqs: 48,
device_interrupt: pyxis_device_interrupt,
init_arch: pyxis_init_arch,
init_irq: ruffian_init_irq,
init_rtc: ruffian_init_rtc,
init_pci: cia_init_pci,
kill_arch: ruffian_kill_arch,
pci_map_irq: ruffian_map_irq,
pci_swizzle: ruffian_swizzle,
.machine_check = cia_machine_check,
.max_dma_address = ALPHA_RUFFIAN_MAX_DMA_ADDRESS,
.min_io_address = DEFAULT_IO_BASE,
.min_mem_address = DEFAULT_MEM_BASE,
.pci_dac_offset = PYXIS_DAC_OFFSET,
.nr_irqs = 48,
.device_interrupt = pyxis_device_interrupt,
.init_arch = pyxis_init_arch,
.init_irq = ruffian_init_irq,
.init_rtc = ruffian_init_rtc,
.init_pci = cia_init_pci,
.kill_arch = ruffian_kill_arch,
.pci_map_irq = ruffian_map_irq,
.pci_swizzle = ruffian_swizzle,
};
ALIAS_MV(ruffian)
arch/alpha/kernel/sys_rx164.c
View file @ 8c30d2cf
......@@ -73,13 +73,13 @@ rx164_end_irq(unsigned int irq)
}
static struct hw_interrupt_type rx164_irq_type = {
typename: "RX164",
startup: rx164_startup_irq,
shutdown: rx164_disable_irq,
enable: rx164_enable_irq,
disable: rx164_disable_irq,
ack: rx164_disable_irq,
end: rx164_end_irq,
.typename = "RX164",
.startup = rx164_startup_irq,
.shutdown = rx164_disable_irq,
.enable = rx164_enable_irq,
.disable = rx164_disable_irq,
.ack = rx164_disable_irq,
.end = rx164_end_irq,
};
static void
......@@ -197,25 +197,25 @@ rx164_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
*/
struct alpha_machine_vector rx164_mv __initmv = {
vector_name: "RX164",
.vector_name = "RX164",
DO_EV5_MMU,
DO_DEFAULT_RTC,
DO_POLARIS_IO,
DO_POLARIS_BUS,
machine_check: polaris_machine_check,
max_dma_address: ALPHA_MAX_DMA_ADDRESS,
min_io_address: DEFAULT_IO_BASE,
min_mem_address: DEFAULT_MEM_BASE,
nr_irqs: 40,
device_interrupt: rx164_device_interrupt,
init_arch: polaris_init_arch,
init_irq: rx164_init_irq,
init_rtc: common_init_rtc,
init_pci: common_init_pci,
kill_arch: NULL,
pci_map_irq: rx164_map_irq,
pci_swizzle: common_swizzle,
.machine_check = polaris_machine_check,
.max_dma_address = ALPHA_MAX_DMA_ADDRESS,
.min_io_address = DEFAULT_IO_BASE,
.min_mem_address = DEFAULT_MEM_BASE,
.nr_irqs = 40,
.device_interrupt = rx164_device_interrupt,
.init_arch = polaris_init_arch,
.init_irq = rx164_init_irq,
.init_rtc = common_init_rtc,
.init_pci = common_init_pci,
.kill_arch = NULL,
.pci_map_irq = rx164_map_irq,
.pci_swizzle = common_swizzle,
};
ALIAS_MV(rx164)
arch/alpha/kernel/sys_sable.c
View file @ 8c30d2cf
......@@ -185,13 +185,13 @@ sable_mask_and_ack_irq(unsigned int irq)
}
static struct hw_interrupt_type sable_irq_type = {
typename: "SABLE",
startup: sable_startup_irq,
shutdown: sable_disable_irq,
enable: sable_enable_irq,
disable: sable_disable_irq,
ack: sable_mask_and_ack_irq,
end: sable_end_irq,
.typename = "SABLE",
.startup = sable_startup_irq,
.shutdown = sable_disable_irq,
.enable = sable_enable_irq,
.disable = sable_disable_irq,
.ack = sable_mask_and_ack_irq,
.end = sable_end_irq,
};
static void
......@@ -284,29 +284,29 @@ sable_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
#undef GAMMA_BIAS
#define GAMMA_BIAS 0
struct alpha_machine_vector sable_mv __initmv = {
vector_name: "Sable",
.vector_name = "Sable",
DO_EV4_MMU,
DO_DEFAULT_RTC,
DO_T2_IO,
DO_T2_BUS,
machine_check: t2_machine_check,
max_dma_address: ALPHA_SABLE_MAX_DMA_ADDRESS,
min_io_address: EISA_DEFAULT_IO_BASE,
min_mem_address: T2_DEFAULT_MEM_BASE,
nr_irqs: 40,
device_interrupt: sable_srm_device_interrupt,
init_arch: t2_init_arch,
init_irq: sable_init_irq,
init_rtc: common_init_rtc,
init_pci: common_init_pci,
kill_arch: NULL,
pci_map_irq: sable_map_irq,
pci_swizzle: common_swizzle,
sys: { t2: {
gamma_bias: 0
.machine_check = t2_machine_check,
.max_dma_address = ALPHA_SABLE_MAX_DMA_ADDRESS,
.min_io_address = EISA_DEFAULT_IO_BASE,
.min_mem_address = T2_DEFAULT_MEM_BASE,
.nr_irqs = 40,
.device_interrupt = sable_srm_device_interrupt,
.init_arch = t2_init_arch,
.init_irq = sable_init_irq,
.init_rtc = common_init_rtc,
.init_pci = common_init_pci,
.kill_arch = NULL,
.pci_map_irq = sable_map_irq,
.pci_swizzle = common_swizzle,
.sys = { .t2 = {
.gamma_bias = 0
} }
};
ALIAS_MV(sable)
......@@ -316,28 +316,28 @@ ALIAS_MV(sable)
#undef GAMMA_BIAS
#define GAMMA_BIAS _GAMMA_BIAS
struct alpha_machine_vector sable_gamma_mv __initmv = {
vector_name: "Sable-Gamma",
.vector_name = "Sable-Gamma",
DO_EV5_MMU,
DO_DEFAULT_RTC,
DO_T2_IO,
DO_T2_BUS,
machine_check: t2_machine_check,
max_dma_address: ALPHA_SABLE_MAX_DMA_ADDRESS,
min_io_address: EISA_DEFAULT_IO_BASE,
min_mem_address: T2_DEFAULT_MEM_BASE,
nr_irqs: 40,
device_interrupt: sable_srm_device_interrupt,
init_arch: t2_init_arch,
init_irq: sable_init_irq,
init_rtc: common_init_rtc,
init_pci: common_init_pci,
pci_map_irq: sable_map_irq,
pci_swizzle: common_swizzle,
sys: { t2: {
gamma_bias: _GAMMA_BIAS
.machine_check = t2_machine_check,
.max_dma_address = ALPHA_SABLE_MAX_DMA_ADDRESS,
.min_io_address = EISA_DEFAULT_IO_BASE,
.min_mem_address = T2_DEFAULT_MEM_BASE,
.nr_irqs = 40,
.device_interrupt = sable_srm_device_interrupt,
.init_arch = t2_init_arch,
.init_irq = sable_init_irq,
.init_rtc = common_init_rtc,
.init_pci = common_init_pci,
.pci_map_irq = sable_map_irq,
.pci_swizzle = common_swizzle,
.sys = { .t2 = {
.gamma_bias = _GAMMA_BIAS
} }
};
ALIAS_MV(sable_gamma)
......
arch/alpha/kernel/sys_sio.c
View file @ 8c30d2cf
......@@ -252,30 +252,30 @@ alphabook1_init_pci(void)
#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_BOOK1)
struct alpha_machine_vector alphabook1_mv __initmv = {
vector_name: "AlphaBook1",
.vector_name = "AlphaBook1",
DO_EV4_MMU,
DO_DEFAULT_RTC,
DO_LCA_IO,
DO_LCA_BUS,
machine_check: lca_machine_check,
max_dma_address: ALPHA_MAX_DMA_ADDRESS,
min_io_address: DEFAULT_IO_BASE,
min_mem_address: APECS_AND_LCA_DEFAULT_MEM_BASE,
nr_irqs: 16,
device_interrupt: isa_device_interrupt,
init_arch: alphabook1_init_arch,
init_irq: sio_init_irq,
init_rtc: common_init_rtc,
init_pci: alphabook1_init_pci,
kill_arch: NULL,
pci_map_irq: noname_map_irq,
pci_swizzle: common_swizzle,
sys: { sio: {
.machine_check = lca_machine_check,
.max_dma_address = ALPHA_MAX_DMA_ADDRESS,
.min_io_address = DEFAULT_IO_BASE,
.min_mem_address = APECS_AND_LCA_DEFAULT_MEM_BASE,
.nr_irqs = 16,
.device_interrupt = isa_device_interrupt,
.init_arch = alphabook1_init_arch,
.init_irq = sio_init_irq,
.init_rtc = common_init_rtc,
.init_pci = alphabook1_init_pci,
.kill_arch = NULL,
.pci_map_irq = noname_map_irq,
.pci_swizzle = common_swizzle,
.sys = { .sio = {
/* NCR810 SCSI is 14, PCMCIA controller is 15. */
route_tab: 0x0e0f0a0a,
.route_tab = 0x0e0f0a0a,
}}
};
ALIAS_MV(alphabook1)
......@@ -283,28 +283,28 @@ ALIAS_MV(alphabook1)
#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_AVANTI)
struct alpha_machine_vector avanti_mv __initmv = {
vector_name: "Avanti",
.vector_name = "Avanti",
DO_EV4_MMU,
DO_DEFAULT_RTC,
DO_APECS_IO,
DO_APECS_BUS,
machine_check: apecs_machine_check,
max_dma_address: ALPHA_MAX_DMA_ADDRESS,
min_io_address: DEFAULT_IO_BASE,
min_mem_address: APECS_AND_LCA_DEFAULT_MEM_BASE,
nr_irqs: 16,
device_interrupt: isa_device_interrupt,
init_arch: apecs_init_arch,
init_irq: sio_init_irq,
init_rtc: common_init_rtc,
init_pci: noname_init_pci,
pci_map_irq: noname_map_irq,
pci_swizzle: common_swizzle,
sys: { sio: {
route_tab: 0x0b0a0e0f,
.machine_check = apecs_machine_check,
.max_dma_address = ALPHA_MAX_DMA_ADDRESS,
.min_io_address = DEFAULT_IO_BASE,
.min_mem_address = APECS_AND_LCA_DEFAULT_MEM_BASE,
.nr_irqs = 16,
.device_interrupt = isa_device_interrupt,
.init_arch = apecs_init_arch,
.init_irq = sio_init_irq,
.init_rtc = common_init_rtc,
.init_pci = noname_init_pci,
.pci_map_irq = noname_map_irq,
.pci_swizzle = common_swizzle,
.sys = { .sio = {
.route_tab = 0x0b0a0e0f,
}}
};
ALIAS_MV(avanti)
......@@ -312,27 +312,27 @@ ALIAS_MV(avanti)
#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_NONAME)
struct alpha_machine_vector noname_mv __initmv = {
vector_name: "Noname",
.vector_name = "Noname",
DO_EV4_MMU,
DO_DEFAULT_RTC,
DO_LCA_IO,
DO_LCA_BUS,
machine_check: lca_machine_check,
max_dma_address: ALPHA_MAX_DMA_ADDRESS,
min_io_address: DEFAULT_IO_BASE,
min_mem_address: APECS_AND_LCA_DEFAULT_MEM_BASE,
nr_irqs: 16,
device_interrupt: srm_device_interrupt,
init_arch: lca_init_arch,
init_irq: sio_init_irq,
init_rtc: common_init_rtc,
init_pci: noname_init_pci,
pci_map_irq: noname_map_irq,
pci_swizzle: common_swizzle,
sys: { sio: {
.machine_check = lca_machine_check,
.max_dma_address = ALPHA_MAX_DMA_ADDRESS,
.min_io_address = DEFAULT_IO_BASE,
.min_mem_address = APECS_AND_LCA_DEFAULT_MEM_BASE,
.nr_irqs = 16,
.device_interrupt = srm_device_interrupt,
.init_arch = lca_init_arch,
.init_irq = sio_init_irq,
.init_rtc = common_init_rtc,
.init_pci = noname_init_pci,
.pci_map_irq = noname_map_irq,
.pci_swizzle = common_swizzle,
.sys = { .sio = {
/* For UDB, the only available PCI slot must not map to IRQ 9,
since that's the builtin MSS sound chip. That PCI slot
will map to PIRQ1 (for INTA at least), so we give it IRQ 15
......@@ -342,7 +342,7 @@ struct alpha_machine_vector noname_mv __initmv = {
they are co-indicated when the platform type "Noname" is
selected... :-( */
route_tab: 0x0b0a0f0d,
.route_tab = 0x0b0a0f0d,
}}
};
ALIAS_MV(noname)
......@@ -350,28 +350,28 @@ ALIAS_MV(noname)
#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_P2K)
struct alpha_machine_vector p2k_mv __initmv = {
vector_name: "Platform2000",
.vector_name = "Platform2000",
DO_EV4_MMU,
DO_DEFAULT_RTC,
DO_LCA_IO,
DO_LCA_BUS,
machine_check: lca_machine_check,
max_dma_address: ALPHA_MAX_DMA_ADDRESS,
min_io_address: DEFAULT_IO_BASE,
min_mem_address: APECS_AND_LCA_DEFAULT_MEM_BASE,
nr_irqs: 16,
device_interrupt: srm_device_interrupt,
init_arch: lca_init_arch,
init_irq: sio_init_irq,
init_rtc: common_init_rtc,
init_pci: noname_init_pci,
pci_map_irq: p2k_map_irq,
pci_swizzle: common_swizzle,
sys: { sio: {
route_tab: 0x0b0a090f,
.machine_check = lca_machine_check,
.max_dma_address = ALPHA_MAX_DMA_ADDRESS,
.min_io_address = DEFAULT_IO_BASE,
.min_mem_address = APECS_AND_LCA_DEFAULT_MEM_BASE,
.nr_irqs = 16,
.device_interrupt = srm_device_interrupt,
.init_arch = lca_init_arch,
.init_irq = sio_init_irq,
.init_rtc = common_init_rtc,
.init_pci = noname_init_pci,
.pci_map_irq = p2k_map_irq,
.pci_swizzle = common_swizzle,
.sys = { .sio = {
.route_tab = 0x0b0a090f,
}}
};
ALIAS_MV(p2k)
......@@ -379,28 +379,28 @@ ALIAS_MV(p2k)
#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_XL)
struct alpha_machine_vector xl_mv __initmv = {
vector_name: "XL",
.vector_name = "XL",
DO_EV4_MMU,
DO_DEFAULT_RTC,
DO_APECS_IO,
BUS(apecs),
machine_check: apecs_machine_check,
max_dma_address: ALPHA_XL_MAX_DMA_ADDRESS,
min_io_address: DEFAULT_IO_BASE,
min_mem_address: XL_DEFAULT_MEM_BASE,
nr_irqs: 16,
device_interrupt: isa_device_interrupt,
init_arch: apecs_init_arch,
init_irq: sio_init_irq,
init_rtc: common_init_rtc,
init_pci: noname_init_pci,
pci_map_irq: noname_map_irq,
pci_swizzle: common_swizzle,
sys: { sio: {
route_tab: 0x0b0a090f,
.machine_check = apecs_machine_check,
.max_dma_address = ALPHA_XL_MAX_DMA_ADDRESS,
.min_io_address = DEFAULT_IO_BASE,
.min_mem_address = XL_DEFAULT_MEM_BASE,
.nr_irqs = 16,
.device_interrupt = isa_device_interrupt,
.init_arch = apecs_init_arch,
.init_irq = sio_init_irq,
.init_rtc = common_init_rtc,
.init_pci = noname_init_pci,
.pci_map_irq = noname_map_irq,
.pci_swizzle = common_swizzle,
.sys = { .sio = {
.route_tab = 0x0b0a090f,
}}
};
ALIAS_MV(xl)
......
arch/alpha/kernel/sys_sx164.c
View file @ 8c30d2cf
......@@ -154,26 +154,26 @@ sx164_init_arch(void)
*/
struct alpha_machine_vector sx164_mv __initmv = {
vector_name: "SX164",
.vector_name = "SX164",
DO_EV5_MMU,
DO_DEFAULT_RTC,
DO_PYXIS_IO,
DO_CIA_BUS,
machine_check: cia_machine_check,
max_dma_address: ALPHA_MAX_DMA_ADDRESS,
min_io_address: DEFAULT_IO_BASE,
min_mem_address: DEFAULT_MEM_BASE,
pci_dac_offset: PYXIS_DAC_OFFSET,
nr_irqs: 48,
device_interrupt: pyxis_device_interrupt,
init_arch: sx164_init_arch,
init_irq: sx164_init_irq,
init_rtc: common_init_rtc,
init_pci: sx164_init_pci,
kill_arch: NULL,
pci_map_irq: sx164_map_irq,
pci_swizzle: common_swizzle,
.machine_check = cia_machine_check,
.max_dma_address = ALPHA_MAX_DMA_ADDRESS,
.min_io_address = DEFAULT_IO_BASE,
.min_mem_address = DEFAULT_MEM_BASE,
.pci_dac_offset = PYXIS_DAC_OFFSET,
.nr_irqs = 48,
.device_interrupt = pyxis_device_interrupt,
.init_arch = sx164_init_arch,
.init_irq = sx164_init_irq,
.init_rtc = common_init_rtc,
.init_pci = sx164_init_pci,
.kill_arch = NULL,
.pci_map_irq = sx164_map_irq,
.pci_swizzle = common_swizzle,
};
ALIAS_MV(sx164)
arch/alpha/kernel/sys_takara.c
View file @ 8c30d2cf
......@@ -75,13 +75,13 @@ takara_end_irq(unsigned int irq)
}
static struct hw_interrupt_type takara_irq_type = {
typename: "TAKARA",
startup: takara_startup_irq,
shutdown: takara_disable_irq,
enable: takara_enable_irq,
disable: takara_disable_irq,
ack: takara_disable_irq,
end: takara_end_irq,
.typename = "TAKARA",
.startup = takara_startup_irq,
.shutdown = takara_disable_irq,
.enable = takara_enable_irq,
.disable = takara_disable_irq,
.ack = takara_disable_irq,
.end = takara_end_irq,
};
static void
......@@ -269,25 +269,25 @@ takara_init_pci(void)
*/
struct alpha_machine_vector takara_mv __initmv = {
vector_name: "Takara",
.vector_name = "Takara",
DO_EV5_MMU,
DO_DEFAULT_RTC,
DO_CIA_IO,
DO_CIA_BUS,
machine_check: cia_machine_check,
max_dma_address: ALPHA_MAX_DMA_ADDRESS,
min_io_address: DEFAULT_IO_BASE,
min_mem_address: CIA_DEFAULT_MEM_BASE,
nr_irqs: 128,
device_interrupt: takara_device_interrupt,
init_arch: cia_init_arch,
init_irq: takara_init_irq,
init_rtc: common_init_rtc,
init_pci: takara_init_pci,
kill_arch: NULL,
pci_map_irq: takara_map_irq,
pci_swizzle: takara_swizzle,
.machine_check = cia_machine_check,
.max_dma_address = ALPHA_MAX_DMA_ADDRESS,
.min_io_address = DEFAULT_IO_BASE,
.min_mem_address = CIA_DEFAULT_MEM_BASE,
.nr_irqs = 128,
.device_interrupt = takara_device_interrupt,
.init_arch = cia_init_arch,
.init_irq = takara_init_irq,
.init_rtc = common_init_rtc,
.init_pci = takara_init_pci,
.kill_arch = NULL,
.pci_map_irq = takara_map_irq,
.pci_swizzle = takara_swizzle,
};
ALIAS_MV(takara)
arch/alpha/kernel/sys_titan.c
View file @ 8c30d2cf
......@@ -152,14 +152,14 @@ privateer_set_affinity(unsigned int irq, unsigned long affinity)
}
static struct hw_interrupt_type privateer_irq_type = {
typename: "PRIVATEER",
startup: privateer_startup_irq,
shutdown: privateer_disable_irq,
enable: privateer_enable_irq,
disable: privateer_disable_irq,
ack: privateer_disable_irq,
end: privateer_end_irq,
set_affinity: privateer_set_affinity,
.typename = "PRIVATEER",
.startup = privateer_startup_irq,
.shutdown = privateer_disable_irq,
.enable = privateer_enable_irq,
.disable = privateer_disable_irq,
.ack = privateer_disable_irq,
.end = privateer_end_irq,
.set_affinity = privateer_set_affinity,
};
static void
......@@ -367,26 +367,26 @@ privateer_machine_check(unsigned long vector, unsigned long la_ptr,
*/
struct alpha_machine_vector privateer_mv __initmv = {
vector_name: "PRIVATEER",
.vector_name = "PRIVATEER",
DO_EV6_MMU,
DO_DEFAULT_RTC,
DO_TITAN_IO,
DO_TITAN_BUS,
machine_check: privateer_machine_check,
max_dma_address: ALPHA_MAX_DMA_ADDRESS,
min_io_address: DEFAULT_IO_BASE,
min_mem_address: DEFAULT_MEM_BASE,
pci_dac_offset: TITAN_DAC_OFFSET,
nr_irqs: 80, /* 64 + 16 */
device_interrupt: privateer_device_interrupt,
init_arch: titan_init_arch,
init_irq: privateer_init_irq,
init_rtc: common_init_rtc,
init_pci: privateer_init_pci,
kill_arch: titan_kill_arch,
pci_map_irq: privateer_map_irq,
pci_swizzle: common_swizzle,
.machine_check = privateer_machine_check,
.max_dma_address = ALPHA_MAX_DMA_ADDRESS,
.min_io_address = DEFAULT_IO_BASE,
.min_mem_address = DEFAULT_MEM_BASE,
.pci_dac_offset = TITAN_DAC_OFFSET,
.nr_irqs = 80, /* 64 + 16 */
.device_interrupt = privateer_device_interrupt,
.init_arch = titan_init_arch,
.init_irq = privateer_init_irq,
.init_rtc = common_init_rtc,
.init_pci = privateer_init_pci,
.kill_arch = titan_kill_arch,
.pci_map_irq = privateer_map_irq,
.pci_swizzle = common_swizzle,
};
ALIAS_MV(privateer)
arch/alpha/kernel/sys_wildfire.c
View file @ 8c30d2cf
......@@ -158,13 +158,13 @@ wildfire_end_irq(unsigned int irq)
}
static struct hw_interrupt_type wildfire_irq_type = {
typename: "WILDFIRE",
startup: wildfire_startup_irq,
shutdown: wildfire_disable_irq,
enable: wildfire_enable_irq,
disable: wildfire_disable_irq,
ack: wildfire_mask_and_ack_irq,
end: wildfire_end_irq,
.typename = "WILDFIRE",
.startup = wildfire_startup_irq,
.shutdown = wildfire_disable_irq,
.enable = wildfire_enable_irq,
.disable = wildfire_disable_irq,
.ack = wildfire_mask_and_ack_irq,
.end = wildfire_end_irq,
};
static void __init
......@@ -173,8 +173,8 @@ wildfire_init_irq_per_pca(int qbbno, int pcano)
int i, irq_bias;
unsigned long io_bias;
static struct irqaction isa_enable = {
handler: no_action,
name: "isa_enable",
.handler = no_action,
.name = "isa_enable",
};
irq_bias = qbbno * (WILDFIRE_PCA_PER_QBB * WILDFIRE_IRQ_PER_PCA)
......@@ -333,25 +333,25 @@ wildfire_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
*/
struct alpha_machine_vector wildfire_mv __initmv = {
vector_name: "WILDFIRE",
.vector_name = "WILDFIRE",
DO_EV6_MMU,
DO_DEFAULT_RTC,
DO_WILDFIRE_IO,
DO_WILDFIRE_BUS,
machine_check: wildfire_machine_check,
max_dma_address: ALPHA_MAX_DMA_ADDRESS,
min_io_address: DEFAULT_IO_BASE,
min_mem_address: DEFAULT_MEM_BASE,
nr_irqs: WILDFIRE_NR_IRQS,
device_interrupt: wildfire_device_interrupt,
init_arch: wildfire_init_arch,
init_irq: wildfire_init_irq,
init_rtc: common_init_rtc,
init_pci: common_init_pci,
kill_arch: wildfire_kill_arch,
pci_map_irq: wildfire_map_irq,
pci_swizzle: common_swizzle,
.machine_check = wildfire_machine_check,
.max_dma_address = ALPHA_MAX_DMA_ADDRESS,
.min_io_address = DEFAULT_IO_BASE,
.min_mem_address = DEFAULT_MEM_BASE,
.nr_irqs = WILDFIRE_NR_IRQS,
.device_interrupt = wildfire_device_interrupt,
.init_arch = wildfire_init_arch,
.init_irq = wildfire_init_irq,
.init_rtc = common_init_rtc,
.init_pci = common_init_pci,
.kill_arch = wildfire_kill_arch,
.pci_map_irq = wildfire_map_irq,
.pci_swizzle = common_swizzle,
};
ALIAS_MV(wildfire)
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