Commit 8c562a1e authored by Fugang Duan's avatar Fugang Duan Committed by Shawn Guo

ARM: dts: imx6sl: correct the fec ipg clock source

imx6sl fec MDIO clock source is from ipg 66Mhz, but the currect imx6sl
device tree define it as "enet_ref" clock (50Mhz), so the patch just
corrects imx6sl dtsi fec "ipg" clock.
Signed-off-by: default avatarFugang Duan <B38611@freescale.com>
Signed-off-by: default avatarShawn Guo <shawn.guo@freescale.com>
parent 4ca2ad55
...@@ -686,7 +686,7 @@ fec: ethernet@02188000 { ...@@ -686,7 +686,7 @@ fec: ethernet@02188000 {
compatible = "fsl,imx6sl-fec", "fsl,imx25-fec"; compatible = "fsl,imx6sl-fec", "fsl,imx25-fec";
reg = <0x02188000 0x4000>; reg = <0x02188000 0x4000>;
interrupts = <0 114 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0 114 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SL_CLK_ENET_REF>, clocks = <&clks IMX6SL_CLK_ENET>,
<&clks IMX6SL_CLK_ENET_REF>; <&clks IMX6SL_CLK_ENET_REF>;
clock-names = "ipg", "ahb"; clock-names = "ipg", "ahb";
status = "disabled"; status = "disabled";
......
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