Commit 8c7d1474 authored by Lorenzo Pieralisi's avatar Lorenzo Pieralisi Committed by Bjorn Helgaas

ARM/PCI: Move to generic PCI domains

Most if not all ARM PCI host controller device drivers either ignore the
domain field in the pci_sys_data structure or just increment it every time
a host controller is probed, using it as a domain counter.

Therefore, instead of relying on pci_sys_data to stash the domain number in
a standard location, ARM pcibios code can be moved to the newly introduced
generic PCI domains code, implemented in commits:

  41e5c0f8 ("of/pci: Add pci_get_new_domain_nr() and of_get_pci_domain_nr()")
  670ba0c8 ("PCI: Add generic domain handling")

ARM code is made to select PCI_DOMAINS_GENERIC by default, which builds
core PCI code that assigns the domain number through the generic function:

  void pci_bus_assign_domain_nr(...)

that relies on a DT property to define the domain number or falls back to a
counter according to a predefined logic; its usage replaces the current
domain assignment code in PCI host controllers present in the kernel.
Tested-by: default avatarLucas Stach <l.stach@pengutronix.de>
Signed-off-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Reviewed-by: default avatarYijing Wang <wangyijing@huawei.com>
Reviewed-By: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> # mvebu
Acked-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
Acked-by: default avatarLucas Stach <l.stach@pengutronix.de>
Acked-by: default avatarJingoo Han <jg1.han@samsung.com>
Acked-by: default avatarPhil Edworthy <phil.edworthy@renesas.com>
Acked-by: default avatarArnd Bergmann <arnd@arndb.de>
CC: Mohit Kumar <mohit.kumar@st.com>
parent c88d54ba
...@@ -1279,6 +1279,9 @@ config PCI_DOMAINS ...@@ -1279,6 +1279,9 @@ config PCI_DOMAINS
bool bool
depends on PCI depends on PCI
config PCI_DOMAINS_GENERIC
def_bool PCI_DOMAINS
config PCI_NANOENGINE config PCI_NANOENGINE
bool "BSE nanoEngine PCI support" bool "BSE nanoEngine PCI support"
depends on SA1100_NANOENGINE depends on SA1100_NANOENGINE
......
...@@ -19,9 +19,6 @@ struct pci_bus; ...@@ -19,9 +19,6 @@ struct pci_bus;
struct device; struct device;
struct hw_pci { struct hw_pci {
#ifdef CONFIG_PCI_DOMAINS
int domain;
#endif
#ifdef CONFIG_PCI_MSI #ifdef CONFIG_PCI_MSI
struct msi_controller *msi_ctrl; struct msi_controller *msi_ctrl;
#endif #endif
...@@ -45,9 +42,6 @@ struct hw_pci { ...@@ -45,9 +42,6 @@ struct hw_pci {
* Per-controller structure * Per-controller structure
*/ */
struct pci_sys_data { struct pci_sys_data {
#ifdef CONFIG_PCI_DOMAINS
int domain;
#endif
#ifdef CONFIG_PCI_MSI #ifdef CONFIG_PCI_MSI
struct msi_controller *msi_ctrl; struct msi_controller *msi_ctrl;
#endif #endif
......
...@@ -18,13 +18,6 @@ static inline int pcibios_assign_all_busses(void) ...@@ -18,13 +18,6 @@ static inline int pcibios_assign_all_busses(void)
} }
#ifdef CONFIG_PCI_DOMAINS #ifdef CONFIG_PCI_DOMAINS
static inline int pci_domain_nr(struct pci_bus *bus)
{
struct pci_sys_data *root = bus->sysdata;
return root->domain;
}
static inline int pci_proc_domain(struct pci_bus *bus) static inline int pci_proc_domain(struct pci_bus *bus)
{ {
return pci_domain_nr(bus); return pci_domain_nr(bus);
......
...@@ -463,9 +463,6 @@ static void pcibios_init_hw(struct device *parent, struct hw_pci *hw, ...@@ -463,9 +463,6 @@ static void pcibios_init_hw(struct device *parent, struct hw_pci *hw,
if (!sys) if (!sys)
panic("PCI: unable to allocate sys data!"); panic("PCI: unable to allocate sys data!");
#ifdef CONFIG_PCI_DOMAINS
sys->domain = hw->domain;
#endif
#ifdef CONFIG_PCI_MSI #ifdef CONFIG_PCI_MSI
sys->msi_ctrl = hw->msi_ctrl; sys->msi_ctrl = hw->msi_ctrl;
#endif #endif
......
...@@ -101,9 +101,7 @@ struct mvebu_pcie { ...@@ -101,9 +101,7 @@ struct mvebu_pcie {
struct mvebu_pcie_port *ports; struct mvebu_pcie_port *ports;
struct msi_controller *msi; struct msi_controller *msi;
struct resource io; struct resource io;
char io_name[30];
struct resource realio; struct resource realio;
char mem_name[30];
struct resource mem; struct resource mem;
struct resource busn; struct resource busn;
int nports; int nports;
...@@ -723,18 +721,9 @@ static int mvebu_pcie_setup(int nr, struct pci_sys_data *sys) ...@@ -723,18 +721,9 @@ static int mvebu_pcie_setup(int nr, struct pci_sys_data *sys)
{ {
struct mvebu_pcie *pcie = sys_to_pcie(sys); struct mvebu_pcie *pcie = sys_to_pcie(sys);
int i; int i;
int domain = 0;
#ifdef CONFIG_PCI_DOMAINS pcie->mem.name = "PCI MEM";
domain = sys->domain; pcie->realio.name = "PCI I/O";
#endif
snprintf(pcie->mem_name, sizeof(pcie->mem_name), "PCI MEM %04x",
domain);
pcie->mem.name = pcie->mem_name;
snprintf(pcie->io_name, sizeof(pcie->io_name), "PCI I/O %04x", domain);
pcie->realio.name = pcie->io_name;
if (request_resource(&iomem_resource, &pcie->mem)) if (request_resource(&iomem_resource, &pcie->mem))
return 0; return 0;
......
...@@ -508,9 +508,6 @@ int __init dw_pcie_host_init(struct pcie_port *pp) ...@@ -508,9 +508,6 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
dw_pci.private_data = (void **)&pp; dw_pci.private_data = (void **)&pp;
pci_common_init_dev(pp->dev, &dw_pci); pci_common_init_dev(pp->dev, &dw_pci);
#ifdef CONFIG_PCI_DOMAINS
dw_pci.domain++;
#endif
return 0; return 0;
} }
......
...@@ -397,9 +397,6 @@ static void rcar_pcie_enable(struct rcar_pcie *pcie) ...@@ -397,9 +397,6 @@ static void rcar_pcie_enable(struct rcar_pcie *pcie)
#endif #endif
pci_common_init_dev(&pdev->dev, &rcar_pci); pci_common_init_dev(&pdev->dev, &rcar_pci);
#ifdef CONFIG_PCI_DOMAINS
rcar_pci.domain++;
#endif
} }
static int phy_wait_for_ack(struct rcar_pcie *pcie) static int phy_wait_for_ack(struct rcar_pcie *pcie)
......
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