[PATCH] x86-bigsmp: use fixed interrupt delivery

This patch, from Venkatesh Pallipadi, changes x86 IO-APICs to use fixed
interrupt delivery instead of lowest priority to support larger number
of CPUs.  Only bigsmp is affected by this cleanup. 

From: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>

arch/i386/kernel/io_apic.c

@@ -853,7 +853,7 @@ int IO_APIC_get_PCI_irq_vector(int bus, int slot, int pin)
  * we need to reprogram the ioredtbls to cater for the cpus which have come online
  * so mask in all cases should simply be TARGET_CPUS
  */
-void __init setup_ioapic_dest(cpumask_t mask)
+void __init setup_ioapic_dest(void)
 {
 	int pin, ioapic, irq, irq_entry;
 
@@ -866,7 +866,7 @@ void __init setup_ioapic_dest(cpumask_t mask)
 			if (irq_entry == -1)
 				continue;
 			irq = pin_2_irq(irq_entry, ioapic, pin);
-			set_ioapic_affinity_irq(irq, mask);
+			set_ioapic_affinity_irq(irq, TARGET_CPUS);
 		}
 
 	}

arch/i386/kernel/smpboot.c

@@ -1369,8 +1369,7 @@ int __devinit __cpu_up(unsigned int cpu)
 void __init smp_cpus_done(unsigned int max_cpus)
 {
 #ifdef CONFIG_X86_IO_APIC
-	cpumask_t targets = CPU_MASK_ALL;
-	setup_ioapic_dest(targets);
+	setup_ioapic_dest();
 #endif
 	zap_low_mappings();
 }

include/asm-i386/hw_irq.h

@@ -59,7 +59,7 @@ void disable_IO_APIC(void);
 void print_IO_APIC(void);
 int IO_APIC_get_PCI_irq_vector(int bus, int slot, int fn);
 void send_IPI(int dest, int vector);
-void setup_ioapic_dest(cpumask_t mask);
+void setup_ioapic_dest(void);
 
 extern unsigned long io_apic_irqs;
 

include/asm-i386/mach-bigsmp/mach_apic.h

@@ -22,13 +22,21 @@ static inline int apic_id_registered(void)
 }
 
 #define APIC_DFR_VALUE	(APIC_DFR_CLUSTER)
+/* Round robin the irqs amoung the online cpus */
 static inline cpumask_t target_cpus(void)
 { 
-	return cpu_online_map;
+	static unsigned long cpu = NR_CPUS;
+	do {
+		if (cpu >= NR_CPUS)
+			cpu = first_cpu_const(cpu_online_map);
+		else
+			cpu = next_cpu_const(cpu, cpu_online_map);
+	} while (cpu >= NR_CPUS);
+	return mk_cpumask_const(cpumask_of_cpu(cpu));
 }
 #define TARGET_CPUS	(target_cpus())
 
-#define INT_DELIVERY_MODE dest_LowestPrio
+#define INT_DELIVERY_MODE dest_Fixed
 #define INT_DEST_MODE 1     /* logical delivery broadcast to all procs */
 
 #define APIC_BROADCAST_ID     (0xff)
@@ -141,36 +149,14 @@ static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
 	return (1);
 }
 
+/* As we are using single CPU as destination, pick only one CPU here */
 static inline unsigned int cpu_mask_to_apicid(cpumask_const_t cpumask)
 {
-	int num_bits_set;
-	int cpus_found = 0;
 	int cpu;
 	int apicid;	
 
-	num_bits_set = cpus_weight_const(cpumask);
-	/* Return id to all */
-	if (num_bits_set == NR_CPUS)
-		return (int) 0xFF;
-	/* 
-	 * The cpus in the mask must all be on the apic cluster.  If are not 
-	 * on the same apicid cluster return default value of TARGET_CPUS. 
-	 */
 	cpu = first_cpu_const(cpumask);
 	apicid = cpu_to_logical_apicid(cpu);
-	while (cpus_found < num_bits_set) {
-		if (cpu_isset_const(cpu, cpumask)) {
-			int new_apicid = cpu_to_logical_apicid(cpu);
-			if (apicid_cluster(apicid) != 
-					apicid_cluster(new_apicid)){
-				printk ("%s: Not a valid mask!\n",__FUNCTION__);
-				return 0xFF;
-			}
-			apicid = apicid | new_apicid;
-			cpus_found++;
-		}
-		cpu++;
-	}
 	return apicid;
 }