Commit 8e73e367 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC cleanups from Olof Johansson:
 "This branch contains code cleanups, moves and removals for 3.12.

  There's a large number of various cleanups, and a nice net removal of
  13500 lines of code.

  Highlights worth mentioning are:

   - A series of patches from Stephen Boyd removing the ARM local timer
     API.
   - Move of Qualcomm MSM IOMMU code to drivers/iommu.
   - Samsung PWM driver cleanups from Tomasz Figa, removing legacy PWM
     driver and switching over to the drivers/pwm one.
   - Removal of some unusued auto-generated headers for OMAP2+ (PRM/CM).

  There's also a move of a header file out of include/linux/i2c/ to
  platform_data, where it really belongs.  It touches mostly ARM
  platform code for include changes so we took it through our tree"

* tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (83 commits)
  ARM: OMAP2+: Add back the define for AM33XX_RST_GLOBAL_WARM_SW_MASK
  gpio: (gpio-pca953x) move header to linux/platform_data/
  arm: zynq: hotplug: Remove unreachable code
  ARM: SAMSUNG: Remove unnecessary exynos4_default_sdhci*()
  tegra: simplify use of devm_ioremap_resource
  ARM: SAMSUNG: Remove plat/regs-timer.h header
  ARM: SAMSUNG: Remove remaining uses of plat/regs-timer.h header
  ARM: SAMSUNG: Remove pwm-clock infrastructure
  ARM: SAMSUNG: Remove old PWM timer platform devices
  pwm: Remove superseded pwm-samsung-legacy driver
  ARM: SAMSUNG: Modify board files to use new PWM platform device
  ARM: SAMSUNG: Rework private data handling in dev-backlight
  pwm: Add new pwm-samsung driver
  ARM: mach-mvebu: remove redundant DT parsing and validation
  ARM: msm: Only compile io.c on platforms that use it
  iommu/msm: Move mach includes to iommu directory
  ARM: msm: Remove devices-iommu.c
  ARM: msm: Move mach/board.h contents to common.h
  ARM: msm: Migrate msm_timer to CLOCKSOURCE_OF_DECLARE
  ARM: msm: Remove TMR and TMR0 static mappings
  ...
parents d2f3e9eb 7323f219
......@@ -631,6 +631,7 @@ config ARCH_MSM
bool "Qualcomm MSM"
select ARCH_REQUIRE_GPIOLIB
select CLKDEV_LOOKUP
select CLKSRC_OF if OF
select COMMON_CLK
select GENERIC_CLOCKEVENTS
help
......@@ -646,7 +647,7 @@ config ARCH_SHMOBILE
select CLKDEV_LOOKUP
select GENERIC_CLOCKEVENTS
select HAVE_ARM_SCU if SMP
select HAVE_ARM_TWD if LOCAL_TIMERS
select HAVE_ARM_TWD if SMP
select HAVE_CLK
select HAVE_MACH_CLKDEV
select HAVE_SMP
......@@ -701,7 +702,7 @@ config ARCH_S3C24XX
select ARCH_HAS_CPUFREQ
select ARCH_REQUIRE_GPIOLIB
select CLKDEV_LOOKUP
select CLKSRC_MMIO
select CLKSRC_SAMSUNG_PWM
select GENERIC_CLOCKEVENTS
select GPIO_SAMSUNG
select HAVE_CLK
......@@ -724,7 +725,7 @@ config ARCH_S3C64XX
select ARCH_REQUIRE_GPIOLIB
select ARM_VIC
select CLKDEV_LOOKUP
select CLKSRC_MMIO
select CLKSRC_SAMSUNG_PWM
select CPU_V6
select GENERIC_CLOCKEVENTS
select GPIO_SAMSUNG
......@@ -740,7 +741,6 @@ config ARCH_S3C64XX
select SAMSUNG_ATAGS
select SAMSUNG_CLKSRC
select SAMSUNG_GPIOLIB_4BIT
select SAMSUNG_IRQ_VIC_TIMER
select SAMSUNG_WDT_RESET
select USB_ARCH_HAS_OHCI
help
......@@ -749,7 +749,7 @@ config ARCH_S3C64XX
config ARCH_S5P64X0
bool "Samsung S5P6440 S5P6450"
select CLKDEV_LOOKUP
select CLKSRC_MMIO
select CLKSRC_SAMSUNG_PWM
select CPU_V6
select GENERIC_CLOCKEVENTS
select GPIO_SAMSUNG
......@@ -768,7 +768,7 @@ config ARCH_S5PC100
bool "Samsung S5PC100"
select ARCH_REQUIRE_GPIOLIB
select CLKDEV_LOOKUP
select CLKSRC_MMIO
select CLKSRC_SAMSUNG_PWM
select CPU_V7
select GENERIC_CLOCKEVENTS
select GPIO_SAMSUNG
......@@ -788,7 +788,7 @@ config ARCH_S5PV210
select ARCH_HAS_HOLES_MEMORYMODEL
select ARCH_SPARSEMEM_ENABLE
select CLKDEV_LOOKUP
select CLKSRC_MMIO
select CLKSRC_SAMSUNG_PWM
select CPU_V7
select GENERIC_CLOCKEVENTS
select GPIO_SAMSUNG
......@@ -1594,16 +1594,6 @@ config ARM_PSCI
0022A ("Power State Coordination Interface System Software on
ARM processors").
config LOCAL_TIMERS
bool "Use local timer interrupts"
depends on SMP
default y
help
Enable support for local timers on SMP platforms, rather then the
legacy IPI broadcast method. Local timers allows the system
accounting to be spread across the timer interval, preventing a
"thundering herd" at every timer tick.
# The GPIO number here must be sorted by descending number. In case of
# a multiplatform kernel, we just want the highest value required by the
# selected platforms.
......
......@@ -895,6 +895,11 @@ config DEBUG_LL_INCLUDE
DEBUG_IMX53_UART ||\
DEBUG_IMX6Q_UART || \
DEBUG_IMX6SL_UART
default "debug/msm.S" if DEBUG_MSM_UART1 || \
DEBUG_MSM_UART2 || \
DEBUG_MSM_UART3 || \
DEBUG_MSM8660_UART || \
DEBUG_MSM8960_UART
default "debug/omap2plus.S" if DEBUG_OMAP2PLUS_UART
default "debug/sirf.S" if DEBUG_SIRFPRIMA2_UART1 || DEBUG_SIRFMARCO_UART1
default "debug/sti.S" if DEBUG_STI_UART
......@@ -1056,7 +1061,7 @@ config DEBUG_UART_8250_FLOW_CONTROL
config DEBUG_UNCOMPRESS
bool
depends on ARCH_MULTIPLATFORM
depends on ARCH_MULTIPLATFORM || ARCH_MSM
default y if DEBUG_LL && !DEBUG_OMAP2PLUS_UART && \
(!DEBUG_TEGRA_UART || !ZBOOT_ROM)
help
......@@ -1072,7 +1077,7 @@ config DEBUG_UNCOMPRESS
config UNCOMPRESS_INCLUDE
string
default "debug/uncompress.h" if ARCH_MULTIPLATFORM
default "debug/uncompress.h" if ARCH_MULTIPLATFORM || ARCH_MSM
default "mach/uncompress.h"
config EARLY_PRINTK
......
......@@ -72,7 +72,7 @@ mct_map: mct-map {
};
};
clock: clock-controller@0x10030000 {
clock: clock-controller@10030000 {
compatible = "samsung,exynos4210-clock";
reg = <0x10030000 0x20000>;
#clock-cells = <1>;
......
......@@ -28,7 +28,7 @@ aliases {
pinctrl3 = &pinctrl_3;
};
clock: clock-controller@0x10030000 {
clock: clock-controller@10030000 {
compatible = "samsung,exynos4412-clock";
reg = <0x10030000 0x20000>;
#clock-cells = <1>;
......
......@@ -68,17 +68,17 @@ cpu@1 {
};
};
pd_gsc: gsc-power-domain@0x10044000 {
pd_gsc: gsc-power-domain@10044000 {
compatible = "samsung,exynos4210-pd";
reg = <0x10044000 0x20>;
};
pd_mfc: mfc-power-domain@0x10044040 {
pd_mfc: mfc-power-domain@10044040 {
compatible = "samsung,exynos4210-pd";
reg = <0x10044040 0x20>;
};
clock: clock-controller@0x10010000 {
clock: clock-controller@10010000 {
compatible = "samsung,exynos5250-clock";
reg = <0x10010000 0x30000>;
#clock-cells = <1>;
......@@ -559,7 +559,7 @@ mdma1: mdma@11C10000 {
};
};
gsc_0: gsc@0x13e00000 {
gsc_0: gsc@13e00000 {
compatible = "samsung,exynos5-gsc";
reg = <0x13e00000 0x1000>;
interrupts = <0 85 0>;
......@@ -568,7 +568,7 @@ gsc_0: gsc@0x13e00000 {
clock-names = "gscl";
};
gsc_1: gsc@0x13e10000 {
gsc_1: gsc@13e10000 {
compatible = "samsung,exynos5-gsc";
reg = <0x13e10000 0x1000>;
interrupts = <0 86 0>;
......@@ -577,7 +577,7 @@ gsc_1: gsc@0x13e10000 {
clock-names = "gscl";
};
gsc_2: gsc@0x13e20000 {
gsc_2: gsc@13e20000 {
compatible = "samsung,exynos5-gsc";
reg = <0x13e20000 0x1000>;
interrupts = <0 87 0>;
......@@ -586,7 +586,7 @@ gsc_2: gsc@0x13e20000 {
clock-names = "gscl";
};
gsc_3: gsc@0x13e30000 {
gsc_3: gsc@13e30000 {
compatible = "samsung,exynos5-gsc";
reg = <0x13e30000 0x1000>;
interrupts = <0 88 0>;
......
......@@ -59,7 +59,7 @@ cpu3: cpu@3 {
};
};
clock: clock-controller@0x10010000 {
clock: clock-controller@10010000 {
compatible = "samsung,exynos5420-clock";
reg = <0x10010000 0x30000>;
#clock-cells = <1>;
......
......@@ -20,7 +20,7 @@ aliases {
spi0 = &spi_0;
};
clock: clock-controller@0x160000 {
clock: clock-controller@160000 {
compatible = "samsung,exynos5440-clock";
reg = <0x160000 0x1000>;
#clock-cells = <1>;
......
CONFIG_EXPERIMENTAL=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_KALLSYMS_ALL=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_ARCH_EXYNOS=y
CONFIG_S3C_LOWLEVEL_UART_PORT=1
CONFIG_MACH_SMDKC210=y
CONFIG_MACH_ARMLEX4210=y
CONFIG_MACH_UNIVERSAL_C210=y
CONFIG_MACH_NURI=y
CONFIG_MACH_ORIGEN=y
CONFIG_MACH_SMDK4412=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_SMP=y
CONFIG_NR_CPUS=2
CONFIG_PREEMPT=y
CONFIG_AEABI=y
CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC1,115200 init=/linuxrc mem=256M"
CONFIG_VFP=y
CONFIG_NEON=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=8192
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_CHR_DEV_SG=y
CONFIG_INPUT_EVDEV=y
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_SAMSUNG=y
CONFIG_SERIAL_SAMSUNG_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_I2C=y
# CONFIG_HWMON is not set
# CONFIG_MFD_SUPPORT is not set
# CONFIG_HID_SUPPORT is not set
# CONFIG_USB_SUPPORT is not set
CONFIG_EXT2_FS=y
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_CRAMFS=y
CONFIG_ROMFS_FS=y
CONFIG_PARTITION_ADVANCED=y
CONFIG_BSD_DISKLABEL=y
CONFIG_SOLARIS_X86_PARTITION=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_ASCII=y
CONFIG_NLS_ISO8859_1=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_KERNEL=y
CONFIG_DETECT_HUNG_TASK=y
CONFIG_DEBUG_RT_MUTEXES=y
CONFIG_DEBUG_SPINLOCK=y
CONFIG_DEBUG_MUTEXES=y
CONFIG_DEBUG_INFO=y
CONFIG_SYSCTL_SYSCALL_CHECK=y
CONFIG_DEBUG_USER=y
CONFIG_DEBUG_LL=y
CONFIG_EARLY_PRINTK=y
CONFIG_CRC_CCITT=y
/*
* arch/arm/include/asm/localtimer.h
*
* Copyright (C) 2004-2005 ARM Ltd.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARM_LOCALTIMER_H
#define __ASM_ARM_LOCALTIMER_H
#include <linux/errno.h>
struct clock_event_device;
struct local_timer_ops {
int (*setup)(struct clock_event_device *);
void (*stop)(struct clock_event_device *);
};
#ifdef CONFIG_LOCAL_TIMERS
/*
* Register a local timer driver
*/
int local_timer_register(struct local_timer_ops *);
#else
static inline int local_timer_register(struct local_timer_ops *ops)
{
return -ENXIO;
}
#endif
#endif
......@@ -15,8 +15,36 @@
*
*/
#include <mach/hardware.h>
#include <mach/msm_iomap.h>
#if defined(CONFIG_ARCH_MSM7X00A) || defined(CONFIG_ARCH_QSD8X50)
#define MSM_UART1_PHYS 0xA9A00000
#define MSM_UART2_PHYS 0xA9B00000
#define MSM_UART3_PHYS 0xA9C00000
#elif defined(CONFIG_ARCH_MSM7X30)
#define MSM_UART1_PHYS 0xACA00000
#define MSM_UART2_PHYS 0xACB00000
#define MSM_UART3_PHYS 0xACC00000
#endif
#if defined(CONFIG_DEBUG_MSM_UART1)
#define MSM_DEBUG_UART_BASE 0xE1000000
#define MSM_DEBUG_UART_PHYS MSM_UART1_PHYS
#elif defined(CONFIG_DEBUG_MSM_UART2)
#define MSM_DEBUG_UART_BASE 0xE1000000
#define MSM_DEBUG_UART_PHYS MSM_UART2_PHYS
#elif defined(CONFIG_DEBUG_MSM_UART3)
#define MSM_DEBUG_UART_BASE 0xE1000000
#define MSM_DEBUG_UART_PHYS MSM_UART3_PHYS
#endif
#ifdef CONFIG_DEBUG_MSM8660_UART
#define MSM_DEBUG_UART_BASE 0xF0040000
#define MSM_DEBUG_UART_PHYS 0x19C40000
#endif
#ifdef CONFIG_DEBUG_MSM8960_UART
#define MSM_DEBUG_UART_BASE 0xF0040000
#define MSM_DEBUG_UART_PHYS 0x16440000
#endif
.macro addruart, rp, rv, tmp
#ifdef MSM_DEBUG_UART_PHYS
......
......@@ -41,7 +41,6 @@
#include <asm/sections.h>
#include <asm/tlbflush.h>
#include <asm/ptrace.h>
#include <asm/localtimer.h>
#include <asm/smp_plat.h>
#include <asm/virt.h>
#include <asm/mach/arch.h>
......@@ -156,8 +155,6 @@ int platform_can_cpu_hotplug(void)
}
#ifdef CONFIG_HOTPLUG_CPU
static void percpu_timer_stop(void);
static int platform_cpu_kill(unsigned int cpu)
{
if (smp_ops.cpu_kill)
......@@ -200,11 +197,6 @@ int __cpu_disable(void)
*/
migrate_irqs();
/*
* Stop the local timer for this CPU.
*/
percpu_timer_stop();
/*
* Flush user cache and TLB mappings, and then remove this CPU
* from the vm mask set of all processes.
......@@ -326,8 +318,6 @@ static void smp_store_cpu_info(unsigned int cpuid)
store_cpu_topology(cpuid);
}
static void percpu_timer_setup(void);
/*
* This is the secondary CPU boot entry. We're using this CPUs
* idle thread stack, but a set of temporary page tables.
......@@ -382,11 +372,6 @@ asmlinkage void secondary_start_kernel(void)
set_cpu_online(cpu, true);
complete(&cpu_running);
/*
* Setup the percpu timer for this CPU.
*/
percpu_timer_setup();
local_irq_enable();
local_fiq_enable();
......@@ -423,12 +408,6 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
if (max_cpus > ncores)
max_cpus = ncores;
if (ncores > 1 && max_cpus) {
/*
* Enable the local timer or broadcast device for the
* boot CPU, but only if we have more than one CPU.
*/
percpu_timer_setup();
/*
* Initialise the present map, which describes the set of CPUs
* actually populated at the present time. A platform should
......@@ -505,11 +484,6 @@ u64 smp_irq_stat_cpu(unsigned int cpu)
return sum;
}
/*
* Timer (local or broadcast) support
*/
static DEFINE_PER_CPU(struct clock_event_device, percpu_clockevent);
#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
void tick_broadcast(const struct cpumask *mask)
{
......@@ -517,67 +491,6 @@ void tick_broadcast(const struct cpumask *mask)
}
#endif
static void broadcast_timer_set_mode(enum clock_event_mode mode,
struct clock_event_device *evt)
{
}
static void broadcast_timer_setup(struct clock_event_device *evt)
{
evt->name = "dummy_timer";
evt->features = CLOCK_EVT_FEAT_ONESHOT |
CLOCK_EVT_FEAT_PERIODIC |
CLOCK_EVT_FEAT_DUMMY;
evt->rating = 100;
evt->mult = 1;
evt->set_mode = broadcast_timer_set_mode;
clockevents_register_device(evt);
}
static struct local_timer_ops *lt_ops;
#ifdef CONFIG_LOCAL_TIMERS
int local_timer_register(struct local_timer_ops *ops)
{
if (!is_smp() || !setup_max_cpus)
return -ENXIO;
if (lt_ops)
return -EBUSY;
lt_ops = ops;
return 0;
}
#endif
static void percpu_timer_setup(void)
{
unsigned int cpu = smp_processor_id();
struct clock_event_device *evt = &per_cpu(percpu_clockevent, cpu);
evt->cpumask = cpumask_of(cpu);
if (!lt_ops || lt_ops->setup(evt))
broadcast_timer_setup(evt);
}
#ifdef CONFIG_HOTPLUG_CPU
/*
* The generic clock events code purposely does not stop the local timer
* on CPU_DEAD/CPU_DEAD_FROZEN hotplug events, so we have to do it
* manually here.
*/
static void percpu_timer_stop(void)
{
unsigned int cpu = smp_processor_id();
struct clock_event_device *evt = &per_cpu(percpu_clockevent, cpu);
if (lt_ops)
lt_ops->stop(evt);
}
#endif
static DEFINE_RAW_SPINLOCK(stop_lock);
/*
......
......@@ -11,6 +11,7 @@
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/clk.h>
#include <linux/cpu.h>
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/err.h>
......@@ -24,7 +25,6 @@
#include <asm/smp_plat.h>
#include <asm/smp_twd.h>
#include <asm/localtimer.h>
/* set up by the platform code */
static void __iomem *twd_base;
......@@ -33,7 +33,7 @@ static struct clk *twd_clk;
static unsigned long twd_timer_rate;
static DEFINE_PER_CPU(bool, percpu_setup_called);
static struct clock_event_device __percpu **twd_evt;
static struct clock_event_device __percpu *twd_evt;
static int twd_ppi;
static void twd_set_mode(enum clock_event_mode mode,
......@@ -90,8 +90,10 @@ static int twd_timer_ack(void)
return 0;
}
static void twd_timer_stop(struct clock_event_device *clk)
static void twd_timer_stop(void)
{
struct clock_event_device *clk = __this_cpu_ptr(twd_evt);
twd_set_mode(CLOCK_EVT_MODE_UNUSED, clk);
disable_percpu_irq(clk->irq);
}
......@@ -106,7 +108,7 @@ static void twd_update_frequency(void *new_rate)
{
twd_timer_rate = *((unsigned long *) new_rate);
clockevents_update_freq(*__this_cpu_ptr(twd_evt), twd_timer_rate);
clockevents_update_freq(__this_cpu_ptr(twd_evt), twd_timer_rate);
}
static int twd_rate_change(struct notifier_block *nb,
......@@ -132,7 +134,7 @@ static struct notifier_block twd_clk_nb = {
static int twd_clk_init(void)
{
if (twd_evt && *__this_cpu_ptr(twd_evt) && !IS_ERR(twd_clk))
if (twd_evt && __this_cpu_ptr(twd_evt) && !IS_ERR(twd_clk))
return clk_notifier_register(twd_clk, &twd_clk_nb);
return 0;
......@@ -151,7 +153,7 @@ static void twd_update_frequency(void *data)
{
twd_timer_rate = clk_get_rate(twd_clk);
clockevents_update_freq(*__this_cpu_ptr(twd_evt), twd_timer_rate);
clockevents_update_freq(__this_cpu_ptr(twd_evt), twd_timer_rate);
}
static int twd_cpufreq_transition(struct notifier_block *nb,
......@@ -177,7 +179,7 @@ static struct notifier_block twd_cpufreq_nb = {
static int twd_cpufreq_init(void)
{
if (twd_evt && *__this_cpu_ptr(twd_evt) && !IS_ERR(twd_clk))
if (twd_evt && __this_cpu_ptr(twd_evt) && !IS_ERR(twd_clk))
return cpufreq_register_notifier(&twd_cpufreq_nb,
CPUFREQ_TRANSITION_NOTIFIER);
......@@ -228,7 +230,7 @@ static void twd_calibrate_rate(void)
static irqreturn_t twd_handler(int irq, void *dev_id)
{
struct clock_event_device *evt = *(struct clock_event_device **)dev_id;
struct clock_event_device *evt = dev_id;
if (twd_timer_ack()) {
evt->event_handler(evt);
......@@ -265,9 +267,9 @@ static void twd_get_clock(struct device_node *np)
/*
* Setup the local clock events for a CPU.
*/
static int twd_timer_setup(struct clock_event_device *clk)
static void twd_timer_setup(void)
{
struct clock_event_device **this_cpu_clk;
struct clock_event_device *clk = __this_cpu_ptr(twd_evt);
int cpu = smp_processor_id();
/*
......@@ -276,9 +278,9 @@ static int twd_timer_setup(struct clock_event_device *clk)
*/
if (per_cpu(percpu_setup_called, cpu)) {
__raw_writel(0, twd_base + TWD_TIMER_CONTROL);
clockevents_register_device(*__this_cpu_ptr(twd_evt));
clockevents_register_device(clk);
enable_percpu_irq(clk->irq, 0);
return 0;
return;
}
per_cpu(percpu_setup_called, cpu) = true;
......@@ -297,27 +299,37 @@ static int twd_timer_setup(struct clock_event_device *clk)
clk->set_mode = twd_set_mode;
clk->set_next_event = twd_set_next_event;
clk->irq = twd_ppi;
this_cpu_clk = __this_cpu_ptr(twd_evt);
*this_cpu_clk = clk;
clk->cpumask = cpumask_of(cpu);
clockevents_config_and_register(clk, twd_timer_rate,
0xf, 0xffffffff);
enable_percpu_irq(clk->irq, 0);
}
return 0;
static int twd_timer_cpu_notify(struct notifier_block *self,
unsigned long action, void *hcpu)
{
switch (action & ~CPU_TASKS_FROZEN) {
case CPU_STARTING:
twd_timer_setup();
break;
case CPU_DYING:
twd_timer_stop();
break;
}
return NOTIFY_OK;
}
static struct local_timer_ops twd_lt_ops = {
.setup = twd_timer_setup,
.stop = twd_timer_stop,
static struct notifier_block twd_timer_cpu_nb = {
.notifier_call = twd_timer_cpu_notify,
};
static int __init twd_local_timer_common_register(struct device_node *np)
{
int err;
twd_evt = alloc_percpu(struct clock_event_device *);
twd_evt = alloc_percpu(struct clock_event_device);
if (!twd_evt) {
err = -ENOMEM;
goto out_free;
......@@ -329,12 +341,22 @@ static int __init twd_local_timer_common_register(struct device_node *np)
goto out_free;
}
err = local_timer_register(&twd_lt_ops);
err = register_cpu_notifier(&twd_timer_cpu_nb);
if (err)
goto out_irq;
twd_get_clock(np);
/*
* Immediately configure the timer on the boot CPU, unless we need
* jiffies to be incrementing to calibrate the rate in which case
* setup the timer in late_time_init.
*/
if (twd_timer_rate)
twd_timer_setup();
else
late_time_init = twd_timer_setup;
return 0;
out_irq:
......
......@@ -26,7 +26,7 @@
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <linux/spi/spi.h>
#include <linux/i2c/pca953x.h>
#include <linux/platform_data/pca953x.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
......
......@@ -19,7 +19,7 @@
#include <linux/kernel.h>
#include <linux/i2c.h>
#include <linux/i2c/at24.h>
#include <linux/i2c/pca953x.h>
#include <linux/platform_data/pca953x.h>
#include <linux/input.h>
#include <linux/input/tps6507x-ts.h>
#include <linux/mfd/tps6507x.h>
......
......@@ -23,7 +23,7 @@
#include <linux/mtd/partitions.h>
#include <linux/i2c.h>
#include <linux/i2c-gpio.h>
#include <linux/i2c/pca953x.h>
#include <linux/platform_data/pca953x.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
#include <linux/spi/mmc_spi.h>
......
......@@ -17,7 +17,6 @@
void mct_init(void __iomem *base, int irq_g0, int irq_l0, int irq_l1);
void exynos_init_time(void);
extern unsigned long xxti_f, xusbxti_f;
struct map_desc;
void exynos_init_io(void);
......@@ -25,56 +24,14 @@ void exynos4_restart(enum reboot_mode mode, const char *cmd);
void exynos5_restart(enum reboot_mode mode, const char *cmd);
void exynos_init_late(void);
/* ToDo: remove these after migrating legacy exynos4 platforms to dt */
void exynos4_clk_init(struct device_node *np, int is_exynos4210, void __iomem *reg_base, unsigned long xom);
void exynos4_clk_register_fixed_ext(unsigned long, unsigned long);
void exynos_firmware_init(void);
void exynos_set_timer_source(u8 channels);
#ifdef CONFIG_PM_GENERIC_DOMAINS
int exynos_pm_late_initcall(void);
#else
static inline int exynos_pm_late_initcall(void) { return 0; }
#endif
#ifdef CONFIG_ARCH_EXYNOS4
void exynos4_register_clocks(void);
void exynos4_setup_clocks(void);
#else
#define exynos4_register_clocks()
#define exynos4_setup_clocks()
#endif
#ifdef CONFIG_ARCH_EXYNOS5
void exynos5_register_clocks(void);
void exynos5_setup_clocks(void);
#else
#define exynos5_register_clocks()
#define exynos5_setup_clocks()
#endif
#ifdef CONFIG_CPU_EXYNOS4210
void exynos4210_register_clocks(void);
#else
#define exynos4210_register_clocks()
#endif
#ifdef CONFIG_SOC_EXYNOS4212
void exynos4212_register_clocks(void);
#else
#define exynos4212_register_clocks()
#endif
struct device_node;
void combiner_init(void __iomem *combiner_base, struct device_node *np,
unsigned int max_nr, int irq_base);
extern struct smp_operations exynos_smp_ops;
extern void exynos_cpu_die(unsigned int cpu);
......
......@@ -12,7 +12,7 @@ config ARCH_HIGHBANK
select CPU_V7
select GENERIC_CLOCKEVENTS
select HAVE_ARM_SCU
select HAVE_ARM_TWD if LOCAL_TIMERS
select HAVE_ARM_TWD if SMP
select HAVE_SMP
select MAILBOX
select PL320_MBOX
......
......@@ -793,7 +793,7 @@ config SOC_IMX6Q
select COMMON_CLK
select CPU_V7
select HAVE_ARM_SCU if SMP
select HAVE_ARM_TWD if LOCAL_TIMERS
select HAVE_ARM_TWD if SMP
select HAVE_IMX_ANATOP
select HAVE_IMX_GPC
select HAVE_IMX_MMDC
......
......@@ -26,7 +26,7 @@
#include <linux/platform_device.h>
#include <linux/mtd/physmap.h>
#include <linux/i2c.h>
#include <linux/i2c/pca953x.h>
#include <linux/platform_data/pca953x.h>
#include <linux/input.h>
#include <linux/gpio.h>
#include <linux/delay.h>
......
......@@ -26,7 +26,7 @@
#include <asm/mach/time.h>
#include <asm/mach/map.h>
#include <linux/gpio.h>
#include <linux/i2c/pca953x.h>
#include <linux/platform_data/pca953x.h>
#include "common.h"
#include "devices-imx27.h"
......
......@@ -20,7 +20,7 @@
#include <linux/i2c.h>
#include <linux/i2c-algo-bit.h>
#include <linux/i2c-gpio.h>
#include <linux/i2c/pca953x.h>
#include <linux/platform_data/pca953x.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/map.h>
......
......@@ -15,7 +15,7 @@
#include <linux/mtd/partitions.h>
#include <linux/mtd/onenand.h>
#include <linux/interrupt.h>
#include <linux/i2c/pca953x.h>
#include <linux/platform_data/pca953x.h>
#include <linux/gpio.h>
#include <linux/gpio-pxa.h>
#include <linux/mfd/88pm860x.h>
......
obj-y += io.o timer.o
obj-y += timer.o
obj-y += clock.o
obj-$(CONFIG_MSM_VIC) += irq-vic.o
obj-$(CONFIG_MSM_IOMMU) += devices-iommu.o
obj-$(CONFIG_ARCH_MSM7X00A) += irq.o
obj-$(CONFIG_ARCH_QSD8X50) += sirc.o
obj-$(CONFIG_MSM_PROC_COMM) += proc_comm.o clock-pcom.o vreg.o
obj-$(CONFIG_ARCH_MSM7X00A) += dma.o
obj-$(CONFIG_ARCH_MSM7X30) += dma.o
obj-$(CONFIG_ARCH_QSD8X50) += dma.o
obj-$(CONFIG_ARCH_MSM7X00A) += dma.o io.o
obj-$(CONFIG_ARCH_MSM7X30) += dma.o io.o
obj-$(CONFIG_ARCH_QSD8X50) += dma.o io.o
obj-$(CONFIG_MSM_SMD) += smd.o smd_debug.o
obj-$(CONFIG_MSM_SMD) += last_radio_log.o
......
......@@ -15,8 +15,8 @@
#include <linux/of_platform.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <mach/board.h>
#include "common.h"
static void __init msm8x60_init_late(void)
......@@ -42,9 +42,7 @@ static const char *msm8x60_fluid_match[] __initdata = {
DT_MACHINE_START(MSM_DT, "Qualcomm MSM (Flattened Device Tree)")
.smp = smp_ops(msm_smp_ops),
.map_io = msm_map_msm8x60_io,
.init_machine = msm8x60_dt_init,
.init_late = msm8x60_init_late,
.init_time = msm_dt_timer_init,
.dt_compat = msm8x60_fluid_match,
MACHINE_END
......@@ -14,6 +14,7 @@
#include <linux/of_platform.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include "common.h"
......@@ -29,8 +30,6 @@ static const char * const msm8960_dt_match[] __initconst = {
DT_MACHINE_START(MSM8960_DT, "Qualcomm MSM (Flattened Device Tree)")
.smp = smp_ops(msm_smp_ops),
.map_io = msm_map_msm8960_io,
.init_time = msm_dt_timer_init,
.init_machine = msm_dt_init,
.dt_compat = msm8960_dt_match,
MACHINE_END
......@@ -29,7 +29,6 @@
#include <asm/setup.h>
#include <mach/irqs.h>
#include <mach/board.h>
#include <mach/msm_iomap.h>
#include <linux/mtd/nand.h>
......
......@@ -28,12 +28,12 @@
#include <asm/mach/map.h>
#include <asm/setup.h>
#include <mach/board.h>
#include <mach/hardware.h>
#include "board-mahimahi.h"
#include "devices.h"
#include "proc_comm.h"
#include "common.h"
static uint debug_uart;
......
......@@ -30,7 +30,6 @@
#include <asm/memory.h>
#include <asm/setup.h>
#include <mach/board.h>
#include <mach/msm_iomap.h>
#include <mach/dma.h>
......
......@@ -28,7 +28,6 @@
#include <asm/io.h>
#include <asm/setup.h>
#include <mach/board.h>
#include <mach/irqs.h>
#include <mach/sirc.h>
#include <mach/vreg.h>
......
......@@ -28,7 +28,6 @@
#include <asm/mach/map.h>
#include <asm/mach/flash.h>
#include <mach/vreg.h>
#include <mach/board.h>
#include <asm/io.h>
#include <asm/delay.h>
......@@ -41,6 +40,7 @@
#include "board-sapphire.h"
#include "proc_comm.h"
#include "devices.h"
#include "common.h"
void msm_init_irq(void);
void msm_init_gpio(void);
......
......@@ -25,7 +25,6 @@
#include <asm/mach/map.h>
#include <asm/setup.h>
#include <mach/board.h>
#include <mach/hardware.h>
#include <mach/msm_iomap.h>
......
......@@ -4,7 +4,7 @@
#ifndef __ARCH_ARM_MACH_MSM_BOARD_TROUT_H
#define __ARCH_ARM_MACH_MSM_BOARD_TROUT_H
#include <mach/board.h>
#include "common.h"
#define MSM_SMI_BASE 0x00000000
#define MSM_SMI_SIZE 0x00800000
......
......@@ -14,13 +14,10 @@
extern void msm7x01_timer_init(void);
extern void msm7x30_timer_init(void);
extern void msm_dt_timer_init(void);
extern void qsd8x50_timer_init(void);
extern void msm_map_common_io(void);
extern void msm_map_msm7x30_io(void);
extern void msm_map_msm8x60_io(void);
extern void msm_map_msm8960_io(void);
extern void msm_map_qsd8x50_io(void);
extern void __iomem *__msm_ioremap_caller(phys_addr_t phys_addr, size_t size,
......@@ -29,4 +26,19 @@ extern void __iomem *__msm_ioremap_caller(phys_addr_t phys_addr, size_t size,
extern struct smp_operations msm_smp_ops;
extern void msm_cpu_die(unsigned int cpu);
struct msm_mmc_platform_data;
extern void msm_add_devices(void);
extern void msm_init_irq(void);
extern void msm_init_gpio(void);
extern int msm_add_sdcc(unsigned int controller,
struct msm_mmc_platform_data *plat,
unsigned int stat_irq, unsigned long stat_irq_flags);
#if defined(CONFIG_MSM_SMD) && defined(CONFIG_DEBUG_FS)
extern int smd_debugfs_init(void);
#else
static inline int smd_debugfs_init(void) { return 0; }
#endif
#endif
This diff is collapsed.
......@@ -21,10 +21,10 @@
#include <mach/irqs.h>
#include <mach/msm_iomap.h>
#include <mach/dma.h>
#include <mach/board.h>
#include "devices.h"
#include "smd_private.h"
#include "common.h"
#include <asm/mach/flash.h>
......
......@@ -21,9 +21,9 @@
#include <mach/irqs.h>
#include <mach/msm_iomap.h>
#include <mach/dma.h>
#include <mach/board.h>
#include "devices.h"
#include "common.h"
#include <asm/mach/flash.h>
......
/* arch/arm/mach-msm/include/mach/board.h
*
* Copyright (C) 2007 Google, Inc.
* Author: Brian Swetland <swetland@google.com>
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#ifndef __ASM_ARCH_MSM_BOARD_H
#define __ASM_ARCH_MSM_BOARD_H
#include <linux/types.h>
#include <linux/platform_data/mmc-msm_sdcc.h>
/* common init routines for use by arch/arm/mach-msm/board-*.c */
void __init msm_add_devices(void);
void __init msm_init_irq(void);
void __init msm_init_gpio(void);
int __init msm_add_sdcc(unsigned int controller,
struct msm_mmc_platform_data *plat,
unsigned int stat_irq, unsigned long stat_irq_flags);
#if defined(CONFIG_MSM_SMD) && defined(CONFIG_DEBUG_FS)
int smd_debugfs_init(void);
#else
static inline int smd_debugfs_init(void) { return 0; }
#endif
#endif
/*
* Copyright (C) 2007 Google, Inc.
* Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
* Author: Brian Swetland <swetland@google.com>
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*
* The MSM peripherals are spread all over across 768MB of physical
* space, which makes just having a simple IO_ADDRESS macro to slide
* them into the right virtual location rough. Instead, we will
* provide a master phys->virt mapping for peripherals here.
*
*/
#ifndef __ASM_ARCH_MSM_IOMAP_8960_H
#define __ASM_ARCH_MSM_IOMAP_8960_H
/* Physical base address and size of peripherals.
* Ordered by the virtual base addresses they will be mapped at.
*
* If you add or remove entries here, you'll want to edit the
* msm_io_desc array in arch/arm/mach-msm/io.c to reflect your
* changes.
*
*/
#define MSM8960_TMR_PHYS 0x0200A000
#define MSM8960_TMR_SIZE SZ_4K
#define MSM8960_TMR0_PHYS 0x0208A000
#define MSM8960_TMR0_SIZE SZ_4K
#ifdef CONFIG_DEBUG_MSM8960_UART
#define MSM_DEBUG_UART_BASE 0xF0040000
#define MSM_DEBUG_UART_PHYS 0x16440000
#endif
#endif
/*
* Copyright (C) 2007 Google, Inc.
* Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
* Author: Brian Swetland <swetland@google.com>
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*
* The MSM peripherals are spread all over across 768MB of physical
* space, which makes just having a simple IO_ADDRESS macro to slide
* them into the right virtual location rough. Instead, we will
* provide a master phys->virt mapping for peripherals here.
*
*/
#ifndef __ASM_ARCH_MSM_IOMAP_8X60_H
#define __ASM_ARCH_MSM_IOMAP_8X60_H
/* Physical base address and size of peripherals.
* Ordered by the virtual base addresses they will be mapped at.
*
* MSM_VIC_BASE must be an value that can be loaded via a "mov"
* instruction, otherwise entry-macro.S will not compile.
*
* If you add or remove entries here, you'll want to edit the
* msm_io_desc array in arch/arm/mach-msm/io.c to reflect your
* changes.
*
*/
#define MSM_TLMM_BASE IOMEM(0xF0004000)
#define MSM_TLMM_PHYS 0x00800000
#define MSM_TLMM_SIZE SZ_16K
#define MSM8X60_TMR_PHYS 0x02000000
#define MSM8X60_TMR_SIZE SZ_4K
#define MSM8X60_TMR0_PHYS 0x02040000
#define MSM8X60_TMR0_SIZE SZ_4K
#ifdef CONFIG_DEBUG_MSM8660_UART
#define MSM_DEBUG_UART_BASE 0xF0040000
#define MSM_DEBUG_UART_PHYS 0x19C40000
#endif
#endif
......@@ -45,25 +45,8 @@
#include "msm_iomap-7x00.h"
#endif
#include "msm_iomap-8x60.h"
#include "msm_iomap-8960.h"
#define MSM_DEBUG_UART_SIZE SZ_4K
#if defined(CONFIG_DEBUG_MSM_UART1)
#define MSM_DEBUG_UART_BASE 0xE1000000
#define MSM_DEBUG_UART_PHYS MSM_UART1_PHYS
#elif defined(CONFIG_DEBUG_MSM_UART2)
#define MSM_DEBUG_UART_BASE 0xE1000000
#define MSM_DEBUG_UART_PHYS MSM_UART2_PHYS
#elif defined(CONFIG_DEBUG_MSM_UART3)
#define MSM_DEBUG_UART_BASE 0xE1000000
#define MSM_DEBUG_UART_PHYS MSM_UART3_PHYS
#endif
/* Virtual addresses shared across all MSM targets. */
#define MSM_CSR_BASE IOMEM(0xE0001000)
#define MSM_TMR_BASE IOMEM(0xF0200000)
#define MSM_TMR0_BASE IOMEM(0xF0201000)
#define MSM_GPIO1_BASE IOMEM(0xE0003000)
#define MSM_GPIO2_BASE IOMEM(0xE0004000)
......
/*
* Copyright (C) 2007 Google, Inc.
* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#ifndef __ASM_ARCH_MSM_UNCOMPRESS_H
#define __ASM_ARCH_MSM_UNCOMPRESS_H
#include <asm/barrier.h>
#include <asm/processor.h>
#include <mach/msm_iomap.h>
#define UART_CSR (*(volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x08))
#define UART_TF (*(volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x0c))
#define UART_DM_SR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x08)))
#define UART_DM_CR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x10)))
#define UART_DM_ISR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x14)))
#define UART_DM_NCHAR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x40)))
#define UART_DM_TF (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x70)))
static void putc(int c)
{
#if defined(MSM_DEBUG_UART_PHYS)
#ifdef CONFIG_MSM_HAS_DEBUG_UART_HS
/*
* Wait for TX_READY to be set; but skip it if we have a
* TX underrun.
*/
if (!(UART_DM_SR & 0x08))
while (!(UART_DM_ISR & 0x80))
cpu_relax();
UART_DM_CR = 0x300;
UART_DM_NCHAR = 0x1;
UART_DM_TF = c;
#else
while (!(UART_CSR & 0x04))
cpu_relax();
UART_TF = c;
#endif
#endif
}
static inline void flush(void)
{
}
static inline void arch_decomp_setup(void)
{
}
#endif
......@@ -18,6 +18,7 @@
*/
#include <linux/kernel.h>
#include <linux/bug.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/export.h>
......@@ -27,8 +28,6 @@
#include <mach/msm_iomap.h>
#include <asm/mach/map.h>
#include <mach/board.h>
#include "common.h"
#define MSM_CHIP_DEVICE_TYPE(name, chip, mem_type) { \
......@@ -52,26 +51,38 @@ static struct map_desc msm_io_desc[] __initdata = {
MSM_CHIP_DEVICE_TYPE(GPIO1, MSM7X00, MT_DEVICE_NONSHARED),
MSM_CHIP_DEVICE_TYPE(GPIO2, MSM7X00, MT_DEVICE_NONSHARED),
MSM_DEVICE_TYPE(CLK_CTL, MT_DEVICE_NONSHARED),
#if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \
defined(CONFIG_DEBUG_MSM_UART3)
MSM_DEVICE_TYPE(DEBUG_UART, MT_DEVICE_NONSHARED),
#endif
{
.virtual = (unsigned long) MSM_SHARED_RAM_BASE,
.pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS),
.length = MSM_SHARED_RAM_SIZE,
.type = MT_DEVICE,
},
#if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \
defined(CONFIG_DEBUG_MSM_UART3)
{
/* Must be last: virtual and pfn filled in by debug_ll_addr() */
.length = SZ_4K,
.type = MT_DEVICE_NONSHARED,
}
#endif
};
void __init msm_map_common_io(void)
{
size_t size = ARRAY_SIZE(msm_io_desc);
/* Make sure the peripheral register window is closed, since
* we will use PTE flags (TEX[1]=1,B=0,C=1) to determine which
* pages are peripheral interface or not.
*/
asm("mcr p15, 0, %0, c15, c2, 4" : : "r" (0));
iotable_init(msm_io_desc, ARRAY_SIZE(msm_io_desc));
#if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \
defined(CONFIG_DEBUG_MSM_UART3)
debug_ll_addr(&msm_io_desc[size - 1].pfn,
&msm_io_desc[size - 1].virtual);
msm_io_desc[size - 1].pfn = __phys_to_pfn(msm_io_desc[size - 1].pfn);
#endif
iotable_init(msm_io_desc, size);
}
#endif
......@@ -87,10 +98,6 @@ static struct map_desc qsd8x50_io_desc[] __initdata = {
MSM_DEVICE(SCPLL),
MSM_DEVICE(AD5),
MSM_DEVICE(MDC),
#if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \
defined(CONFIG_DEBUG_MSM_UART3)
MSM_DEVICE(DEBUG_UART),
#endif
{
.virtual = (unsigned long) MSM_SHARED_RAM_BASE,
.pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS),
......@@ -101,40 +108,11 @@ static struct map_desc qsd8x50_io_desc[] __initdata = {
void __init msm_map_qsd8x50_io(void)
{
debug_ll_io_init();
iotable_init(qsd8x50_io_desc, ARRAY_SIZE(qsd8x50_io_desc));
}
#endif /* CONFIG_ARCH_QSD8X50 */
#ifdef CONFIG_ARCH_MSM8X60
static struct map_desc msm8x60_io_desc[] __initdata = {
MSM_CHIP_DEVICE(TMR, MSM8X60),
MSM_CHIP_DEVICE(TMR0, MSM8X60),
#ifdef CONFIG_DEBUG_MSM8660_UART
MSM_DEVICE(DEBUG_UART),
#endif
};
void __init msm_map_msm8x60_io(void)
{
iotable_init(msm8x60_io_desc, ARRAY_SIZE(msm8x60_io_desc));
}
#endif /* CONFIG_ARCH_MSM8X60 */
#ifdef CONFIG_ARCH_MSM8960
static struct map_desc msm8960_io_desc[] __initdata = {
MSM_CHIP_DEVICE(TMR, MSM8960),
MSM_CHIP_DEVICE(TMR0, MSM8960),
#ifdef CONFIG_DEBUG_MSM8960_UART
MSM_DEVICE(DEBUG_UART),
#endif
};
void __init msm_map_msm8960_io(void)
{
iotable_init(msm8960_io_desc, ARRAY_SIZE(msm8960_io_desc));
}
#endif /* CONFIG_ARCH_MSM8960 */
#ifdef CONFIG_ARCH_MSM7X30
static struct map_desc msm7x30_io_desc[] __initdata = {
MSM_DEVICE(VIC),
......@@ -150,10 +128,6 @@ static struct map_desc msm7x30_io_desc[] __initdata = {
MSM_DEVICE(SAW),
MSM_DEVICE(GCC),
MSM_DEVICE(TCSR),
#if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \
defined(CONFIG_DEBUG_MSM_UART3)
MSM_DEVICE(DEBUG_UART),
#endif
{
.virtual = (unsigned long) MSM_SHARED_RAM_BASE,
.pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS),
......@@ -164,10 +138,12 @@ static struct map_desc msm7x30_io_desc[] __initdata = {
void __init msm_map_msm7x30_io(void)
{
debug_ll_io_init();
iotable_init(msm7x30_io_desc, ARRAY_SIZE(msm7x30_io_desc));
}
#endif /* CONFIG_ARCH_MSM7X30 */
#ifdef CONFIG_ARCH_MSM7X00A
void __iomem *__msm_ioremap_caller(phys_addr_t phys_addr, size_t size,
unsigned int mtype, void *caller)
{
......@@ -182,3 +158,4 @@ void __iomem *__msm_ioremap_caller(phys_addr_t phys_addr, size_t size,
return __arm_ioremap_caller(phys_addr, size, mtype, caller);
}
#endif
......@@ -16,6 +16,7 @@
#include <linux/clocksource.h>
#include <linux/clockchips.h>
#include <linux/cpu.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
......@@ -26,7 +27,6 @@
#include <linux/sched_clock.h>
#include <asm/mach/time.h>
#include <asm/localtimer.h>
#include "common.h"
......@@ -49,7 +49,7 @@ static void __iomem *sts_base;
static irqreturn_t msm_timer_interrupt(int irq, void *dev_id)
{
struct clock_event_device *evt = *(struct clock_event_device **)dev_id;
struct clock_event_device *evt = dev_id;
/* Stop the timer tick */
if (evt->mode == CLOCK_EVT_MODE_ONESHOT) {
u32 ctrl = readl_relaxed(event_base + TIMER_ENABLE);
......@@ -101,18 +101,7 @@ static void msm_timer_set_mode(enum clock_event_mode mode,
writel_relaxed(ctrl, event_base + TIMER_ENABLE);
}
static struct clock_event_device msm_clockevent = {
.name = "gp_timer",
.features = CLOCK_EVT_FEAT_ONESHOT,
.rating = 200,
.set_next_event = msm_timer_set_next_event,
.set_mode = msm_timer_set_mode,
};
static union {
struct clock_event_device *evt;
struct clock_event_device * __percpu *percpu_evt;
} msm_evt;
static struct clock_event_device __percpu *msm_evt;
static void __iomem *source_base;
......@@ -138,23 +127,34 @@ static struct clocksource msm_clocksource = {
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
};
#ifdef CONFIG_LOCAL_TIMERS
static int msm_timer_irq;
static int msm_timer_has_ppi;
static int msm_local_timer_setup(struct clock_event_device *evt)
{
/* Use existing clock_event for cpu 0 */
if (!smp_processor_id())
return 0;
int cpu = smp_processor_id();
int err;
evt->irq = msm_clockevent.irq;
evt->name = "local_timer";
evt->features = msm_clockevent.features;
evt->rating = msm_clockevent.rating;
evt->irq = msm_timer_irq;
evt->name = "msm_timer";
evt->features = CLOCK_EVT_FEAT_ONESHOT;
evt->rating = 200;
evt->set_mode = msm_timer_set_mode;
evt->set_next_event = msm_timer_set_next_event;
evt->cpumask = cpumask_of(cpu);
*__this_cpu_ptr(msm_evt.percpu_evt) = evt;
clockevents_config_and_register(evt, GPT_HZ, 4, 0xf0000000);
clockevents_config_and_register(evt, GPT_HZ, 4, 0xffffffff);
if (msm_timer_has_ppi) {
enable_percpu_irq(evt->irq, IRQ_TYPE_EDGE_RISING);
} else {
err = request_irq(evt->irq, msm_timer_interrupt,
IRQF_TIMER | IRQF_NOBALANCING |
IRQF_TRIGGER_RISING, "gp_timer", evt);
if (err)
pr_err("request_irq failed\n");
}
return 0;
}
......@@ -164,11 +164,28 @@ static void msm_local_timer_stop(struct clock_event_device *evt)
disable_percpu_irq(evt->irq);
}
static struct local_timer_ops msm_local_timer_ops = {
.setup = msm_local_timer_setup,
.stop = msm_local_timer_stop,
static int msm_timer_cpu_notify(struct notifier_block *self,
unsigned long action, void *hcpu)
{
/*
* Grab cpu pointer in each case to avoid spurious
* preemptible warnings
*/
switch (action & ~CPU_TASKS_FROZEN) {
case CPU_STARTING:
msm_local_timer_setup(this_cpu_ptr(msm_evt));
break;
case CPU_DYING:
msm_local_timer_stop(this_cpu_ptr(msm_evt));
break;
}
return NOTIFY_OK;
}
static struct notifier_block msm_timer_cpu_nb = {
.notifier_call = msm_timer_cpu_notify,
};
#endif /* CONFIG_LOCAL_TIMERS */
static notrace u32 msm_sched_clock_read(void)
{
......@@ -178,38 +195,35 @@ static notrace u32 msm_sched_clock_read(void)
static void __init msm_timer_init(u32 dgt_hz, int sched_bits, int irq,
bool percpu)
{
struct clock_event_device *ce = &msm_clockevent;
struct clocksource *cs = &msm_clocksource;
int res;
int res = 0;
ce->cpumask = cpumask_of(0);
ce->irq = irq;
msm_timer_irq = irq;
msm_timer_has_ppi = percpu;
clockevents_config_and_register(ce, GPT_HZ, 4, 0xffffffff);
if (percpu) {
msm_evt.percpu_evt = alloc_percpu(struct clock_event_device *);
if (!msm_evt.percpu_evt) {
pr_err("memory allocation failed for %s\n", ce->name);
msm_evt = alloc_percpu(struct clock_event_device);
if (!msm_evt) {
pr_err("memory allocation failed for clockevents\n");
goto err;
}
*__this_cpu_ptr(msm_evt.percpu_evt) = ce;
res = request_percpu_irq(ce->irq, msm_timer_interrupt,
ce->name, msm_evt.percpu_evt);
if (!res) {
enable_percpu_irq(ce->irq, IRQ_TYPE_EDGE_RISING);
#ifdef CONFIG_LOCAL_TIMERS
local_timer_register(&msm_local_timer_ops);
#endif
}
if (percpu)
res = request_percpu_irq(irq, msm_timer_interrupt,
"gp_timer", msm_evt);
if (res) {
pr_err("request_percpu_irq failed\n");
} else {
msm_evt.evt = ce;
res = request_irq(ce->irq, msm_timer_interrupt,
IRQF_TIMER | IRQF_NOBALANCING |
IRQF_TRIGGER_RISING, ce->name, &msm_evt.evt);
res = register_cpu_notifier(&msm_timer_cpu_nb);
if (res) {
free_percpu_irq(irq, msm_evt);
goto err;
}
/* Immediately configure the timer on the boot CPU */
msm_local_timer_setup(__this_cpu_ptr(msm_evt));
}
if (res)
pr_err("request_irq failed for %s\n", ce->name);
err:
writel_relaxed(TIMER_ENABLE_EN, source_base + TIMER_ENABLE);
res = clocksource_register_hz(cs, dgt_hz);
......@@ -219,15 +233,8 @@ static void __init msm_timer_init(u32 dgt_hz, int sched_bits, int irq,
}
#ifdef CONFIG_OF
static const struct of_device_id msm_timer_match[] __initconst = {
{ .compatible = "qcom,kpss-timer" },
{ .compatible = "qcom,scss-timer" },
{ },
};
void __init msm_dt_timer_init(void)
static void __init msm_dt_timer_init(struct device_node *np)
{
struct device_node *np;
u32 freq;
int irq;
struct resource res;
......@@ -235,12 +242,6 @@ void __init msm_dt_timer_init(void)
void __iomem *base;
void __iomem *cpu0_base;
np = of_find_matching_node(NULL, msm_timer_match);
if (!np) {
pr_err("Can't find msm timer DT node\n");
return;
}
base = of_iomap(np, 0);
if (!base) {
pr_err("Failed to map event base\n");
......@@ -283,6 +284,8 @@ void __init msm_dt_timer_init(void)
msm_timer_init(freq, 32, irq, !!percpu_offset);
}
CLOCKSOURCE_OF_DECLARE(kpss_timer, "qcom,kpss-timer", msm_dt_timer_init);
CLOCKSOURCE_OF_DECLARE(scss_timer, "qcom,scss-timer", msm_dt_timer_init);
#endif
static int __init msm_timer_map(phys_addr_t addr, u32 event, u32 source,
......
......@@ -82,28 +82,11 @@ static int armada_xp_boot_secondary(unsigned int cpu, struct task_struct *idle)
static void __init armada_xp_smp_init_cpus(void)
{
struct device_node *np;
unsigned int i, ncores;
unsigned int ncores = num_possible_cpus();
np = of_find_node_by_name(NULL, "cpus");
if (!np)
panic("No 'cpus' node found\n");
ncores = of_get_child_count(np);
if (ncores == 0 || ncores > ARMADA_XP_MAX_CPUS)
panic("Invalid number of CPUs in DT\n");
/* Limit possible CPUs to defconfig */
if (ncores > nr_cpu_ids) {
pr_warn("SMP: %d CPUs physically present. Only %d configured.",
ncores, nr_cpu_ids);
pr_warn("Clipping CPU count to %d\n", nr_cpu_ids);
ncores = nr_cpu_ids;
}
for (i = 0; i < ncores; i++)
set_cpu_possible(i, true);
set_smp_cross_call(armada_mpic_send_doorbell);
}
......
......@@ -37,9 +37,8 @@ config ARCH_OMAP4
select CACHE_L2X0
select CPU_V7
select HAVE_ARM_SCU if SMP
select HAVE_ARM_TWD if LOCAL_TIMERS
select HAVE_ARM_TWD if SMP
select HAVE_SMP
select LOCAL_TIMERS if SMP
select OMAP_INTERCONNECT
select PL310_ERRATA_588369
select PL310_ERRATA_727915
......
......@@ -21,7 +21,7 @@
#include <linux/clk.h>
#include <linux/platform_device.h>
#include <linux/gpio.h>
#include <linux/i2c/pca953x.h>
#include <linux/platform_data/pca953x.h>
#include <linux/can/platform/ti_hecc.h>
#include <linux/davinci_emac.h>
#include <linux/mmc/host.h>
......
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
......@@ -32,7 +32,6 @@
#include "cm1_54xx.h"
#include "cm2_54xx.h"
#include "prm54xx.h"
#include "prm-regbits-54xx.h"
#include "i2c.h"
#include "mmc.h"
#include "wd_timer.h"
......
......@@ -25,7 +25,6 @@
#include "prcm-common.h"
#include "prcm44xx.h"
#include "prm-regbits-54xx.h"
#include "prm54xx.h"
#include "prcm_mpu54xx.h"
......
......@@ -16,274 +16,27 @@
#include "prm2xxx.h"
/* Bits shared between registers */
/* PRCM_IRQSTATUS_MPU, PM_IRQSTATUS_DSP, PRCM_IRQSTATUS_IVA shared bits */
#define OMAP24XX_VOLTTRANS_ST_MASK (1 << 2)
#define OMAP24XX_WKUP2_ST_MASK (1 << 1)
#define OMAP24XX_WKUP1_ST_MASK (1 << 0)
/* PRCM_IRQENABLE_MPU, PM_IRQENABLE_DSP, PRCM_IRQENABLE_IVA shared bits */
#define OMAP24XX_VOLTTRANS_EN_MASK (1 << 2)
#define OMAP24XX_WKUP2_EN_MASK (1 << 1)
#define OMAP24XX_WKUP1_EN_MASK (1 << 0)
/* PM_WKDEP_GFX, PM_WKDEP_MPU, PM_WKDEP_DSP, PM_WKDEP_MDM shared bits */
#define OMAP24XX_EN_MPU_SHIFT 1
#define OMAP24XX_EN_MPU_MASK (1 << 1)
#define OMAP24XX_EN_CORE_SHIFT 0
#define OMAP24XX_EN_CORE_MASK (1 << 0)
/*
* PM_PWSTCTRL_MPU, PM_PWSTCTRL_GFX, PM_PWSTCTRL_DSP, PM_PWSTCTRL_MDM
* shared bits
*/
#define OMAP24XX_MEMONSTATE_SHIFT 10
#define OMAP24XX_MEMONSTATE_MASK (0x3 << 10)
#define OMAP24XX_MEMRETSTATE_MASK (1 << 3)
/* PM_PWSTCTRL_GFX, PM_PWSTCTRL_DSP, PM_PWSTCTRL_MDM shared bits */
#define OMAP24XX_FORCESTATE_MASK (1 << 18)
/*
* PM_PWSTST_CORE, PM_PWSTST_GFX, PM_PWSTST_MPU, PM_PWSTST_DSP,
* PM_PWSTST_MDM shared bits
*/
#define OMAP24XX_CLKACTIVITY_MASK (1 << 19)
/* PM_PWSTST_MPU, PM_PWSTST_CORE, PM_PWSTST_DSP shared bits */
#define OMAP24XX_LASTSTATEENTERED_SHIFT 4
#define OMAP24XX_LASTSTATEENTERED_MASK (0x3 << 4)
/* PM_PWSTST_MPU and PM_PWSTST_DSP shared bits */
#define OMAP2430_MEMSTATEST_SHIFT 10
#define OMAP2430_MEMSTATEST_MASK (0x3 << 10)
/* PM_PWSTST_GFX, PM_PWSTST_DSP, PM_PWSTST_MDM shared bits */
#define OMAP24XX_POWERSTATEST_SHIFT 0
#define OMAP24XX_POWERSTATEST_MASK (0x3 << 0)
/* Bits specific to each register */
/* PRCM_REVISION */
#define OMAP24XX_REV_SHIFT 0
#define OMAP24XX_REV_MASK (0xff << 0)
/* PRCM_SYSCONFIG */
#define OMAP24XX_AUTOIDLE_MASK (1 << 0)
/* PRCM_IRQSTATUS_MPU specific bits */
#define OMAP2430_DPLL_RECAL_ST_MASK (1 << 6)
#define OMAP24XX_TRANSITION_ST_MASK (1 << 5)
#define OMAP24XX_EVGENOFF_ST_MASK (1 << 4)
#define OMAP24XX_EVGENON_ST_MASK (1 << 3)
/* PRCM_IRQENABLE_MPU specific bits */
#define OMAP2430_DPLL_RECAL_EN_MASK (1 << 6)
#define OMAP24XX_TRANSITION_EN_MASK (1 << 5)
#define OMAP24XX_EVGENOFF_EN_MASK (1 << 4)
#define OMAP24XX_EVGENON_EN_MASK (1 << 3)
/* PRCM_VOLTCTRL */
#define OMAP24XX_AUTO_EXTVOLT_MASK (1 << 15)
#define OMAP24XX_FORCE_EXTVOLT_MASK (1 << 14)
#define OMAP24XX_SETOFF_LEVEL_SHIFT 12
#define OMAP24XX_SETOFF_LEVEL_MASK (0x3 << 12)
#define OMAP24XX_MEMRETCTRL_MASK (1 << 8)
#define OMAP24XX_SETRET_LEVEL_SHIFT 6
#define OMAP24XX_SETRET_LEVEL_MASK (0x3 << 6)
#define OMAP24XX_VOLT_LEVEL_SHIFT 0
#define OMAP24XX_VOLT_LEVEL_MASK (0x3 << 0)
/* PRCM_VOLTST */
#define OMAP24XX_ST_VOLTLEVEL_SHIFT 0
#define OMAP24XX_ST_VOLTLEVEL_MASK (0x3 << 0)
/* PRCM_CLKSRC_CTRL specific bits */
/* PRCM_CLKOUT_CTRL */
#define OMAP2420_CLKOUT2_EN_SHIFT 15
#define OMAP2420_CLKOUT2_EN_MASK (1 << 15)
#define OMAP2420_CLKOUT2_DIV_SHIFT 11
#define OMAP2420_CLKOUT2_DIV_MASK (0x7 << 11)
#define OMAP2420_CLKOUT2_DIV_WIDTH 3
#define OMAP2420_CLKOUT2_SOURCE_SHIFT 8
#define OMAP2420_CLKOUT2_SOURCE_MASK (0x3 << 8)
#define OMAP24XX_CLKOUT_EN_SHIFT 7
#define OMAP24XX_CLKOUT_EN_MASK (1 << 7)
#define OMAP24XX_CLKOUT_DIV_SHIFT 3
#define OMAP24XX_CLKOUT_DIV_MASK (0x7 << 3)
#define OMAP24XX_CLKOUT_DIV_WIDTH 3
#define OMAP24XX_CLKOUT_SOURCE_SHIFT 0
#define OMAP24XX_CLKOUT_SOURCE_MASK (0x3 << 0)
/* PRCM_CLKEMUL_CTRL */
#define OMAP24XX_EMULATION_EN_SHIFT 0
#define OMAP24XX_EMULATION_EN_MASK (1 << 0)
/* PRCM_CLKCFG_CTRL */
#define OMAP24XX_VALID_CONFIG_MASK (1 << 0)
/* PRCM_CLKCFG_STATUS */
#define OMAP24XX_CONFIG_STATUS_MASK (1 << 0)
/* PRCM_VOLTSETUP specific bits */
/* PRCM_CLKSSETUP specific bits */
/* PRCM_POLCTRL */
#define OMAP2420_CLKOUT2_POL_MASK (1 << 10)
#define OMAP24XX_CLKOUT_POL_MASK (1 << 9)
#define OMAP24XX_CLKREQ_POL_MASK (1 << 8)
#define OMAP2430_USE_POWEROK_MASK (1 << 2)
#define OMAP2430_POWEROK_POL_MASK (1 << 1)
#define OMAP24XX_EXTVOL_POL_MASK (1 << 0)
/* RM_RSTST_MPU specific bits */
/* 2430 calls GLOBALWMPU_RST "GLOBALWARM_RST" instead */
/* PM_WKDEP_MPU specific bits */
#define OMAP2430_PM_WKDEP_MPU_EN_MDM_SHIFT 5
#define OMAP2430_PM_WKDEP_MPU_EN_MDM_MASK (1 << 5)
#define OMAP24XX_PM_WKDEP_MPU_EN_DSP_SHIFT 2
#define OMAP24XX_PM_WKDEP_MPU_EN_DSP_MASK (1 << 2)
/* PM_EVGENCTRL_MPU specific bits */
/* PM_EVEGENONTIM_MPU specific bits */
/* PM_EVEGENOFFTIM_MPU specific bits */
/* PM_PWSTCTRL_MPU specific bits */
#define OMAP2430_FORCESTATE_MASK (1 << 18)
/* PM_PWSTST_MPU specific bits */
/* INTRANSITION, CLKACTIVITY, POWERSTATE, MEMSTATEST are 2430 only */
/* PM_WKEN1_CORE specific bits */
/* PM_WKEN2_CORE specific bits */
/* PM_WKST1_CORE specific bits*/
/* PM_WKST2_CORE specific bits */
/* PM_WKDEP_CORE specific bits*/
#define OMAP2430_PM_WKDEP_CORE_EN_MDM_MASK (1 << 5)
#define OMAP24XX_PM_WKDEP_CORE_EN_GFX_MASK (1 << 3)
#define OMAP24XX_PM_WKDEP_CORE_EN_DSP_MASK (1 << 2)
/* PM_PWSTCTRL_CORE specific bits */
#define OMAP24XX_MEMORYCHANGE_MASK (1 << 20)
#define OMAP24XX_MEM3ONSTATE_SHIFT 14
#define OMAP24XX_MEM3ONSTATE_MASK (0x3 << 14)
#define OMAP24XX_MEM2ONSTATE_SHIFT 12
#define OMAP24XX_MEM2ONSTATE_MASK (0x3 << 12)
#define OMAP24XX_MEM1ONSTATE_SHIFT 10
#define OMAP24XX_MEM1ONSTATE_MASK (0x3 << 10)
#define OMAP24XX_MEM3RETSTATE_MASK (1 << 5)
#define OMAP24XX_MEM2RETSTATE_MASK (1 << 4)
#define OMAP24XX_MEM1RETSTATE_MASK (1 << 3)
/* PM_PWSTST_CORE specific bits */
#define OMAP24XX_MEM3STATEST_SHIFT 14
#define OMAP24XX_MEM3STATEST_MASK (0x3 << 14)
#define OMAP24XX_MEM2STATEST_SHIFT 12
#define OMAP24XX_MEM2STATEST_MASK (0x3 << 12)
#define OMAP24XX_MEM1STATEST_SHIFT 10
#define OMAP24XX_MEM1STATEST_MASK (0x3 << 10)
/* RM_RSTCTRL_GFX */
#define OMAP24XX_GFX_RST_MASK (1 << 0)
/* RM_RSTST_GFX specific bits */
#define OMAP24XX_GFX_SW_RST_MASK (1 << 4)
/* PM_PWSTCTRL_GFX specific bits */
/* PM_WKDEP_GFX specific bits */
/* 2430 often calls EN_WAKEUP "EN_WKUP" */
/* RM_RSTCTRL_WKUP specific bits */
/* RM_RSTTIME_WKUP specific bits */
/* RM_RSTST_WKUP specific bits */
/* 2430 calls EXTWMPU_RST "EXTWARM_RST" and GLOBALWMPU_RST "GLOBALWARM_RST" */
#define OMAP24XX_EXTWMPU_RST_SHIFT 6
#define OMAP24XX_EXTWMPU_RST_MASK (1 << 6)
#define OMAP24XX_SECU_WD_RST_SHIFT 5
#define OMAP24XX_SECU_WD_RST_MASK (1 << 5)
#define OMAP24XX_MPU_WD_RST_SHIFT 4
#define OMAP24XX_MPU_WD_RST_MASK (1 << 4)
#define OMAP24XX_SECU_VIOL_RST_SHIFT 3
#define OMAP24XX_SECU_VIOL_RST_MASK (1 << 3)
/* PM_WKEN_WKUP specific bits */
/* PM_WKST_WKUP specific bits */
/* RM_RSTCTRL_DSP */
#define OMAP2420_RST_IVA_MASK (1 << 8)
#define OMAP24XX_RST2_DSP_MASK (1 << 1)
#define OMAP24XX_RST1_DSP_MASK (1 << 0)
/* RM_RSTST_DSP specific bits */
/* 2430 calls GLOBALWMPU_RST "GLOBALWARM_RST" */
#define OMAP2420_IVA_SW_RST_MASK (1 << 8)
#define OMAP24XX_DSP_SW_RST2_MASK (1 << 5)
#define OMAP24XX_DSP_SW_RST1_MASK (1 << 4)
/* PM_WKDEP_DSP specific bits */
/* PM_PWSTCTRL_DSP specific bits */
/* 2430 only: MEMONSTATE, MEMRETSTATE */
#define OMAP2420_MEMIONSTATE_SHIFT 12
#define OMAP2420_MEMIONSTATE_MASK (0x3 << 12)
#define OMAP2420_MEMIRETSTATE_MASK (1 << 4)
/* PM_PWSTST_DSP specific bits */
/* MEMSTATEST is 2430 only */
#define OMAP2420_MEMISTATEST_SHIFT 12
#define OMAP2420_MEMISTATEST_MASK (0x3 << 12)
/* PRCM_IRQSTATUS_DSP specific bits */
/* PRCM_IRQENABLE_DSP specific bits */
/* RM_RSTCTRL_MDM */
/* 2430 only */
#define OMAP2430_PWRON1_MDM_MASK (1 << 1)
#define OMAP2430_RST1_MDM_MASK (1 << 0)
/* RM_RSTST_MDM specific bits */
/* 2430 only */
#define OMAP2430_MDM_SECU_VIOL_MASK (1 << 6)
#define OMAP2430_MDM_SW_PWRON1_MASK (1 << 5)
#define OMAP2430_MDM_SW_RST1_MASK (1 << 4)
/* PM_WKEN_MDM */
/* 2430 only */
#define OMAP2430_PM_WKEN_MDM_EN_MDM_MASK (1 << 0)
/* PM_WKST_MDM specific bits */
/* 2430 only */
/* PM_WKDEP_MDM specific bits */
/* 2430 only */
/* PM_PWSTCTRL_MDM specific bits */
/* 2430 only */
#define OMAP2430_KILLDOMAINWKUP_MASK (1 << 19)
/* PM_PWSTST_MDM specific bits */
/* 2430 only */
/* PRCM_IRQSTATUS_IVA */
/* 2420 only */
/* PRCM_IRQENABLE_IVA */
/* 2420 only */
#endif
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
......@@ -600,7 +600,7 @@ static OMAP_SYS_32K_TIMER_INIT(4, 1, "timer_32k_ck", "ti,timer-alwon",
#endif
#ifdef CONFIG_ARCH_OMAP4
#ifdef CONFIG_LOCAL_TIMERS
#ifdef CONFIG_HAVE_ARM_TWD
static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, OMAP44XX_LOCAL_TWD_BASE, 29);
void __init omap4_local_timer_init(void)
{
......@@ -619,12 +619,12 @@ void __init omap4_local_timer_init(void)
pr_err("twd_local_timer_register failed %d\n", err);
}
}
#else /* CONFIG_LOCAL_TIMERS */
#else
void __init omap4_local_timer_init(void)
{
omap4_sync32k_timer_init();
}
#endif /* CONFIG_LOCAL_TIMERS */
#endif /* CONFIG_HAVE_ARM_TWD */
#endif /* CONFIG_ARCH_OMAP4 */
#ifdef CONFIG_SOC_OMAP5
......
......@@ -29,7 +29,7 @@
#include <linux/pwm_backlight.h>
#include <linux/i2c.h>
#include <linux/i2c/pca953x.h>
#include <linux/platform_data/pca953x.h>
#include <linux/i2c/pxa-i2c.h>
#include <linux/mfd/da903x.h>
......
......@@ -30,7 +30,7 @@
#include <linux/power_supply.h>
#include <linux/apm-emulation.h>
#include <linux/i2c.h>
#include <linux/i2c/pca953x.h>
#include <linux/platform_data/pca953x.h>
#include <linux/i2c/pxa-i2c.h>
#include <linux/regulator/userspace-consumer.h>
......
......@@ -408,7 +408,7 @@ struct pxacamera_platform_data pcm990_pxacamera_platform_data = {
.mclk_10khz = 1000,
};
#include <linux/i2c/pca953x.h>
#include <linux/platform_data/pca953x.h>
static struct pca953x_platform_data pca9536_data = {
.gpio_base = PXA_NR_BUILTIN_GPIO,
......
......@@ -20,7 +20,7 @@
#include <linux/leds.h>
#include <linux/i2c.h>
#include <linux/i2c/pxa-i2c.h>
#include <linux/i2c/pca953x.h>
#include <linux/platform_data/pca953x.h>
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
#include <linux/spi/corgi_lcd.h>
......
......@@ -26,7 +26,7 @@
#include <linux/mtd/physmap.h>
#include <linux/i2c.h>
#include <linux/i2c/pxa-i2c.h>
#include <linux/i2c/pca953x.h>
#include <linux/platform_data/pca953x.h>
#include <linux/apm-emulation.h>
#include <linux/can/platform/mcp251x.h>
#include <linux/regulator/fixed.h>
......
......@@ -18,7 +18,7 @@
#include <linux/init.h>
#include <linux/i2c.h>
#include <linux/i2c/pxa-i2c.h>
#include <linux/i2c/pca953x.h>
#include <linux/platform_data/pca953x.h>
#include <linux/gpio.h>
#include <mach/pxa300.h>
......
......@@ -13,7 +13,7 @@ config REALVIEW_EB_A9MP
depends on MACH_REALVIEW_EB
select CPU_V7
select HAVE_ARM_SCU if SMP
select HAVE_ARM_TWD if LOCAL_TIMERS
select HAVE_ARM_TWD if SMP
select HAVE_SMP
select MIGHT_HAVE_CACHE_L2X0
help
......@@ -26,7 +26,7 @@ config REALVIEW_EB_ARM11MP
select ARCH_HAS_BARRIERS if SMP
select CPU_V6K
select HAVE_ARM_SCU if SMP
select HAVE_ARM_TWD if LOCAL_TIMERS
select HAVE_ARM_TWD if SMP
select HAVE_SMP
select MIGHT_HAVE_CACHE_L2X0
help
......@@ -48,7 +48,7 @@ config MACH_REALVIEW_PB11MP
select ARM_GIC
select CPU_V6K
select HAVE_ARM_SCU if SMP
select HAVE_ARM_TWD if LOCAL_TIMERS
select HAVE_ARM_TWD if SMP
select HAVE_PATA_PLATFORM
select HAVE_SMP
select MIGHT_HAVE_CACHE_L2X0
......@@ -92,7 +92,7 @@ config MACH_REALVIEW_PBX
select ARCH_SPARSEMEM_ENABLE if CPU_V7 && !REALVIEW_HIGH_PHYS_OFFSET
select ARM_GIC
select HAVE_ARM_SCU if SMP
select HAVE_ARM_TWD if LOCAL_TIMERS
select HAVE_ARM_TWD if SMP
select HAVE_PATA_PLATFORM
select HAVE_SMP
select MIGHT_HAVE_CACHE_L2X0
......
......@@ -30,7 +30,6 @@ config CPU_S3C2410
select S3C2410_CLOCK
select ARM_S3C2410_CPUFREQ if ARM_S3C24XX_CPUFREQ
select S3C2410_PM if PM
select SAMSUNG_HRT
select SAMSUNG_WDT_RESET
help
Support for S3C2410 and S3C2410A family from the S3C24XX line
......@@ -42,7 +41,6 @@ config CPU_S3C2412
select CPU_LLSERIAL_S3C2440
select S3C2412_DMA if S3C24XX_DMA
select S3C2412_PM if PM
select SAMSUNG_HRT
help
Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line
......@@ -54,7 +52,6 @@ config CPU_S3C2416
select S3C2443_COMMON
select S3C2443_DMA if S3C24XX_DMA
select SAMSUNG_CLKSRC
select SAMSUNG_HRT
help
Support for the S3C2416 SoC from the S3C24XX line
......@@ -65,7 +62,6 @@ config CPU_S3C2440
select S3C2410_CLOCK
select S3C2410_PM if PM
select S3C2440_DMA if S3C24XX_DMA
select SAMSUNG_HRT
help
Support for S3C2440 Samsung Mobile CPU based systems.
......@@ -75,7 +71,6 @@ config CPU_S3C2442
select CPU_LLSERIAL_S3C2440
select S3C2410_CLOCK
select S3C2410_PM if PM
select SAMSUNG_HRT
help
Support for S3C2442 Samsung Mobile CPU based systems.
......@@ -91,7 +86,6 @@ config CPU_S3C2443
select S3C2443_COMMON
select S3C2443_DMA if S3C24XX_DMA
select SAMSUNG_CLKSRC
select SAMSUNG_HRT
help
Support for the S3C2443 SoC from the S3C24XX line
......
......@@ -281,6 +281,5 @@ int __init s3c2410_baseclk_add(void)
(clkslow & S3C2410_CLKSLOW_MPLL_OFF) ? "off" : "on",
(clkslow & S3C2410_CLKSLOW_UCLK_OFF) ? "off" : "on");
s3c_pwmclk_init();
return 0;
}
......@@ -757,6 +757,5 @@ int __init s3c2412_baseclk_add(void)
}
clkdev_add_table(s3c2412_clk_lookup, ARRAY_SIZE(s3c2412_clk_lookup));
s3c_pwmclk_init();
return 0;
}
......@@ -168,6 +168,4 @@ void __init s3c2416_init_clocks(int xtal)
s3c24xx_register_clock(&hsmmc0_clk);
clkdev_add_table(s3c2416_clk_lookup, ARRAY_SIZE(s3c2416_clk_lookup));
s3c_pwmclk_init();
}
......@@ -209,6 +209,4 @@ void __init s3c2443_init_clocks(int xtal)
s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
clkdev_add_table(s3c2443_clk_lookup, ARRAY_SIZE(s3c2443_clk_lookup));
s3c_pwmclk_init();
}
This diff is collapsed.
......@@ -167,4 +167,6 @@
#define S3C_PA_SPI0 S3C2443_PA_SPI0
#define S3C_PA_SPI1 S3C2443_PA_SPI1
#define SAMSUNG_PA_TIMER S3C2410_PA_TIMER
#endif /* __ASM_ARCH_MAP_H */
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment