Commit 9110ee07 authored by Marcin Wojtas's avatar Marcin Wojtas Committed by David S. Miller

net: mvneta: enable setting custom TX IP checksum limit

Since Armada 38x SoC can support IP checksum for jumbo frames only on
a single port, it means that this feature should be enabled per-port,
rather than for the whole SoC.

This patch enables setting custom TX IP checksum limit by adding new
optional property to the mvneta device tree node. If not used, by
default 1600B is set for "marvell,armada-370-neta" and 9800B for other
strings, which ensures backward compatibility. Binding documentation
is updated accordingly.
Signed-off-by: default avatarMarcin Wojtas <mw@semihalf.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 26c17a17
...@@ -8,6 +8,11 @@ Required properties: ...@@ -8,6 +8,11 @@ Required properties:
- phy-mode: See ethernet.txt file in the same directory - phy-mode: See ethernet.txt file in the same directory
- clocks: a pointer to the reference clock for this device. - clocks: a pointer to the reference clock for this device.
Optional properties:
- tx-csum-limit: maximum mtu supported by port that allow TX checksum.
Value is presented in bytes. If not used, by default 1600B is set for
"marvell,armada-370-neta" and 9800B for others.
Example: Example:
ethernet@d0070000 { ethernet@d0070000 {
...@@ -15,6 +20,7 @@ ethernet@d0070000 { ...@@ -15,6 +20,7 @@ ethernet@d0070000 {
reg = <0xd0070000 0x2500>; reg = <0xd0070000 0x2500>;
interrupts = <8>; interrupts = <8>;
clocks = <&gate_clk 4>; clocks = <&gate_clk 4>;
tx-csum-limit = <9800>
status = "okay"; status = "okay";
phy = <&phy0>; phy = <&phy0>;
phy-mode = "rgmii-id"; phy-mode = "rgmii-id";
......
...@@ -243,6 +243,7 @@ ...@@ -243,6 +243,7 @@
#define MVNETA_VLAN_TAG_LEN 4 #define MVNETA_VLAN_TAG_LEN 4
#define MVNETA_CPU_D_CACHE_LINE_SIZE 32 #define MVNETA_CPU_D_CACHE_LINE_SIZE 32
#define MVNETA_TX_CSUM_DEF_SIZE 1600
#define MVNETA_TX_CSUM_MAX_SIZE 9800 #define MVNETA_TX_CSUM_MAX_SIZE 9800
#define MVNETA_ACC_MODE_EXT 1 #define MVNETA_ACC_MODE_EXT 1
...@@ -3256,6 +3257,7 @@ static int mvneta_probe(struct platform_device *pdev) ...@@ -3256,6 +3257,7 @@ static int mvneta_probe(struct platform_device *pdev)
char hw_mac_addr[ETH_ALEN]; char hw_mac_addr[ETH_ALEN];
const char *mac_from; const char *mac_from;
const char *managed; const char *managed;
int tx_csum_limit;
int phy_mode; int phy_mode;
int err; int err;
int cpu; int cpu;
...@@ -3356,8 +3358,21 @@ static int mvneta_probe(struct platform_device *pdev) ...@@ -3356,8 +3358,21 @@ static int mvneta_probe(struct platform_device *pdev)
} }
} }
if (of_device_is_compatible(dn, "marvell,armada-370-neta")) if (!of_property_read_u32(dn, "tx-csum-limit", &tx_csum_limit)) {
pp->tx_csum_limit = 1600; if (tx_csum_limit < 0 ||
tx_csum_limit > MVNETA_TX_CSUM_MAX_SIZE) {
tx_csum_limit = MVNETA_TX_CSUM_DEF_SIZE;
dev_info(&pdev->dev,
"Wrong TX csum limit in DT, set to %dB\n",
MVNETA_TX_CSUM_DEF_SIZE);
}
} else if (of_device_is_compatible(dn, "marvell,armada-370-neta")) {
tx_csum_limit = MVNETA_TX_CSUM_DEF_SIZE;
} else {
tx_csum_limit = MVNETA_TX_CSUM_MAX_SIZE;
}
pp->tx_csum_limit = tx_csum_limit;
pp->tx_ring_size = MVNETA_MAX_TXD; pp->tx_ring_size = MVNETA_MAX_TXD;
pp->rx_ring_size = MVNETA_MAX_RXD; pp->rx_ring_size = MVNETA_MAX_RXD;
......
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