Commit 914311c9 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'pinctrl-for-v3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control changes from Linus Walleij:
 "These are the accumulated pin control patches for v3.6:
   - Various cleanups to the U300 driver
   - Refactor the pin control core to automatically remove any GPIO
     ranges when the drivers are removed, instead of having the drivers
     do this explicitly.
   - Add a function for registering a batch of GPIO ranges.
   - Fix a number of incorrect but non-regressive error checks.
   - Incremental improvements to the COH901, i.MX and Nomadik drivers
   - Add a one-register-per-pin entirely Device Tree-based pin control
     driver from Tony Lindgren."

* tag 'pinctrl-for-v3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
  pinctrl: Add one-register-per-pin type device tree based pinctrl driver
  pinctrl/nomadik: add spi2_oc1_2 pin group
  pinctrl/nomadik: kerneldoc fix
  pinctrl/nomadik: use devm_* allocators for gpio probe
  pinctrl/nomadik: add pin group to mco function
  pinctrl/nomadik: add hsit_a_2 pin group
  pinctrl/nomadik: add pin group smcs1 and smps0
  pinctrl/nomadik: fix hsir_a_1_pins pin list
  pinctrl: pinctrl-imx: fix map setting problem if NO_PAD_CTL is set
  pinctrl/coh901: use clk_prepare_[en|dis]able()
  pinctrl/pinctrl-tegra: remove IS_ERR checking of pmx->pctl
  pinctrl/pinctrl-spear: remove IS_ERR checking of pmx->pctl
  pinctrl/u300: drop unused variable
  pinctrl: select the proper symbol
  pinctrl: add pinctrl_add_gpio_ranges function
  pinctrl: remove pinctrl_remove_gpio_range
  pinctrl/pinctrl-core: cleanup pinctrl_register
  pinctrl/u300: delete pointless debug print
  pinctrl/pinctrl-u300: remove devm_kfree at driver unload
parents 5dedb9f3 8b8b091b
One-register-per-pin type device tree based pinctrl driver
Required properties:
- compatible : "pinctrl-single"
- reg : offset and length of the register set for the mux registers
- pinctrl-single,register-width : pinmux register access width in bits
- pinctrl-single,function-mask : mask of allowed pinmux function bits
in the pinmux register
Optional properties:
- pinctrl-single,function-off : function off mode for disabled state if
available and same for all registers; if not specified, disabling of
pin functions is ignored
This driver assumes that there is only one register for each pin,
and uses the common pinctrl bindings as specified in the pinctrl-bindings.txt
document in this directory.
The pin configuration nodes for pinctrl-single are specified as pinctrl
register offset and value pairs using pinctrl-single,pins. Only the bits
specified in pinctrl-single,function-mask are updated. For example, setting
a pin for a device could be done with:
pinctrl-single,pins = <0xdc 0x118>;
Where 0xdc is the offset from the pinctrl register base address for the
device pinctrl register, and 0x118 contains the desired value of the
pinctrl register. See the device example and static board pins example
below for more information.
Example:
/* SoC common file */
/* first controller instance for pins in core domain */
pmx_core: pinmux@4a100040 {
compatible = "pinctrl-single";
reg = <0x4a100040 0x0196>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-single,register-width = <16>;
pinctrl-single,function-mask = <0xffff>;
};
/* second controller instance for pins in wkup domain */
pmx_wkup: pinmux@4a31e040 {
compatible = "pinctrl-single;
reg = <0x4a31e040 0x0038>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-single,register-width = <16>;
pinctrl-single,function-mask = <0xffff>;
};
/* board specific .dts file */
&pmx_core {
/*
* map all board specific static pins enabled by the pinctrl driver
* itself during the boot (or just set them up in the bootloader)
*/
pinctrl-names = "default";
pinctrl-0 = <&board_pins>;
board_pins: pinmux_board_pins {
pinctrl-single,pins = <
0x6c 0xf
0x6e 0xf
0x70 0xf
0x72 0xf
>;
};
/* map uart2 pins */
uart2_pins: pinmux_uart2_pins {
pinctrl-single,pins = <
0xd8 0x118
0xda 0
0xdc 0x118
0xde 0
>;
};
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
};
......@@ -102,6 +102,14 @@ config PINCTRL_PXA910
select PINCTRL_PXA3xx
select PINCONF
config PINCTRL_SINGLE
tristate "One-register-per-pin type device tree based pinctrl driver"
depends on OF
select PINMUX
select PINCONF
help
This selects the device tree based generic pinctrl driver.
config PINCTRL_SIRF
bool "CSR SiRFprimaII pin controller driver"
depends on ARCH_PRIMA2
......@@ -130,7 +138,7 @@ config PINCTRL_U300
config PINCTRL_COH901
bool "ST-Ericsson U300 COH 901 335/571 GPIO"
depends on GPIOLIB && ARCH_U300 && PINMUX_U300
depends on GPIOLIB && ARCH_U300 && PINCTRL_U300
help
Say yes here to support GPIO interface on ST-Ericsson U300.
The names of the two IP block variants supported are
......
......@@ -22,6 +22,7 @@ obj-$(CONFIG_PINCTRL_NOMADIK) += pinctrl-nomadik.o
obj-$(CONFIG_PINCTRL_DB8500) += pinctrl-nomadik-db8500.o
obj-$(CONFIG_PINCTRL_PXA168) += pinctrl-pxa168.o
obj-$(CONFIG_PINCTRL_PXA910) += pinctrl-pxa910.o
obj-$(CONFIG_PINCTRL_SINGLE) += pinctrl-single.o
obj-$(CONFIG_PINCTRL_SIRF) += pinctrl-sirf.o
obj-$(CONFIG_PINCTRL_TEGRA) += pinctrl-tegra.o
obj-$(CONFIG_PINCTRL_TEGRA20) += pinctrl-tegra20.o
......
......@@ -332,19 +332,16 @@ void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev,
}
EXPORT_SYMBOL_GPL(pinctrl_add_gpio_range);
/**
* pinctrl_remove_gpio_range() - remove a range of GPIOs fro a pin controller
* @pctldev: pin controller device to remove the range from
* @range: the GPIO range to remove
*/
void pinctrl_remove_gpio_range(struct pinctrl_dev *pctldev,
struct pinctrl_gpio_range *range)
void pinctrl_add_gpio_ranges(struct pinctrl_dev *pctldev,
struct pinctrl_gpio_range *ranges,
unsigned nranges)
{
mutex_lock(&pinctrl_mutex);
list_del(&range->node);
mutex_unlock(&pinctrl_mutex);
int i;
for (i = 0; i < nranges; i++)
pinctrl_add_gpio_range(pctldev, &ranges[i]);
}
EXPORT_SYMBOL_GPL(pinctrl_remove_gpio_range);
EXPORT_SYMBOL_GPL(pinctrl_add_gpio_ranges);
/**
* pinctrl_get_group_selector() - returns the group selector for a group
......@@ -1395,9 +1392,9 @@ struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc,
struct pinctrl_dev *pctldev;
int ret;
if (pctldesc == NULL)
if (!pctldesc)
return NULL;
if (pctldesc->name == NULL)
if (!pctldesc->name)
return NULL;
pctldev = kzalloc(sizeof(*pctldev), GFP_KERNEL);
......@@ -1415,23 +1412,20 @@ struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc,
pctldev->dev = dev;
/* check core ops for sanity */
ret = pinctrl_check_ops(pctldev);
if (ret) {
if (pinctrl_check_ops(pctldev)) {
dev_err(dev, "pinctrl ops lacks necessary functions\n");
goto out_err;
}
/* If we're implementing pinmuxing, check the ops for sanity */
if (pctldesc->pmxops) {
ret = pinmux_check_ops(pctldev);
if (ret)
if (pinmux_check_ops(pctldev))
goto out_err;
}
/* If we're implementing pinconfig, check the ops for sanity */
if (pctldesc->confops) {
ret = pinconf_check_ops(pctldev);
if (ret)
if (pinconf_check_ops(pctldev))
goto out_err;
}
......@@ -1457,13 +1451,11 @@ struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc,
if (IS_ERR(s)) {
dev_dbg(dev, "failed to lookup the default state\n");
} else {
ret = pinctrl_select_state_locked(pctldev->p, s);
if (ret) {
if (pinctrl_select_state_locked(pctldev->p, s))
dev_err(dev,
"failed to select default state\n");
}
}
}
mutex_unlock(&pinctrl_mutex);
......@@ -1485,6 +1477,7 @@ EXPORT_SYMBOL_GPL(pinctrl_register);
*/
void pinctrl_unregister(struct pinctrl_dev *pctldev)
{
struct pinctrl_gpio_range *range, *n;
if (pctldev == NULL)
return;
......@@ -1500,6 +1493,10 @@ void pinctrl_unregister(struct pinctrl_dev *pctldev)
/* Destroy descriptor tree */
pinctrl_free_pindescs(pctldev, pctldev->desc->pins,
pctldev->desc->npins);
/* remove gpio ranges map */
list_for_each_entry_safe(range, n, &pctldev->gpio_ranges, node)
list_del(&range->node);
kfree(pctldev);
mutex_unlock(&pinctrl_mutex);
......
......@@ -770,7 +770,7 @@ static int __init u300_gpio_probe(struct platform_device *pdev)
dev_err(gpio->dev, "could not get GPIO clock\n");
goto err_no_clk;
}
err = clk_enable(gpio->clk);
err = clk_prepare_enable(gpio->clk);
if (err) {
dev_err(gpio->dev, "could not enable GPIO clock\n");
goto err_no_clk_enable;
......@@ -912,7 +912,7 @@ static int __init u300_gpio_probe(struct platform_device *pdev)
release_mem_region(gpio->memres->start, resource_size(gpio->memres));
err_no_ioregion:
err_no_resource:
clk_disable(gpio->clk);
clk_disable_unprepare(gpio->clk);
err_no_clk_enable:
clk_put(gpio->clk);
err_no_clk:
......@@ -943,7 +943,7 @@ static int __exit u300_gpio_remove(struct platform_device *pdev)
iounmap(gpio->base);
release_mem_region(gpio->memres->start,
resource_size(gpio->memres));
clk_disable(gpio->clk);
clk_disable_unprepare(gpio->clk);
clk_put(gpio->clk);
platform_set_drvdata(pdev, NULL);
kfree(gpio);
......
......@@ -146,7 +146,7 @@ static int imx_dt_node_to_map(struct pinctrl_dev *pctldev,
struct pinctrl_map *new_map;
struct device_node *parent;
int map_num = 1;
int i;
int i, j;
/*
* first find the group of this node and check if we need create
......@@ -184,13 +184,14 @@ static int imx_dt_node_to_map(struct pinctrl_dev *pctldev,
/* create config map */
new_map++;
for (i = 0; i < grp->npins; i++) {
for (i = j = 0; i < grp->npins; i++) {
if (!(grp->configs[i] & IMX_NO_PAD_CTL)) {
new_map[i].type = PIN_MAP_TYPE_CONFIGS_PIN;
new_map[i].data.configs.group_or_pin =
new_map[j].type = PIN_MAP_TYPE_CONFIGS_PIN;
new_map[j].data.configs.group_or_pin =
pin_get_name(pctldev, grp->pins[i]);
new_map[i].data.configs.configs = &grp->configs[i];
new_map[i].data.configs.num_configs = 1;
new_map[j].data.configs.configs = &grp->configs[i];
new_map[j].data.configs.num_configs = 1;
j++;
}
}
......
......@@ -467,9 +467,12 @@ static const unsigned mc1_a_1_pins[] = { DB8500_PIN_AH16, DB8500_PIN_AG15,
DB8500_PIN_AH15 };
static const unsigned mc1dir_a_1_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AG12,
DB8500_PIN_AH12, DB8500_PIN_AH11 };
static const unsigned hsir_a_1_pins[] = { DB8500_PIN_AG10, DB8500_PIN_AH10 };
static const unsigned hsit_a_1_pins[] = { DB8500_PIN_AJ11, DB8500_PIN_AJ9,
DB8500_PIN_AH9, DB8500_PIN_AG9, DB8500_PIN_AG8, DB8500_PIN_AF8 };
static const unsigned hsir_a_1_pins[] = { DB8500_PIN_AG10, DB8500_PIN_AH10,
DB8500_PIN_AJ11 };
static const unsigned hsit_a_1_pins[] = { DB8500_PIN_AJ9, DB8500_PIN_AH9,
DB8500_PIN_AG9, DB8500_PIN_AG8, DB8500_PIN_AF8 };
static const unsigned hsit_a_2_pins[] = { DB8500_PIN_AJ9, DB8500_PIN_AH9,
DB8500_PIN_AG9, DB8500_PIN_AG8 };
static const unsigned clkout_a_1_pins[] = { DB8500_PIN_AH7, DB8500_PIN_AJ6 };
static const unsigned clkout_a_2_pins[] = { DB8500_PIN_AG7, DB8500_PIN_AF7 };
static const unsigned usb_a_1_pins[] = { DB8500_PIN_AF28, DB8500_PIN_AE29,
......@@ -508,9 +511,11 @@ static const unsigned sm_b_1_pins[] = { DB8500_PIN_C6, DB8500_PIN_B3,
DB8500_PIN_D9, DB8500_PIN_A5, DB8500_PIN_B4, DB8500_PIN_C8,
DB8500_PIN_A12, DB8500_PIN_C10, DB8500_PIN_B10, DB8500_PIN_B9,
DB8500_PIN_A9, DB8500_PIN_C7, DB8500_PIN_A7, DB8500_PIN_C5,
DB8500_PIN_C9, DB8500_PIN_B14 };
/* This chip select pin can be "ps0" in alt B so have it separately */
DB8500_PIN_C9 };
/* This chip select pin can be "ps0" in alt C so have it separately */
static const unsigned smcs0_b_1_pins[] = { DB8500_PIN_E8 };
/* This chip select pin can be "ps1" in alt C so have it separately */
static const unsigned smcs1_b_1_pins[] = { DB8500_PIN_B14 };
static const unsigned ipgpio7_b_1_pins[] = { DB8500_PIN_B11 };
static const unsigned ipgpio2_b_1_pins[] = { DB8500_PIN_C12 };
static const unsigned ipgpio3_b_1_pins[] = { DB8500_PIN_C11 };
......@@ -572,6 +577,7 @@ static const unsigned mc2rstn_c_1_pins[] = { DB8500_PIN_C8 };
static const unsigned kp_c_1_pins[] = { DB8500_PIN_C9, DB8500_PIN_B11,
DB8500_PIN_C12, DB8500_PIN_C11, DB8500_PIN_D17, DB8500_PIN_D16,
DB8500_PIN_C23, DB8500_PIN_D23 };
static const unsigned smps0_c_1_pins[] = { DB8500_PIN_E8 };
static const unsigned smps1_c_1_pins[] = { DB8500_PIN_B14 };
static const unsigned u2rxtx_c_3_pins[] = { DB8500_PIN_B17, DB8500_PIN_C16 };
static const unsigned stmape_c_2_pins[] = { DB8500_PIN_C19, DB8500_PIN_C17,
......@@ -595,6 +601,8 @@ static const unsigned kp_oc1_1_pins[] = { DB8500_PIN_C6, DB8500_PIN_B3,
DB8500_PIN_D6, DB8500_PIN_B7 };
static const unsigned spi2_oc1_1_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AG12,
DB8500_PIN_AH12, DB8500_PIN_AH11 };
static const unsigned spi2_oc1_2_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AH12,
DB8500_PIN_AH11 };
#define DB8500_PIN_GROUP(a,b) { .name = #a, .pins = a##_pins, \
.npins = ARRAY_SIZE(a##_pins), .altsetting = b }
......@@ -610,6 +618,8 @@ static const struct nmk_pingroup nmk_db8500_groups[] = {
DB8500_PIN_GROUP(msp0tfstck_a_1, NMK_GPIO_ALT_A),
DB8500_PIN_GROUP(msp0rfsrck_a_1, NMK_GPIO_ALT_A),
DB8500_PIN_GROUP(mc0_a_1, NMK_GPIO_ALT_A),
DB8500_PIN_GROUP(mc0_dat47_a_1, NMK_GPIO_ALT_A),
DB8500_PIN_GROUP(mc0dat31dir_a_1, NMK_GPIO_ALT_A),
DB8500_PIN_GROUP(msp1txrx_a_1, NMK_GPIO_ALT_A),
DB8500_PIN_GROUP(msp1_a_1, NMK_GPIO_ALT_A),
DB8500_PIN_GROUP(lcdb_a_1, NMK_GPIO_ALT_A),
......@@ -631,6 +641,7 @@ static const struct nmk_pingroup nmk_db8500_groups[] = {
DB8500_PIN_GROUP(mc1_a_1, NMK_GPIO_ALT_A),
DB8500_PIN_GROUP(hsir_a_1, NMK_GPIO_ALT_A),
DB8500_PIN_GROUP(hsit_a_1, NMK_GPIO_ALT_A),
DB8500_PIN_GROUP(hsit_a_2, NMK_GPIO_ALT_A),
DB8500_PIN_GROUP(clkout_a_1, NMK_GPIO_ALT_A),
DB8500_PIN_GROUP(clkout_a_2, NMK_GPIO_ALT_A),
DB8500_PIN_GROUP(usb_a_1, NMK_GPIO_ALT_A),
......@@ -653,6 +664,7 @@ static const struct nmk_pingroup nmk_db8500_groups[] = {
DB8500_PIN_GROUP(kp_b_1, NMK_GPIO_ALT_B),
DB8500_PIN_GROUP(sm_b_1, NMK_GPIO_ALT_B),
DB8500_PIN_GROUP(smcs0_b_1, NMK_GPIO_ALT_B),
DB8500_PIN_GROUP(smcs1_b_1, NMK_GPIO_ALT_B),
DB8500_PIN_GROUP(ipgpio7_b_1, NMK_GPIO_ALT_B),
DB8500_PIN_GROUP(ipgpio2_b_1, NMK_GPIO_ALT_B),
DB8500_PIN_GROUP(ipgpio3_b_1, NMK_GPIO_ALT_B),
......@@ -693,6 +705,7 @@ static const struct nmk_pingroup nmk_db8500_groups[] = {
DB8500_PIN_GROUP(mc5_c_1, NMK_GPIO_ALT_C),
DB8500_PIN_GROUP(mc2rstn_c_1, NMK_GPIO_ALT_C),
DB8500_PIN_GROUP(kp_c_1, NMK_GPIO_ALT_C),
DB8500_PIN_GROUP(smps0_c_1, NMK_GPIO_ALT_C),
DB8500_PIN_GROUP(smps1_c_1, NMK_GPIO_ALT_C),
DB8500_PIN_GROUP(u2rxtx_c_3, NMK_GPIO_ALT_C),
DB8500_PIN_GROUP(stmape_c_2, NMK_GPIO_ALT_C),
......@@ -709,6 +722,7 @@ static const struct nmk_pingroup nmk_db8500_groups[] = {
/* Other alt C1 column, these are still configured as alt C */
DB8500_PIN_GROUP(kp_oc1_1, NMK_GPIO_ALT_C),
DB8500_PIN_GROUP(spi2_oc1_1, NMK_GPIO_ALT_C),
DB8500_PIN_GROUP(spi2_oc1_2, NMK_GPIO_ALT_C),
};
/* We use this macro to define the groups applicable to a function */
......@@ -731,7 +745,7 @@ DB8500_FUNC_GROUPS(ipi2c, "ipi2c_a_1", "ipi2c_a_2");
*/
DB8500_FUNC_GROUPS(msp0, "msp0txrx_a_1", "msp0tfstck_a_1", "msp0rfstck_a_1",
"msp0txrx_b_1", "msp0sck_b_1");
DB8500_FUNC_GROUPS(mc0, "mc0_a_1");
DB8500_FUNC_GROUPS(mc0, "mc0_a_1", "mc0_dat47_a_1", "mc0dat31dir_a_1");
/* MSP0 can swap RX/TX like MSP0 but has no SCK pin available */
DB8500_FUNC_GROUPS(msp1, "msp1txrx_a_1", "msp1_a_1", "msp1txrx_b_1");
DB8500_FUNC_GROUPS(lcdb, "lcdb_a_1");
......@@ -752,7 +766,7 @@ DB8500_FUNC_GROUPS(ipgpio, "ipgpio0_a_1", "ipgpio1_a_1", "ipgpio7_b_1",
DB8500_FUNC_GROUPS(msp2, "msp2sck_a_1", "msp2_a_1");
DB8500_FUNC_GROUPS(mc4, "mc4_a_1", "mc4rstn_c_1");
DB8500_FUNC_GROUPS(mc1, "mc1_a_1", "mc1dir_a_1");
DB8500_FUNC_GROUPS(hsi, "hsir1_a_1", "hsit1_a_1");
DB8500_FUNC_GROUPS(hsi, "hsir1_a_1", "hsit1_a_1", "hsit_a_2");
DB8500_FUNC_GROUPS(clkout, "clkout_a_1", "clkout_a_2", "clkout_c_1");
DB8500_FUNC_GROUPS(usb, "usb_a_1");
DB8500_FUNC_GROUPS(trig, "trig_b_1");
......@@ -768,7 +782,8 @@ DB8500_FUNC_GROUPS(uartmod, "uartmodtx_b_1", "uartmodrx_b_1", "uartmodrx_b_2",
DB8500_FUNC_GROUPS(stmmod, "stmmod_b_1", "stmmod_c_1");
DB8500_FUNC_GROUPS(spi3, "spi3_b_1");
/* Select between CS0 on alt B or PS1 on alt C */
DB8500_FUNC_GROUPS(sm, "sm_b_1", "smcs0_b_1", "smcleale_c_1", "smps1_c_1");
DB8500_FUNC_GROUPS(sm, "sm_b_1", "smcs0_b_1", "smcs1_b_1", "smcleale_c_1",
"smps0_c_1", "smps1_c_1");
DB8500_FUNC_GROUPS(lcda, "lcdaclk_b_1", "lcda_b_1");
DB8500_FUNC_GROUPS(ddrtrig, "ddrtrig_b_1");
DB8500_FUNC_GROUPS(pwl, "pwl_b_1", "pwl_b_2", "pwl_b_3", "pwl_b_4");
......@@ -783,7 +798,7 @@ DB8500_FUNC_GROUPS(mc5, "mc5_c_1");
DB8500_FUNC_GROUPS(usbsim, "usbsim_c_1", "usbsim_c_2");
DB8500_FUNC_GROUPS(i2c3, "i2c3_c_1", "i2c3_c_2");
DB8500_FUNC_GROUPS(spi0, "spi0_c_1");
DB8500_FUNC_GROUPS(spi2, "spi2_oc1_1");
DB8500_FUNC_GROUPS(spi2, "spi2_oc1_1", "spi2_oc1_2");
#define FUNCTION(fname) \
{ \
......
......@@ -434,7 +434,7 @@ static int __nmk_config_pins(pin_cfg_t *cfgs, int num, bool sleep)
/**
* nmk_config_pin - configure a pin's mux attributes
* @cfg: pin confguration
*
* @sleep: Non-zero to apply the sleep mode configuration
* Configures a pin's mode (alternate function or GPIO), its pull up status,
* and its sleep mode based on the specified configuration. The @cfg is
* usually one of the SoC specific macros defined in mach/<soc>-pins.h. These
......@@ -1194,7 +1194,7 @@ static int __devinit nmk_gpio_probe(struct platform_device *dev)
}
if (np) {
pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
pdata = devm_kzalloc(&dev->dev, sizeof(*pdata), GFP_KERNEL);
if (!pdata)
return -ENOMEM;
......@@ -1229,29 +1229,23 @@ static int __devinit nmk_gpio_probe(struct platform_device *dev)
goto out;
}
if (request_mem_region(res->start, resource_size(res),
dev_name(&dev->dev)) == NULL) {
ret = -EBUSY;
goto out;
}
base = ioremap(res->start, resource_size(res));
base = devm_request_and_ioremap(&dev->dev, res);
if (!base) {
ret = -ENOMEM;
goto out_release;
goto out;
}
clk = clk_get(&dev->dev, NULL);
clk = devm_clk_get(&dev->dev, NULL);
if (IS_ERR(clk)) {
ret = PTR_ERR(clk);
goto out_unmap;
goto out;
}
clk_prepare(clk);
nmk_chip = kzalloc(sizeof(*nmk_chip), GFP_KERNEL);
nmk_chip = devm_kzalloc(&dev->dev, sizeof(*nmk_chip), GFP_KERNEL);
if (!nmk_chip) {
ret = -ENOMEM;
goto out_clk;
goto out;
}
/*
......@@ -1286,7 +1280,7 @@ static int __devinit nmk_gpio_probe(struct platform_device *dev)
ret = gpiochip_add(&nmk_chip->chip);
if (ret)
goto out_free;
goto out;
BUG_ON(nmk_chip->bank >= ARRAY_SIZE(nmk_gpio_chips));
......@@ -1300,7 +1294,7 @@ static int __devinit nmk_gpio_probe(struct platform_device *dev)
if (!nmk_chip->domain) {
pr_err("%s: Failed to create irqdomain\n", np->full_name);
ret = -ENOSYS;
goto out_free;
goto out;
}
nmk_gpio_init_irq(nmk_chip);
......@@ -1309,20 +1303,9 @@ static int __devinit nmk_gpio_probe(struct platform_device *dev)
return 0;
out_free:
kfree(nmk_chip);
out_clk:
clk_disable(clk);
clk_put(clk);
out_unmap:
iounmap(base);
out_release:
release_mem_region(res->start, resource_size(res));
out:
dev_err(&dev->dev, "Failure %i for GPIO %i-%i\n", ret,
pdata->first_gpio, pdata->first_gpio+31);
if (np)
kfree(pdata);
return ret;
}
......
This diff is collapsed.
......@@ -745,9 +745,9 @@ int __devinit tegra_pinctrl_probe(struct platform_device *pdev,
}
pmx->pctl = pinctrl_register(&tegra_pinctrl_desc, &pdev->dev, pmx);
if (IS_ERR(pmx->pctl)) {
if (!pmx->pctl) {
dev_err(&pdev->dev, "Couldn't register pinctrl driver\n");
return PTR_ERR(pmx->pctl);
return -ENODEV;
}
pinctrl_add_gpio_range(pmx->pctl, &tegra_pinctrl_gpio_range);
......@@ -764,7 +764,6 @@ int __devexit tegra_pinctrl_remove(struct platform_device *pdev)
{
struct tegra_pmx *pmx = platform_get_drvdata(pdev);
pinctrl_remove_gpio_range(pmx->pctl, &tegra_pinctrl_gpio_range);
pinctrl_unregister(pmx->pctl);
return 0;
......
......@@ -1113,8 +1113,6 @@ static int __devinit u300_pmx_probe(struct platform_device *pdev)
int ret;
int i;
pr_err("U300 PMX PROBE\n");
/* Create state holders etc for this driver */
upmx = devm_kzalloc(&pdev->dev, sizeof(*upmx), GFP_KERNEL);
if (!upmx)
......@@ -1175,15 +1173,11 @@ static int __devinit u300_pmx_probe(struct platform_device *pdev)
static int __devexit u300_pmx_remove(struct platform_device *pdev)
{
struct u300_pmx *upmx = platform_get_drvdata(pdev);
int i;
for (i = 0; i < ARRAY_SIZE(u300_gpio_ranges); i++)
pinctrl_remove_gpio_range(upmx->pctl, &u300_gpio_ranges[i]);
pinctrl_unregister(upmx->pctl);
iounmap(upmx->virtbase);
release_mem_region(upmx->phybase, upmx->physize);
platform_set_drvdata(pdev, NULL);
devm_kfree(&pdev->dev, upmx);
return 0;
}
......
......@@ -336,9 +336,9 @@ int __devinit spear_pinctrl_probe(struct platform_device *pdev,
spear_pinctrl_desc.npins = machdata->npins;
pmx->pctl = pinctrl_register(&spear_pinctrl_desc, &pdev->dev, pmx);
if (IS_ERR(pmx->pctl)) {
if (!pmx->pctl) {
dev_err(&pdev->dev, "Couldn't register pinctrl driver\n");
return PTR_ERR(pmx->pctl);
return -ENODEV;
}
return 0;
......
......@@ -131,8 +131,9 @@ extern void pinctrl_unregister(struct pinctrl_dev *pctldev);
extern bool pin_is_valid(struct pinctrl_dev *pctldev, int pin);
extern void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev,
struct pinctrl_gpio_range *range);
extern void pinctrl_remove_gpio_range(struct pinctrl_dev *pctldev,
struct pinctrl_gpio_range *range);
extern void pinctrl_add_gpio_ranges(struct pinctrl_dev *pctldev,
struct pinctrl_gpio_range *ranges,
unsigned nranges);
extern const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev);
extern void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev);
#else
......
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