Commit 925aba56 authored by David S. Miller's avatar David S. Miller

On sparc64, flush_thread needs to setup the PGD cache

for 64-bit apps too.
parent 3e82bc84
...@@ -424,10 +424,10 @@ void flush_thread(void) ...@@ -424,10 +424,10 @@ void flush_thread(void)
struct thread_info *t = current_thread_info(); struct thread_info *t = current_thread_info();
if (t->task->mm) { if (t->task->mm) {
unsigned long pgd_cache = 0UL;
if (test_thread_flag(TIF_32BIT)) { if (test_thread_flag(TIF_32BIT)) {
struct mm_struct *mm = t->task->mm; struct mm_struct *mm = t->task->mm;
pgd_t *pgd0 = &mm->pgd[0]; pgd_t *pgd0 = &mm->pgd[0];
unsigned long pgd_cache;
if (pgd_none(*pgd0)) { if (pgd_none(*pgd0)) {
pmd_t *page = pmd_alloc_one_fast(NULL, 0); pmd_t *page = pmd_alloc_one_fast(NULL, 0);
...@@ -436,6 +436,7 @@ void flush_thread(void) ...@@ -436,6 +436,7 @@ void flush_thread(void)
pgd_set(pgd0, page); pgd_set(pgd0, page);
} }
pgd_cache = pgd_val(*pgd0) << 11UL; pgd_cache = pgd_val(*pgd0) << 11UL;
}
__asm__ __volatile__("stxa %0, [%1] %2\n\t" __asm__ __volatile__("stxa %0, [%1] %2\n\t"
"membar #Sync" "membar #Sync"
: /* no outputs */ : /* no outputs */
...@@ -443,7 +444,6 @@ void flush_thread(void) ...@@ -443,7 +444,6 @@ void flush_thread(void)
"r" (TSB_REG), "r" (TSB_REG),
"i" (ASI_DMMU)); "i" (ASI_DMMU));
} }
}
set_thread_wsaved(0); set_thread_wsaved(0);
/* Turn off performance counters if on. */ /* Turn off performance counters if on. */
......
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