Commit 9296d94d authored by Florian Fainelli's avatar Florian Fainelli Committed by Greg Kroah-Hartman

USB: remove USB_EHCI_BIG_ENDIAN_{DESC,MMIO} depends on architecture symbol

Just like the OHCI counter part we just can remove the architecture
specific symbols which prevent these configuration symbols from being
selected by platforms/architectures requiring it. The original
implementation did not scale at all since it required each and every
single architecture to be added for these configuration symbols to be
selected. Now it is up to the EHCI driver and/or platform to select
these configuration symbols accordingly.
Acked-by: default avatarAlan Stern <stern@rowland.harvard.edu>
Signed-off-by: default avatarFlorian Fainelli <florian@openwrt.org>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 25e11ec4
...@@ -549,6 +549,8 @@ config ARCH_IXP4XX ...@@ -549,6 +549,8 @@ config ARCH_IXP4XX
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
select MIGHT_HAVE_PCI select MIGHT_HAVE_PCI
select NEED_MACH_IO_H select NEED_MACH_IO_H
select USB_EHCI_BIG_ENDIAN_MMIO
select USB_EHCI_BIG_ENDIAN_DESC
help help
Support for Intel's IXP4XX (XScale) family of processors. Support for Intel's IXP4XX (XScale) family of processors.
......
...@@ -404,6 +404,8 @@ config PMC_MSP ...@@ -404,6 +404,8 @@ config PMC_MSP
select IRQ_CPU select IRQ_CPU
select SERIAL_8250 select SERIAL_8250
select SERIAL_8250_CONSOLE select SERIAL_8250_CONSOLE
select USB_EHCI_BIG_ENDIAN_MMIO
select USB_EHCI_BIG_ENDIAN_DESC
help help
This adds support for the PMC-Sierra family of Multi-Service This adds support for the PMC-Sierra family of Multi-Service
Processor System-On-A-Chips. These parts include a number Processor System-On-A-Chips. These parts include a number
...@@ -1433,6 +1435,7 @@ config CPU_CAVIUM_OCTEON ...@@ -1433,6 +1435,7 @@ config CPU_CAVIUM_OCTEON
select CPU_SUPPORTS_HUGEPAGES select CPU_SUPPORTS_HUGEPAGES
select LIBFDT select LIBFDT
select USE_OF select USE_OF
select USB_EHCI_BIG_ENDIAN_MMIO
help help
The Cavium Octeon processor is a highly integrated chip containing The Cavium Octeon processor is a highly integrated chip containing
many ethernet hardware widgets for networking tasks. The processor many ethernet hardware widgets for networking tasks. The processor
......
...@@ -274,6 +274,8 @@ config 440EPX ...@@ -274,6 +274,8 @@ config 440EPX
select IBM_EMAC_EMAC4 select IBM_EMAC_EMAC4
select IBM_EMAC_RGMII select IBM_EMAC_RGMII
select IBM_EMAC_ZMII select IBM_EMAC_ZMII
select USB_EHCI_BIG_ENDIAN_MMIO
select USB_EHCI_BIG_ENDIAN_DESC
config 440GRX config 440GRX
bool bool
......
...@@ -7,6 +7,8 @@ config PPC_MPC512x ...@@ -7,6 +7,8 @@ config PPC_MPC512x
select PPC_PCI_CHOICE select PPC_PCI_CHOICE
select FSL_PCI if PCI select FSL_PCI if PCI
select ARCH_WANT_OPTIONAL_GPIOLIB select ARCH_WANT_OPTIONAL_GPIOLIB
select USB_EHCI_BIG_ENDIAN_MMIO
select USB_EHCI_BIG_ENDIAN_DESC
config MPC5121_ADS config MPC5121_ADS
bool "Freescale MPC5121E ADS" bool "Freescale MPC5121E ADS"
......
...@@ -407,6 +407,8 @@ config SERIAL_CONSOLE ...@@ -407,6 +407,8 @@ config SERIAL_CONSOLE
config SPARC_LEON config SPARC_LEON
bool "Sparc Leon processor family" bool "Sparc Leon processor family"
depends on SPARC32 depends on SPARC32
select USB_EHCI_BIG_ENDIAN_MMIO
select USB_EHCI_BIG_ENDIAN_DESC
---help--- ---help---
If you say Y here if you are running on a SPARC-LEON processor. If you say Y here if you are running on a SPARC-LEON processor.
The LEON processor is a synthesizable VHDL model of the The LEON processor is a synthesizable VHDL model of the
......
...@@ -110,18 +110,11 @@ config USB_EHCI_HCD_PMC_MSP ...@@ -110,18 +110,11 @@ config USB_EHCI_HCD_PMC_MSP
config USB_EHCI_BIG_ENDIAN_MMIO config USB_EHCI_BIG_ENDIAN_MMIO
bool bool
depends on USB_EHCI_HCD && (PPC_CELLEB || PPC_PS3 || 440EPX || \ depends on USB_EHCI_HCD
ARCH_IXP4XX || XPS_USB_HCD_XILINX || \
PPC_MPC512x || CPU_CAVIUM_OCTEON || \
PMC_MSP || SPARC_LEON || MIPS_SEAD3)
default y
config USB_EHCI_BIG_ENDIAN_DESC config USB_EHCI_BIG_ENDIAN_DESC
bool bool
depends on USB_EHCI_HCD && (440EPX || ARCH_IXP4XX || XPS_USB_HCD_XILINX || \ depends on USB_EHCI_HCD
PPC_MPC512x || PMC_MSP || SPARC_LEON || \
MIPS_SEAD3)
default y
config XPS_USB_HCD_XILINX config XPS_USB_HCD_XILINX
bool "Use Xilinx usb host EHCI controller core" bool "Use Xilinx usb host EHCI controller core"
......
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