Commit 93b61bdd authored by Wolfgang Muees's avatar Wolfgang Muees Committed by Linus Torvalds

Blackfin SPI Driver: Make mmc_spi driver work on Blackfin

1. Rewrite of the non-dma data transfer functions to use only ONE mode
   of TIMOD (TIMOD=0x1).  With TIMOD=0, it was not possible to set the TX
   bit pattern.  So the TDBR = 0xFFFF inside the read calls won't work.

2. Clear SPI_RDBR before reading and before duplex transfer.
   Otherwise the garbage data in RDBR will get read.  Since mmc_spi uses a
   lot of duplex transfers, this is the main cause of mmc_spi failure.

3. Poll RXS for transfer completion.  Polling SPIF or TXS cannot
   guarantee transfer completion.  This may interrupt a transfer before it
   is finished.  Also this may leave garbage data in buffer and affect
   next transfer.

[Yi Li <yi.li@analog.com>: add a field "u16 idle_tx_val" in "struct
bfin5xx_spi_chip" to specify the value to transmit if no TX value
is supplied.]
Signed-off-by: default avatarWolfgang Muees <wolfgang.mues@auerswald.de>
Signed-off-by: default avatarYi Li <yi.li@analog.com>
Signed-off-by: default avatarBryan Wu <cooloney@kernel.org>
Cc: David Brownell <david-b@pacbell.net>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
parent 42c78b2b
...@@ -125,6 +125,8 @@ struct bfin5xx_spi_chip { ...@@ -125,6 +125,8 @@ struct bfin5xx_spi_chip {
u8 cs_change_per_word; u8 cs_change_per_word;
u16 cs_chg_udelay; /* Some devices require 16-bit delays */ u16 cs_chg_udelay; /* Some devices require 16-bit delays */
u32 cs_gpio; u32 cs_gpio;
/* Value to send if no TX value is supplied, usually 0x0 or 0xFFFF */
u16 idle_tx_val;
}; };
#endif /* _SPI_CHANNEL_H_ */ #endif /* _SPI_CHANNEL_H_ */
This diff is collapsed.
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment