Commit 94ba290d authored by Deepak R Varma's avatar Deepak R Varma Committed by Alex Deucher

drm/amdgpu: improve code indentation and alignment

General code indentation and alignment changes such as replace spaces
by tabs or align function arguments as per the coding style
guidelines. The patch covers various .c files for this driver.
Issue reported by checkpatch script.
Signed-off-by: default avatarDeepak R Varma <mh12gx2825@gmail.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent f3729f7b
...@@ -72,7 +72,7 @@ int amdgpu_atom_execute_table(struct atom_context *ctx, int index, uint32_t * pa ...@@ -72,7 +72,7 @@ int amdgpu_atom_execute_table(struct atom_context *ctx, int index, uint32_t * pa
static uint32_t atom_arg_mask[8] = static uint32_t atom_arg_mask[8] =
{ 0xFFFFFFFF, 0xFFFF, 0xFFFF00, 0xFFFF0000, 0xFF, 0xFF00, 0xFF0000, { 0xFFFFFFFF, 0xFFFF, 0xFFFF00, 0xFFFF0000, 0xFF, 0xFF00, 0xFF0000,
0xFF000000 }; 0xFF000000 };
static int atom_arg_shift[8] = { 0, 0, 8, 16, 0, 8, 16, 24 }; static int atom_arg_shift[8] = { 0, 0, 8, 16, 0, 8, 16, 24 };
static int atom_dst_to_src[8][4] = { static int atom_dst_to_src[8][4] = {
......
...@@ -147,7 +147,7 @@ static const struct amdgpu_irq_src_funcs gmc_v10_0_ecc_funcs = { ...@@ -147,7 +147,7 @@ static const struct amdgpu_irq_src_funcs gmc_v10_0_ecc_funcs = {
.process = amdgpu_umc_process_ecc_irq, .process = amdgpu_umc_process_ecc_irq,
}; };
static void gmc_v10_0_set_irq_funcs(struct amdgpu_device *adev) static void gmc_v10_0_set_irq_funcs(struct amdgpu_device *adev)
{ {
adev->gmc.vm_fault.num_types = 1; adev->gmc.vm_fault.num_types = 1;
adev->gmc.vm_fault.funcs = &gmc_v10_0_irq_funcs; adev->gmc.vm_fault.funcs = &gmc_v10_0_irq_funcs;
......
...@@ -712,7 +712,7 @@ static int mmhub_v1_0_get_ras_error_count(struct amdgpu_device *adev, ...@@ -712,7 +712,7 @@ static int mmhub_v1_0_get_ras_error_count(struct amdgpu_device *adev,
uint32_t sec_cnt, ded_cnt; uint32_t sec_cnt, ded_cnt;
for (i = 0; i < ARRAY_SIZE(mmhub_v1_0_ras_fields); i++) { for (i = 0; i < ARRAY_SIZE(mmhub_v1_0_ras_fields); i++) {
if(mmhub_v1_0_ras_fields[i].reg_offset != reg->reg_offset) if (mmhub_v1_0_ras_fields[i].reg_offset != reg->reg_offset)
continue; continue;
sec_cnt = (value & sec_cnt = (value &
......
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