ARM: OMAP4: PM: OMAP4 clock tree and clkdev registration

This patch defines all the clock nodes in OMAP4430
platform. All the clock node structs and the clkdev table is
autogenerated using a python script (gen_clock_tree.py)
developed by Paul Walmsley, Benoit Cousson and Rajendra Nayak.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>

arch/arm/mach-omap2/clock44xx.h

+/*
+ * OMAP4 clock function prototypes and macros
+ *
+ * Copyright (C) 2009 Texas Instruments, Inc.
+ */
+
+#ifndef __ARCH_ARM_MACH_OMAP2_CLOCK_44XX_H
+#define __ARCH_ARM_MACH_OMAP2_CLOCK_44XX_H
+
+unsigned long omap3_dpll_recalc(struct clk *clk);
+unsigned long omap3_clkoutx2_recalc(struct clk *clk);
+int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate);
+
+/* DPLL modes */
+#define DPLL_LOW_POWER_STOP	0x1
+#define DPLL_LOW_POWER_BYPASS	0x5
+#define DPLL_LOCKED		0x7
+#define OMAP4430_MAX_DPLL_MULT	2048
+#define OMAP4430_MAX_DPLL_DIV	128
+
+extern const struct clkops clkops_noncore_dpll_ops;
+
+#endif

arch/arm/plat-omap/include/plat/clkdev_omap.h

@@ -35,7 +35,7 @@ struct omap_clk {
 #define CK_343X		(1 << 6)
 #define CK_3430ES1	(1 << 7)
 #define CK_3430ES2	(1 << 8)
-
+#define CK_443X		(1 << 9)
 
 #endif
 

arch/arm/plat-omap/include/plat/clock.h

@@ -150,6 +150,8 @@ extern const struct clkops clkops_null;
 #define CONFIG_PARTICIPANT	(1 << 10)	/* Fundamental clock */
 #define ENABLE_ON_INIT		(1 << 11)	/* Enable upon framework init */
 #define INVERT_ENABLE           (1 << 12)       /* 0 enables, 1 disables */
+#define CLOCK_IN_OMAP4430	(1 << 13)
+#define ALWAYS_ENABLED		(1 << 14)
 /* bits 13-31 are currently free */
 
 /* Clksel_rate flags */
@@ -158,6 +160,7 @@ extern const struct clkops clkops_null;
 #define RATE_IN_243X		(1 << 2)
 #define RATE_IN_343X		(1 << 3)	/* rates common to all 343X */
 #define RATE_IN_3430ES2		(1 << 4)	/* 3430ES2 rates only */
+#define RATE_IN_4430            (1 << 5)
 
 #define RATE_IN_24XX		(RATE_IN_242X | RATE_IN_243X)