Commit 98176380 authored by Mika Westerberg's avatar Mika Westerberg

thunderbolt: Convert DP adapter register names to follow the USB4 spec

Now that USB4 spec has names for these DP adapter registers we can use
them instead. This makes it easier to match certain register to the spec.

No functional changes.
Signed-off-by: default avatarMika Westerberg <mika.westerberg@linux.intel.com>
parent 778bfca3
......@@ -835,11 +835,12 @@ int tb_dp_port_hpd_is_active(struct tb_port *port)
u32 data;
int ret;
ret = tb_port_read(port, &data, TB_CFG_PORT, port->cap_adap + 2, 1);
ret = tb_port_read(port, &data, TB_CFG_PORT,
port->cap_adap + ADP_DP_CS_2, 1);
if (ret)
return ret;
return !!(data & TB_DP_HDP);
return !!(data & ADP_DP_CS_2_HDP);
}
/**
......@@ -853,12 +854,14 @@ int tb_dp_port_hpd_clear(struct tb_port *port)
u32 data;
int ret;
ret = tb_port_read(port, &data, TB_CFG_PORT, port->cap_adap + 3, 1);
ret = tb_port_read(port, &data, TB_CFG_PORT,
port->cap_adap + ADP_DP_CS_3, 1);
if (ret)
return ret;
data |= TB_DP_HPDC;
return tb_port_write(port, &data, TB_CFG_PORT, port->cap_adap + 3, 1);
data |= ADP_DP_CS_3_HDPC;
return tb_port_write(port, &data, TB_CFG_PORT,
port->cap_adap + ADP_DP_CS_3, 1);
}
/**
......@@ -876,20 +879,23 @@ int tb_dp_port_set_hops(struct tb_port *port, unsigned int video,
u32 data[2];
int ret;
ret = tb_port_read(port, data, TB_CFG_PORT, port->cap_adap,
ARRAY_SIZE(data));
ret = tb_port_read(port, data, TB_CFG_PORT,
port->cap_adap + ADP_DP_CS_0, ARRAY_SIZE(data));
if (ret)
return ret;
data[0] &= ~TB_DP_VIDEO_HOPID_MASK;
data[1] &= ~(TB_DP_AUX_RX_HOPID_MASK | TB_DP_AUX_TX_HOPID_MASK);
data[0] &= ~ADP_DP_CS_0_VIDEO_HOPID_MASK;
data[1] &= ~ADP_DP_CS_1_AUX_RX_HOPID_MASK;
data[1] &= ~ADP_DP_CS_1_AUX_RX_HOPID_MASK;
data[0] |= (video << TB_DP_VIDEO_HOPID_SHIFT) & TB_DP_VIDEO_HOPID_MASK;
data[1] |= aux_tx & TB_DP_AUX_TX_HOPID_MASK;
data[1] |= (aux_rx << TB_DP_AUX_RX_HOPID_SHIFT) & TB_DP_AUX_RX_HOPID_MASK;
data[0] |= (video << ADP_DP_CS_0_VIDEO_HOPID_SHIFT) &
ADP_DP_CS_0_VIDEO_HOPID_MASK;
data[1] |= aux_tx & ADP_DP_CS_1_AUX_TX_HOPID_MASK;
data[1] |= (aux_rx << ADP_DP_CS_1_AUX_RX_HOPID_SHIFT) &
ADP_DP_CS_1_AUX_RX_HOPID_MASK;
return tb_port_write(port, data, TB_CFG_PORT, port->cap_adap,
ARRAY_SIZE(data));
return tb_port_write(port, data, TB_CFG_PORT,
port->cap_adap + ADP_DP_CS_0, ARRAY_SIZE(data));
}
/**
......@@ -900,11 +906,11 @@ bool tb_dp_port_is_enabled(struct tb_port *port)
{
u32 data[2];
if (tb_port_read(port, data, TB_CFG_PORT, port->cap_adap,
if (tb_port_read(port, data, TB_CFG_PORT, port->cap_adap + ADP_DP_CS_0,
ARRAY_SIZE(data)))
return false;
return !!(data[0] & (TB_DP_VIDEO_EN | TB_DP_AUX_EN));
return !!(data[0] & (ADP_DP_CS_0_VE | ADP_DP_CS_0_AE));
}
/**
......@@ -920,18 +926,18 @@ int tb_dp_port_enable(struct tb_port *port, bool enable)
u32 data[2];
int ret;
ret = tb_port_read(port, data, TB_CFG_PORT, port->cap_adap,
ARRAY_SIZE(data));
ret = tb_port_read(port, data, TB_CFG_PORT,
port->cap_adap + ADP_DP_CS_0, ARRAY_SIZE(data));
if (ret)
return ret;
if (enable)
data[0] |= TB_DP_VIDEO_EN | TB_DP_AUX_EN;
data[0] |= ADP_DP_CS_0_VE | ADP_DP_CS_0_AE;
else
data[0] &= ~(TB_DP_VIDEO_EN | TB_DP_AUX_EN);
data[0] &= ~(ADP_DP_CS_0_VE | ADP_DP_CS_0_AE);
return tb_port_write(port, data, TB_CFG_PORT, port->cap_adap,
ARRAY_SIZE(data));
return tb_port_write(port, data, TB_CFG_PORT,
port->cap_adap + ADP_DP_CS_0, ARRAY_SIZE(data));
}
/* switch utility functions */
......
......@@ -221,24 +221,20 @@ struct tb_regs_port_header {
#define ADP_CS_5_LCA_SHIFT 22
/* Display Port adapter registers */
/* DWORD 0 */
#define TB_DP_VIDEO_HOPID_SHIFT 16
#define TB_DP_VIDEO_HOPID_MASK GENMASK(26, 16)
#define TB_DP_AUX_EN BIT(30)
#define TB_DP_VIDEO_EN BIT(31)
/* DWORD 1 */
#define TB_DP_AUX_TX_HOPID_MASK GENMASK(10, 0)
#define TB_DP_AUX_RX_HOPID_SHIFT 11
#define TB_DP_AUX_RX_HOPID_MASK GENMASK(21, 11)
/* DWORD 2 */
#define TB_DP_HDP BIT(6)
/* DWORD 3 */
#define TB_DP_HPDC BIT(9)
/* DWORD 4 */
#define TB_DP_LOCAL_CAP 0x4
/* DWORD 5 */
#define TB_DP_REMOTE_CAP 0x5
#define ADP_DP_CS_0 0x00
#define ADP_DP_CS_0_VIDEO_HOPID_MASK GENMASK(26, 16)
#define ADP_DP_CS_0_VIDEO_HOPID_SHIFT 16
#define ADP_DP_CS_0_AE BIT(30)
#define ADP_DP_CS_0_VE BIT(31)
#define ADP_DP_CS_1_AUX_TX_HOPID_MASK GENMASK(10, 0)
#define ADP_DP_CS_1_AUX_RX_HOPID_MASK GENMASK(21, 11)
#define ADP_DP_CS_1_AUX_RX_HOPID_SHIFT 11
#define ADP_DP_CS_2 0x02
#define ADP_DP_CS_2_HDP BIT(6)
#define ADP_DP_CS_3 0x03
#define ADP_DP_CS_3_HDPC BIT(9)
#define DP_LOCAL_CAP 0x04
#define DP_REMOTE_CAP 0x05
/* PCIe adapter registers */
#define ADP_PCIE_CS_0 0x00
......
......@@ -241,23 +241,23 @@ static int tb_dp_xchg_caps(struct tb_tunnel *tunnel)
/* Read both DP_LOCAL_CAP registers */
ret = tb_port_read(in, &in_dp_cap, TB_CFG_PORT,
in->cap_adap + TB_DP_LOCAL_CAP, 1);
in->cap_adap + DP_LOCAL_CAP, 1);
if (ret)
return ret;
ret = tb_port_read(out, &out_dp_cap, TB_CFG_PORT,
out->cap_adap + TB_DP_LOCAL_CAP, 1);
out->cap_adap + DP_LOCAL_CAP, 1);
if (ret)
return ret;
/* Write IN local caps to OUT remote caps */
ret = tb_port_write(out, &in_dp_cap, TB_CFG_PORT,
out->cap_adap + TB_DP_REMOTE_CAP, 1);
out->cap_adap + DP_REMOTE_CAP, 1);
if (ret)
return ret;
return tb_port_write(in, &out_dp_cap, TB_CFG_PORT,
in->cap_adap + TB_DP_REMOTE_CAP, 1);
in->cap_adap + DP_REMOTE_CAP, 1);
}
static int tb_dp_activate(struct tb_tunnel *tunnel, bool active)
......
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