Commit 99706d62 authored by Arnd Bergmann's avatar Arnd Bergmann

Merge tag 'omap-for-v5.7/cpsw-fixes-signed' of...

Merge tag 'omap-for-v5.7/cpsw-fixes-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes

Few cpsw related dts fixes for omaps

Recent cpsw driver changes exposed few regressions in the cpsw related
dts configuration that would be good to fix:

- Few more boards still need to be updated to use rgmii-rxid phy caused
  by the fallout from commit bcf3440c ("net: phy: micrel: add phy-mode
  support for the KSZ9031 PHY" as the rx delay is now disabled unless we
  use rgmii-rxid.

- On dm814x we have been using a wrong clock for mdio that now can produce
  external abort on some boards

* tag 'omap-for-v5.7/cpsw-fixes-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: Fix wrong mdio clock for dm814x
  ARM: dts: am437x: fix networking on boards with ksz9031 phy
  ARM: dts: am57xx: fix networking on boards with ksz9031 phy

Link: https://lore.kernel.org/r/pull-1589472123-367692@atomide.comSigned-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 364d1ac2 fb6823a6
...@@ -943,7 +943,7 @@ ethphy0: ethernet-phy@0 { ...@@ -943,7 +943,7 @@ ethphy0: ethernet-phy@0 {
&cpsw_emac0 { &cpsw_emac0 {
phy-handle = <&ethphy0>; phy-handle = <&ethphy0>;
phy-mode = "rgmii"; phy-mode = "rgmii-rxid";
}; };
&elm { &elm {
......
...@@ -504,7 +504,7 @@ ethphy0: ethernet-phy@0 { ...@@ -504,7 +504,7 @@ ethphy0: ethernet-phy@0 {
&cpsw_emac0 { &cpsw_emac0 {
phy-handle = <&ethphy0>; phy-handle = <&ethphy0>;
phy-mode = "rgmii"; phy-mode = "rgmii-rxid";
}; };
&rtc { &rtc {
......
...@@ -833,13 +833,13 @@ ethphy1: ethernet-phy@5 { ...@@ -833,13 +833,13 @@ ethphy1: ethernet-phy@5 {
&cpsw_emac0 { &cpsw_emac0 {
phy-handle = <&ethphy0>; phy-handle = <&ethphy0>;
phy-mode = "rgmii"; phy-mode = "rgmii-rxid";
dual_emac_res_vlan = <1>; dual_emac_res_vlan = <1>;
}; };
&cpsw_emac1 { &cpsw_emac1 {
phy-handle = <&ethphy1>; phy-handle = <&ethphy1>;
phy-mode = "rgmii"; phy-mode = "rgmii-rxid";
dual_emac_res_vlan = <2>; dual_emac_res_vlan = <2>;
}; };
......
...@@ -190,13 +190,13 @@ &mac_sw { ...@@ -190,13 +190,13 @@ &mac_sw {
&cpsw_port1 { &cpsw_port1 {
phy-handle = <&ethphy0_sw>; phy-handle = <&ethphy0_sw>;
phy-mode = "rgmii"; phy-mode = "rgmii-rxid";
ti,dual-emac-pvid = <1>; ti,dual-emac-pvid = <1>;
}; };
&cpsw_port2 { &cpsw_port2 {
phy-handle = <&ethphy1_sw>; phy-handle = <&ethphy1_sw>;
phy-mode = "rgmii"; phy-mode = "rgmii-rxid";
ti,dual-emac-pvid = <2>; ti,dual-emac-pvid = <2>;
}; };
......
...@@ -433,13 +433,13 @@ &mac { ...@@ -433,13 +433,13 @@ &mac {
&cpsw_emac0 { &cpsw_emac0 {
phy-handle = <&phy0>; phy-handle = <&phy0>;
phy-mode = "rgmii"; phy-mode = "rgmii-rxid";
dual_emac_res_vlan = <1>; dual_emac_res_vlan = <1>;
}; };
&cpsw_emac1 { &cpsw_emac1 {
phy-handle = <&phy1>; phy-handle = <&phy1>;
phy-mode = "rgmii"; phy-mode = "rgmii-rxid";
dual_emac_res_vlan = <2>; dual_emac_res_vlan = <2>;
}; };
......
...@@ -408,13 +408,13 @@ &rtc { ...@@ -408,13 +408,13 @@ &rtc {
&cpsw_emac0 { &cpsw_emac0 {
phy-handle = <&ethphy0>; phy-handle = <&ethphy0>;
phy-mode = "rgmii"; phy-mode = "rgmii-rxid";
dual_emac_res_vlan = <1>; dual_emac_res_vlan = <1>;
}; };
&cpsw_emac1 { &cpsw_emac1 {
phy-handle = <&ethphy1>; phy-handle = <&ethphy1>;
phy-mode = "rgmii"; phy-mode = "rgmii-rxid";
dual_emac_res_vlan = <2>; dual_emac_res_vlan = <2>;
}; };
......
...@@ -693,7 +693,7 @@ mac: ethernet@0 { ...@@ -693,7 +693,7 @@ mac: ethernet@0 {
davinci_mdio: mdio@800 { davinci_mdio: mdio@800 {
compatible = "ti,cpsw-mdio", "ti,davinci_mdio"; compatible = "ti,cpsw-mdio", "ti,davinci_mdio";
clocks = <&alwon_ethernet_clkctrl DM814_ETHERNET_CPGMAC0_CLKCTRL 0>; clocks = <&cpsw_125mhz_gclk>;
clock-names = "fck"; clock-names = "fck";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
......
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