Skip to content

L
linux
Commit 998a0ce7 authored by Tony Luck's avatar Tony Luck
Browse files
Options

Merge intel.com:/data/home/aegl/BK/Linus 

into intel.com:/data/home/aegl/BK/linux-ia64-release-2.6.11
parents 88e4bb2c d62edbe1
Show whitespace changes
Inline Side-by-side
Showing with 214 additions and 107 deletions
Documentation/arm/Samsung-S3C24XX/Overview.txt
View file @ 998a0ce7
......@@ -45,6 +45,12 @@ Machines
Handheld (IPAQ), available in several varieties
HP iPAQ rx3715
S3C2440 based IPAQ, with a number of variations depending on
features shipped.
NAND
----
......@@ -91,6 +97,8 @@ Port Contributors
Roc Wu
Klaus Fetscher
Dimitry Andric
Shannon Holland
Document Changes
----------------
......@@ -99,8 +107,9 @@ Document Changes
05 Sep 2004 - BJD - Added Klaus Fetscher to list of contributors
25 Oct 2004 - BJD - Added Dimitry Andric to list of contributors
25 Oct 2004 - BJD - Updated the MTD from the 2.6.9 merge
21 Jan 2005 - BJD - Added rx3715, added Shannon to contributors
Document Author
---------------
Ben Dooks, (c) 2004 Simtec Electronics
Ben Dooks, (c) 2004-2005 Simtec Electronics
Makefile
View file @ 998a0ce7
VERSION = 2
PATCHLEVEL = 6
SUBLEVEL = 11
EXTRAVERSION =-rc1
EXTRAVERSION =-rc2
NAME=Woozy Numbat
# *DOCUMENTATION*
......
arch/arm/mach-pxa/corgi.c
View file @ 998a0ce7
......@@ -34,6 +34,7 @@
#include <asm/arch/pxa-regs.h>
#include <asm/arch/irq.h>
#include <asm/arch/mmc.h>
#include <asm/arch/udc.h>
#include <asm/arch/corgi.h>
#include <asm/hardware/scoop.h>
......@@ -192,6 +193,27 @@ static struct pxamci_platform_data corgi_mci_platform_data = {
};
/*
* USB Device Controller
*/
static void corgi_udc_command(int cmd)
{
switch(cmd) {
case PXA2XX_UDC_CMD_CONNECT:
GPSR(CORGI_GPIO_USB_PULLUP) = GPIO_bit(CORGI_GPIO_USB_PULLUP);
break;
case PXA2XX_UDC_CMD_DISCONNECT:
GPCR(CORGI_GPIO_USB_PULLUP) = GPIO_bit(CORGI_GPIO_USB_PULLUP);
break;
}
}
static struct pxa2xx_udc_mach_info udc_info __initdata = {
/* no connect GPIO; corgi can't tell connection status */
.udc_command = corgi_udc_command,
};
static struct platform_device *devices[] __initdata = {
&corgiscoop_device,
&corgissp_device,
......@@ -221,6 +243,8 @@ static void __init corgi_init(void)
else
corgi_fb_info.phadadj=-1;
pxa_gpio_mode(CORGI_GPIO_USB_PULLUP | GPIO_OUT);
pxa_set_udc_info(&udc_info);
pxa_set_mci_info(&corgi_mci_platform_data);
platform_add_devices(devices, ARRAY_SIZE(devices));
......
arch/arm/mach-pxa/corgi_ssp.c
View file @ 998a0ce7
......@@ -213,6 +213,7 @@ static int corgi_ssp_remove(struct device *dev)
static int corgi_ssp_suspend(struct device *dev, u32 state, u32 level)
{
if (level == SUSPEND_POWER_DOWN) {
ssp_flush(&corgi_ssp_dev);
ssp_save_state(&corgi_ssp_dev,&corgi_ssp_state);
}
return 0;
......
drivers/mmc/wbsd.c
View file @ 998a0ce7
/*
* linux/drivers/mmc/wbsd.c
* linux/drivers/mmc/wbsd.c - Winbond W83L51xD SD/MMC driver
*
* Copyright (C) 2004 Pierre Ossman, All Rights Reserved.
* Copyright (C) 2004-2005 Pierre Ossman, All Rights Reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*
* Warning!
*
* Changes to the FIFO system should be done with extreme care since
* the hardware is full of bugs related to the FIFO. Known issues are:
*
* - FIFO size field in FSR is always zero.
*
* - FIFO interrupts tend not to work as they should. Interrupts are
* triggered only for full/empty events, not for threshold values.
*
* - On APIC systems the FIFO empty interrupt is sometimes lost.
*/
#include <linux/config.h>
......@@ -27,7 +40,7 @@
#include "wbsd.h"
#define DRIVER_NAME "wbsd"
#define DRIVER_VERSION "1.0"
#define DRIVER_VERSION "1.1"
#ifdef CONFIG_MMC_DEBUG
#define DBG(x...) \
......@@ -237,13 +250,14 @@ static inline int wbsd_next_sg(struct wbsd_host* host)
static inline char* wbsd_kmap_sg(struct wbsd_host* host)
{
return kmap_atomic(host->cur_sg->page, KM_BIO_SRC_IRQ) +
host->mapped_sg = kmap_atomic(host->cur_sg->page, KM_BIO_SRC_IRQ) +
host->cur_sg->offset;
return host->mapped_sg;
}
static inline void wbsd_kunmap_sg(struct wbsd_host* host)
{
kunmap_atomic(host->cur_sg->page, KM_BIO_SRC_IRQ);
kunmap_atomic(host->mapped_sg, KM_BIO_SRC_IRQ);
}
static inline void wbsd_sg_to_dma(struct wbsd_host* host, struct mmc_data* data)
......@@ -270,7 +284,7 @@ static inline void wbsd_sg_to_dma(struct wbsd_host* host, struct mmc_data* data)
memcpy(dmabuf, sgbuf, size);
else
memcpy(dmabuf, sgbuf, sg[i].length);
kunmap_atomic(sg[i].page, KM_BIO_SRC_IRQ);
kunmap_atomic(sgbuf, KM_BIO_SRC_IRQ);
dmabuf += sg[i].length;
if (size < sg[i].length)
......@@ -316,7 +330,7 @@ static inline void wbsd_dma_to_sg(struct wbsd_host* host, struct mmc_data* data)
memcpy(sgbuf, dmabuf, size);
else
memcpy(sgbuf, dmabuf, sg[i].length);
kunmap_atomic(sg[i].page, KM_BIO_SRC_IRQ);
kunmap_atomic(sgbuf, KM_BIO_SRC_IRQ);
dmabuf += sg[i].length;
if (size < sg[i].length)
......@@ -398,16 +412,16 @@ static irqreturn_t wbsd_irq(int irq, void *dev_id, struct pt_regs *regs);
static void wbsd_send_command(struct wbsd_host* host, struct mmc_command* cmd)
{
int i;
u8 status, eir, isr;
u8 status, isr;
DBGF("Sending cmd (%x)\n", cmd->opcode);
/*
* Disable interrupts as the interrupt routine
* will destroy the contents of ISR.
* Clear accumulated ISR. The interrupt routine
* will fill this one with events that occur during
* transfer.
*/
eir = inb(host->base + WBSD_EIR);
outb(0, host->base + WBSD_EIR);
host->isr = 0;
/*
* Send the command (CRC calculated by host).
......@@ -433,7 +447,7 @@ static void wbsd_send_command(struct wbsd_host* host, struct mmc_command* cmd)
/*
* Read back status.
*/
isr = inb(host->base + WBSD_ISR);
isr = host->isr;
/* Card removed? */
if (isr & WBSD_INT_CARD)
......@@ -454,17 +468,6 @@ static void wbsd_send_command(struct wbsd_host* host, struct mmc_command* cmd)
}
}
/*
* Restore interrupt mask to previous value.
*/
outb(eir, host->base + WBSD_EIR);
/*
* Call the interrupt routine to jump start
* interrupts.
*/
wbsd_irq(0, host, NULL);
DBGF("Sent cmd (%x), res %d\n", cmd->opcode, cmd->error);
}
......@@ -476,6 +479,7 @@ static void wbsd_empty_fifo(struct wbsd_host* host)
{
struct mmc_data* data = host->mrq->cmd->data;
char* buffer;
int i, fsr, fifo;
/*
* Handle excessive data.
......@@ -489,7 +493,20 @@ static void wbsd_empty_fifo(struct wbsd_host* host)
* Drain the fifo. This has a tendency to loop longer
* than the FIFO length (usually one block).
*/
while (!(inb(host->base + WBSD_FSR) & WBSD_FIFO_EMPTY))
while (!((fsr = inb(host->base + WBSD_FSR)) & WBSD_FIFO_EMPTY))
{
/*
* The size field in the FSR is broken so we have to
* do some guessing.
*/
if (fsr & WBSD_FIFO_FULL)
fifo = 16;
else if (fsr & WBSD_FIFO_FUTHRE)
fifo = 8;
else
fifo = 1;
for (i = 0;i < fifo;i++)
{
*buffer = inb(host->base + WBSD_DFR);
buffer++;
......@@ -535,14 +552,24 @@ static void wbsd_empty_fifo(struct wbsd_host* host)
buffer = wbsd_kmap_sg(host);
}
}
}
wbsd_kunmap_sg(host);
/*
* This is a very dirty hack to solve a
* hardware problem. The chip doesn't trigger
* FIFO threshold interrupts properly.
*/
if ((host->size - data->bytes_xfered) < 16)
tasklet_schedule(&host->fifo_tasklet);
}
static void wbsd_fill_fifo(struct wbsd_host* host)
{
struct mmc_data* data = host->mrq->cmd->data;
char* buffer;
int i, fsr, fifo;
/*
* Check that we aren't being called after the
......@@ -557,7 +584,20 @@ static void wbsd_fill_fifo(struct wbsd_host* host)
* Fill the fifo. This has a tendency to loop longer
* than the FIFO length (usually one block).
*/
while (!(inb(host->base + WBSD_FSR) & WBSD_FIFO_FULL))
while (!((fsr = inb(host->base + WBSD_FSR)) & WBSD_FIFO_FULL))
{
/*
* The size field in the FSR is broken so we have to
* do some guessing.
*/
if (fsr & WBSD_FIFO_EMPTY)
fifo = 0;
else if (fsr & WBSD_FIFO_EMTHRE)
fifo = 8;
else
fifo = 15;
for (i = 16;i > fifo;i--)
{
outb(*buffer, host->base + WBSD_DFR);
buffer++;
......@@ -603,6 +643,7 @@ static void wbsd_fill_fifo(struct wbsd_host* host)
buffer = wbsd_kmap_sg(host);
}
}
}
wbsd_kunmap_sg(host);
}
......@@ -687,9 +728,9 @@ static void wbsd_prepare_data(struct wbsd_host* host, struct mmc_data* data)
disable_dma(host->dma);
clear_dma_ff(host->dma);
if (data->flags & MMC_DATA_READ)
set_dma_mode(host->dma, DMA_MODE_READ);
set_dma_mode(host->dma, DMA_MODE_READ & ~0x40);
else
set_dma_mode(host->dma, DMA_MODE_WRITE);
set_dma_mode(host->dma, DMA_MODE_WRITE & ~0x40);
set_dma_addr(host->dma, host->dma_addr);
set_dma_count(host->dma, host->size);
......@@ -699,8 +740,7 @@ static void wbsd_prepare_data(struct wbsd_host* host, struct mmc_data* data)
/*
* Enable DMA on the host.
*/
wbsd_write_index(host, WBSD_IDX_DMA,
WBSD_DMA_SINGLE | WBSD_DMA_ENABLE);
wbsd_write_index(host, WBSD_IDX_DMA, WBSD_DMA_ENABLE);
}
else
{
......@@ -744,6 +784,7 @@ static void wbsd_finish_data(struct wbsd_host* host, struct mmc_data* data)
{
unsigned long dmaflags;
int count;
u8 status;
WARN_ON(host->mrq == NULL);
......@@ -753,6 +794,15 @@ static void wbsd_finish_data(struct wbsd_host* host, struct mmc_data* data)
if (data->stop)
wbsd_send_command(host, data->stop);
/*
* Wait for the controller to leave data
* transfer state.
*/
do
{
status = wbsd_read_index(host, WBSD_IDX_STATUS);
} while (status & (WBSD_BLOCK_READ | WBSD_BLOCK_WRITE));
/*
* DMA transfer?
*/
......@@ -850,6 +900,12 @@ static void wbsd_request(struct mmc_host* mmc, struct mmc_request* mrq)
*/
if (cmd->data && (cmd->error == MMC_ERR_NONE))
{
/*
* Dirty fix for hardware bug.
*/
if (host->dma == -1)
tasklet_schedule(&host->fifo_tasklet);
spin_unlock_bh(&host->lock);
return;
......@@ -1019,7 +1075,6 @@ static void wbsd_tasklet_crc(unsigned long param)
spin_lock(&host->lock);
WARN_ON(!host->mrq);
if (!host->mrq)
goto end;
......@@ -1044,7 +1099,6 @@ static void wbsd_tasklet_timeout(unsigned long param)
spin_lock(&host->lock);
WARN_ON(!host->mrq);
if (!host->mrq)
goto end;
......@@ -1125,13 +1179,15 @@ static irqreturn_t wbsd_irq(int irq, void *dev_id, struct pt_regs *regs)
if (isr == 0xff || isr == 0x00)
return IRQ_NONE;
host->isr |= isr;
/*
* Schedule tasklets as needed.
*/
if (isr & WBSD_INT_CARD)
tasklet_schedule(&host->card_tasklet);
if (isr & WBSD_INT_FIFO_THRE)
tasklet_hi_schedule(&host->fifo_tasklet);
tasklet_schedule(&host->fifo_tasklet);
if (isr & WBSD_INT_CRC)
tasklet_hi_schedule(&host->crc_tasklet);
if (isr & WBSD_INT_TIMEOUT)
......@@ -1390,8 +1446,8 @@ static int wbsd_probe(struct device* dev)
* Maximum number of segments. Worst case is one sector per segment
* so this will be 64kB/512.
*/
mmc->max_hw_segs = NR_SG;
mmc->max_phys_segs = NR_SG;
mmc->max_hw_segs = 128;
mmc->max_phys_segs = 128;
/*
* Maximum number of sectors in one transfer. Also limited by 64kB
......@@ -1588,6 +1644,7 @@ module_param(dma, int, 0444);
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("Winbond W83L51xD SD/MMC card interface driver");
MODULE_VERSION(DRIVER_VERSION);
MODULE_PARM_DESC(io, "I/O base to allocate. Must be 8 byte aligned. (default 0x248)");
MODULE_PARM_DESC(irq, "IRQ to allocate. (default 6)");
......
drivers/mmc/wbsd.h
View file @ 998a0ce7
/*
* linux/drivers/mmc/wbsd.h
* linux/drivers/mmc/wbsd.h - Winbond W83L51xD SD/MMC driver
*
* Copyright (C) 2004 Pierre Ossman, All Rights Reserved.
* Copyright (C) 2004-2005 Pierre Ossman, All Rights Reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
......@@ -119,6 +119,8 @@ const int valid_ids[] = {
#define WBSD_FIFOEN_FULL 0x10
#define WBSD_FIFO_THREMASK 0x0F
#define WBSD_BLOCK_READ 0x80
#define WBSD_BLOCK_WRITE 0x40
#define WBSD_BUSY 0x20
#define WBSD_CARDTRAFFIC 0x04
#define WBSD_SENDCMD 0x02
......@@ -132,9 +134,6 @@ const int valid_ids[] = {
#define WBSD_CRC_FAIL 0x0B /* S101E (01011) */
/* 64kB / 512 */
#define NR_SG 128
struct wbsd_host
{
struct mmc_host* mmc; /* MMC structure */
......@@ -143,9 +142,11 @@ struct wbsd_host
struct mmc_request* mrq; /* Current request */
struct scatterlist sg[NR_SG]; /* SG list */
u8 isr; /* Accumulated ISR */
struct scatterlist* cur_sg; /* Current SG entry */
unsigned int num_sg; /* Number of entries left */
void* mapped_sg; /* vaddr of mapped sg */
unsigned int offset; /* Offset into current entry */
unsigned int remain; /* Data left in curren entry */
......
include/asm-arm/arch-pxa/pxa-regs.h
View file @ 998a0ce7
......@@ -498,14 +498,18 @@
#define POCR __REG(0x40500000) /* PCM Out Control Register */
#define POCR_FEIE (1 << 3) /* FIFO Error Interrupt Enable */
#define POCR_FSRIE (1 << 1) /* FIFO Service Request Interrupt Enable */
#define PICR __REG(0x40500004) /* PCM In Control Register */
#define PICR_FEIE (1 << 3) /* FIFO Error Interrupt Enable */
#define PICR_FSRIE (1 << 1) /* FIFO Service Request Interrupt Enable */
#define MCCR __REG(0x40500008) /* Mic In Control Register */
#define MCCR_FEIE (1 << 3) /* FIFO Error Interrupt Enable */
#define MCCR_FSRIE (1 << 1) /* FIFO Service Request Interrupt Enable */
#define GCR __REG(0x4050000C) /* Global Control Register */
#define GCR_nDMAEN (1 << 24) /* non DMA Enable */
#define GCR_CDONE_IE (1 << 19) /* Command Done Interrupt Enable */
#define GCR_SDONE_IE (1 << 18) /* Status Done Interrupt Enable */
#define GCR_SECRDY_IEN (1 << 9) /* Secondary Ready Interrupt Enable */
......@@ -519,12 +523,17 @@
#define POSR __REG(0x40500010) /* PCM Out Status Register */
#define POSR_FIFOE (1 << 4) /* FIFO error */
#define POSR_FSR (1 << 2) /* FIFO Service Request */
#define PISR __REG(0x40500014) /* PCM In Status Register */
#define PISR_FIFOE (1 << 4) /* FIFO error */
#define PISR_EOC (1 << 3) /* DMA End-of-Chain (exclusive clear) */
#define PISR_FSR (1 << 2) /* FIFO Service Request */
#define MCSR __REG(0x40500018) /* Mic In Status Register */
#define MCSR_FIFOE (1 << 4) /* FIFO error */
#define MCSR_EOC (1 << 3) /* DMA End-of-Chain (exclusive clear) */
#define MCSR_FSR (1 << 2) /* FIFO Service Request */
#define GSR __REG(0x4050001C) /* Global Status Register */
#define GSR_CDONE (1 << 19) /* Command Done */
......@@ -537,9 +546,10 @@
#define GSR_PRIRES (1 << 10) /* Primary Resume Interrupt */
#define GSR_SCR (1 << 9) /* Secondary Codec Ready */
#define GSR_PCR (1 << 8) /* Primary Codec Ready */
#define GSR_MINT (1 << 7) /* Mic In Interrupt */
#define GSR_MCINT (1 << 7) /* Mic In Interrupt */
#define GSR_POINT (1 << 6) /* PCM Out Interrupt */
#define GSR_PIINT (1 << 5) /* PCM In Interrupt */
#define GSR_ACOFFD (1 << 3) /* AC-link Shut Off Done */
#define GSR_MOINT (1 << 2) /* Modem Out Interrupt */
#define GSR_MIINT (1 << 1) /* Modem In Interrupt */
#define GSR_GSCI (1 << 0) /* Codec GPI Status Change Interrupt */
......@@ -552,15 +562,20 @@
#define MOCR __REG(0x40500100) /* Modem Out Control Register */
#define MOCR_FEIE (1 << 3) /* FIFO Error */
#define MOCR_FSRIE (1 << 1) /* FIFO Service Request Interrupt Enable */
#define MICR __REG(0x40500108) /* Modem In Control Register */
#define MICR_FEIE (1 << 3) /* FIFO Error */
#define MICR_FSRIE (1 << 1) /* FIFO Service Request Interrupt Enable */
#define MOSR __REG(0x40500110) /* Modem Out Status Register */
#define MOSR_FIFOE (1 << 4) /* FIFO error */
#define MOSR_FSR (1 << 2) /* FIFO Service Request */
#define MISR __REG(0x40500118) /* Modem In Status Register */
#define MISR_FIFOE (1 << 4) /* FIFO error */
#define MISR_EOC (1 << 3) /* DMA End-of-Chain (exclusive clear) */
#define MISR_FSR (1 << 2) /* FIFO Service Request */
#define MODR __REG(0x40500140) /* Modem FIFO Data Register */
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment
GitLab Nexedi Edition | About GitLab | About Nexedi | 沪ICP备2021021310号-2 | 沪ICP备2021021310号-7