Commit 9a0c0a9b authored by Chintan Vankar's avatar Chintan Vankar Committed by Vignesh Raghavendra

arm64: dts: ti: k3-j784s4-main: Fix mux-reg-masks in serdes_ln_ctrl

Change offset in mux-reg-masks property for serdes_ln_ctrl node
since reg-mux property is used in compatible.

Fixes: 27651492 ("mux: mmio: use reg property when parent device is not a syscon")
Signed-off-by: default avatarChintan Vankar <c-vankar@ti.com>
Acked-by: default avatarAndrew Davis <afd@ti.com>
Signed-off-by: default avatarSiddharth Vadapalli <s-vadapalli@ti.com>
Link: https://lore.kernel.org/r/20240213080348.248916-1-s-vadapalli@ti.comSigned-off-by: default avatarVignesh Raghavendra <vigneshr@ti.com>
parent 3d585389
......@@ -52,12 +52,12 @@ serdes_ln_ctrl: mux-controller@4080 {
compatible = "reg-mux";
reg = <0x00004080 0x30>;
#mux-control-cells = <1>;
mux-reg-masks = <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */
<0x4088 0x3>, <0x408c 0x3>, /* SERDES0 lane2/3 select */
<0x4090 0x3>, <0x4094 0x3>, /* SERDES1 lane0/1 select */
<0x4098 0x3>, <0x409c 0x3>, /* SERDES1 lane2/3 select */
<0x40a0 0x3>, <0x40a4 0x3>, /* SERDES2 lane0/1 select */
<0x40a8 0x3>, <0x40ac 0x3>; /* SERDES2 lane2/3 select */
mux-reg-masks = <0x0 0x3>, <0x4 0x3>, /* SERDES0 lane0/1 select */
<0x8 0x3>, <0xc 0x3>, /* SERDES0 lane2/3 select */
<0x10 0x3>, <0x14 0x3>, /* SERDES1 lane0/1 select */
<0x18 0x3>, <0x1c 0x3>, /* SERDES1 lane2/3 select */
<0x20 0x3>, <0x24 0x3>, /* SERDES2 lane0/1 select */
<0x28 0x3>, <0x2c 0x3>; /* SERDES2 lane2/3 select */
idle-states = <J784S4_SERDES0_LANE0_PCIE1_LANE0>,
<J784S4_SERDES0_LANE1_PCIE1_LANE1>,
<J784S4_SERDES0_LANE2_IP3_UNUSED>,
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment