Commit 9dcc87fe authored by Boris BREZILLON's avatar Boris BREZILLON Committed by Linus Torvalds

ARM: at91: fix at91_sysirq_mask_rtc for sam9x5 SoCs

sam9x5 SoCs have the following errata:
 "RTC: Interrupt Mask Register cannot be used
  Interrupt Mask Register read always returns 0."

Hence we should not rely on what IMR claims about already masked IRQs
and just disable all IRQs.
Signed-off-by: default avatarBoris BREZILLON <boris.brezillon@free-electrons.com>
Reported-by: default avatarBryan Evenson <bevenson@melinkcorp.com>
Reviewed-by: default avatarJohan Hovold <johan@hovold.com>
Acked-by: default avatarNicolas Ferre <nicolas.ferre@atmel.com>
Cc: Bryan Evenson <bevenson@melinkcorp.com>
Cc: Andrew Victor <linux@maxim.org.za>
Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
Cc: Alessandro Zummo <a.zummo@towertech.it>
Cc: Mark Roszko <mark.roszko@gmail.com>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
parent 2fe121e1
......@@ -27,22 +27,26 @@
#define AT91_RTC_IDR 0x24 /* Interrupt Disable Register */
#define AT91_RTC_IMR 0x28 /* Interrupt Mask Register */
#define AT91_RTC_IRQ_MASK 0x1f /* Available IRQs mask */
void __init at91_sysirq_mask_rtc(u32 rtc_base)
{
void __iomem *base;
u32 mask;
base = ioremap(rtc_base, 64);
if (!base)
return;
mask = readl_relaxed(base + AT91_RTC_IMR);
if (mask) {
pr_info("AT91: Disabling rtc irq\n");
writel_relaxed(mask, base + AT91_RTC_IDR);
/*
* sam9x5 SoCs have the following errata:
* "RTC: Interrupt Mask Register cannot be used
* Interrupt Mask Register read always returns 0."
*
* Hence we're not relying on IMR values to disable
* interrupts.
*/
writel_relaxed(AT91_RTC_IRQ_MASK, base + AT91_RTC_IDR);
(void)readl_relaxed(base + AT91_RTC_IMR); /* flush */
}
iounmap(base);
}
......
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