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Commit 9e1b2a07 authored by Radhey Shyam Pandey's avatar Radhey Shyam Pandey Committed by Mathieu Poirier
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dt-bindings: remoteproc: Add Tightly Coupled Memory (TCM) bindings 

Introduce bindings for TCM memory address space on AMD-xilinx Zynq
UltraScale+ platform. It will help in defining TCM in device-tree
and make it's access platform agnostic and data-driven.

Tightly-coupled memories(TCMs) are low-latency memory that provides
predictable instruction execution and predictable data load/store
timing. Each Cortex-R5F processor contains two 64-bit wide 64 KB memory
banks on the ATCM and BTCM ports, for a total of 128 KB of memory.

The TCM resources(reg, reg-names and power-domain) are documented for
each TCM in the R5 node. The reg and reg-names are made as required
properties as we don't want to hardcode TCM addresses for future
platforms and for zu+ legacy implementation will ensure that the
old dts without reg/reg-names works and stable ABI is maintained.

It also extends the examples for TCM split and lockstep modes.
Signed-off-by: default avatarRadhey Shyam Pandey <radhey.shyam.pandey@amd.com>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: default avatarTanmay Shah <tanmay.shah@amd.com>
Link: https://lore.kernel.org/r/20240412183708.4036007-3-tanmay.shah@amd.comSigned-off-by: default avatarMathieu Poirier <mathieu.poirier@linaro.org>
parent b31bcda5
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Showing with 257 additions and 22 deletions
Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.yaml
View file @ 9e1b2a07
......@@ -18,11 +18,26 @@ description: |
properties:
compatible:
const: xlnx,zynqmp-r5fss
enum:
- xlnx,zynqmp-r5fss
- xlnx,versal-r5fss
- xlnx,versal-net-r52fss
"#address-cells":
const: 2
"#size-cells":
const: 2
ranges:
description: |
Standard ranges definition providing address translations for
local R5F TCM address spaces to bus addresses.
xlnx,cluster-mode:
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 1, 2]
default: 1
description: |
The RPU MPCore can operate in split mode (Dual-processor performance), Safety
lock-step mode(Both RPU cores execute the same code in lock-step,
......@@ -36,8 +51,16 @@ properties:
1: lockstep mode (default)
2: single cpu mode
xlnx,tcm-mode:
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 1]
description: |
Configure RPU TCM
0: split mode
1: lockstep mode
patternProperties:
"^r5f-[a-f0-9]+$":
"^r(.*)@[0-9a-f]+$":
type: object
description: |
The RPU is located in the Low Power Domain of the Processor Subsystem.
......@@ -52,10 +75,22 @@ patternProperties:
properties:
compatible:
const: xlnx,zynqmp-r5f
enum:
- xlnx,zynqmp-r5f
- xlnx,versal-r5f
- xlnx,versal-net-r52f
reg:
minItems: 1
maxItems: 4
reg-names:
minItems: 1
maxItems: 4
power-domains:
maxItems: 1
minItems: 2
maxItems: 5
mboxes:
minItems: 1
......@@ -101,35 +136,235 @@ patternProperties:
required:
- compatible
- reg
- reg-names
- power-domains
unevaluatedProperties: false
required:
- compatible
- "#address-cells"
- "#size-cells"
- ranges
allOf:
- if:
properties:
compatible:
contains:
enum:
- xlnx,versal-net-r52fss
then:
properties:
xlnx,tcm-mode: false
patternProperties:
"^r52f@[0-9a-f]+$":
type: object
properties:
reg:
minItems: 1
items:
- description: ATCM internal memory
- description: BTCM internal memory
- description: CTCM internal memory
reg-names:
minItems: 1
items:
- const: atcm0
- const: btcm0
- const: ctcm0
power-domains:
minItems: 2
items:
- description: RPU core power domain
- description: ATCM power domain
- description: BTCM power domain
- description: CTCM power domain
- if:
properties:
compatible:
contains:
enum:
- xlnx,zynqmp-r5fss
- xlnx,versal-r5fss
then:
if:
properties:
xlnx,cluster-mode:
enum: [1, 2]
then:
properties:
xlnx,tcm-mode:
enum: [1]
patternProperties:
"^r5f@[0-9a-f]+$":
type: object
properties:
reg:
minItems: 1
items:
- description: ATCM internal memory
- description: BTCM internal memory
- description: extra ATCM memory in lockstep mode
- description: extra BTCM memory in lockstep mode
reg-names:
minItems: 1
items:
- const: atcm0
- const: btcm0
- const: atcm1
- const: btcm1
power-domains:
minItems: 2
items:
- description: RPU core power domain
- description: ATCM power domain
- description: BTCM power domain
- description: second ATCM power domain
- description: second BTCM power domain
required:
- xlnx,tcm-mode
else:
properties:
xlnx,tcm-mode:
enum: [0]
patternProperties:
"^r5f@[0-9a-f]+$":
type: object
properties:
reg:
minItems: 1
items:
- description: ATCM internal memory
- description: BTCM internal memory
reg-names:
minItems: 1
items:
- const: atcm0
- const: btcm0
power-domains:
minItems: 2
items:
- description: RPU core power domain
- description: ATCM power domain
- description: BTCM power domain
required:
- xlnx,tcm-mode
additionalProperties: false
examples:
- |
remoteproc {
#include <dt-bindings/power/xlnx-zynqmp-power.h>
// Split mode configuration
soc {
#address-cells = <2>;
#size-cells = <2>;
remoteproc@ffe00000 {
compatible = "xlnx,zynqmp-r5fss";
xlnx,cluster-mode = <0>;
xlnx,tcm-mode = <0>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x10000>,
<0x0 0x20000 0x0 0xffe20000 0x0 0x10000>,
<0x1 0x0 0x0 0xffe90000 0x0 0x10000>,
<0x1 0x20000 0x0 0xffeb0000 0x0 0x10000>;
r5f@0 {
compatible = "xlnx,zynqmp-r5f";
reg = <0x0 0x0 0x0 0x10000>, <0x0 0x20000 0x0 0x10000>;
reg-names = "atcm0", "btcm0";
power-domains = <&zynqmp_firmware PD_RPU_0>,
<&zynqmp_firmware PD_R5_0_ATCM>,
<&zynqmp_firmware PD_R5_0_BTCM>;
memory-region = <&rproc_0_fw_image>, <&rpu0vdev0buffer>,
<&rpu0vdev0vring0>, <&rpu0vdev0vring1>;
mboxes = <&ipi_mailbox_rpu0 0>, <&ipi_mailbox_rpu0 1>;
mbox-names = "tx", "rx";
};
r5f@1 {
compatible = "xlnx,zynqmp-r5f";
reg = <0x1 0x0 0x0 0x10000>, <0x1 0x20000 0x0 0x10000>;
reg-names = "atcm0", "btcm0";
power-domains = <&zynqmp_firmware PD_RPU_1>,
<&zynqmp_firmware PD_R5_1_ATCM>,
<&zynqmp_firmware PD_R5_1_BTCM>;
memory-region = <&rproc_1_fw_image>, <&rpu1vdev0buffer>,
<&rpu1vdev0vring0>, <&rpu1vdev0vring1>;
mboxes = <&ipi_mailbox_rpu1 0>, <&ipi_mailbox_rpu1 1>;
mbox-names = "tx", "rx";
};
};
};
- |
//Lockstep configuration
soc {
#address-cells = <2>;
#size-cells = <2>;
remoteproc@ffe00000 {
compatible = "xlnx,zynqmp-r5fss";
xlnx,cluster-mode = <1>;
xlnx,tcm-mode = <1>;
r5f-0 {
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x10000>,
<0x0 0x20000 0x0 0xffe20000 0x0 0x10000>,
<0x0 0x10000 0x0 0xffe10000 0x0 0x10000>,
<0x0 0x30000 0x0 0xffe30000 0x0 0x10000>;
r5f@0 {
compatible = "xlnx,zynqmp-r5f";
power-domains = <&zynqmp_firmware 0x7>;
memory-region = <&rproc_0_fw_image>, <&rpu0vdev0buffer>, <&rpu0vdev0vring0>, <&rpu0vdev0vring1>;
reg = <0x0 0x0 0x0 0x10000>,
<0x0 0x20000 0x0 0x10000>,
<0x0 0x10000 0x0 0x10000>,
<0x0 0x30000 0x0 0x10000>;
reg-names = "atcm0", "btcm0", "atcm1", "btcm1";
power-domains = <&zynqmp_firmware PD_RPU_0>,
<&zynqmp_firmware PD_R5_0_ATCM>,
<&zynqmp_firmware PD_R5_0_BTCM>,
<&zynqmp_firmware PD_R5_1_ATCM>,
<&zynqmp_firmware PD_R5_1_BTCM>;
memory-region = <&rproc_0_fw_image>, <&rpu0vdev0buffer>,
<&rpu0vdev0vring0>, <&rpu0vdev0vring1>;
mboxes = <&ipi_mailbox_rpu0 0>, <&ipi_mailbox_rpu0 1>;
mbox-names = "tx", "rx";
};
r5f-1 {
r5f@1 {
compatible = "xlnx,zynqmp-r5f";
power-domains = <&zynqmp_firmware 0x8>;
memory-region = <&rproc_1_fw_image>, <&rpu1vdev0buffer>, <&rpu1vdev0vring0>, <&rpu1vdev0vring1>;
reg = <0x1 0x0 0x0 0x10000>, <0x1 0x20000 0x0 0x10000>;
reg-names = "atcm0", "btcm0";
power-domains = <&zynqmp_firmware PD_RPU_1>,
<&zynqmp_firmware PD_R5_1_ATCM>,
<&zynqmp_firmware PD_R5_1_BTCM>;
memory-region = <&rproc_1_fw_image>, <&rpu1vdev0buffer>,
<&rpu1vdev0vring0>, <&rpu1vdev0vring1>;
mboxes = <&ipi_mailbox_rpu1 0>, <&ipi_mailbox_rpu1 1>;
mbox-names = "tx", "rx";
};
};
};
...
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