Commit 9f1fe2bb authored by Jani Nikula's avatar Jani Nikula Committed by Masahiro Yamada

docs/kbuild/makefiles: clean up indentation and whitespace

Remove the leading whitespaces, and clean up indentation and whitespace
in general.

Although the diff looks massive, it's trivial with 'diff -w' or 'git
show -w'.
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Signed-off-by: default avatarMasahiro Yamada <masahiroy@kernel.org>
parent 1a4c1c9d
...@@ -22,6 +22,7 @@ The top Makefile is responsible for building two major products: vmlinux ...@@ -22,6 +22,7 @@ The top Makefile is responsible for building two major products: vmlinux
(the resident kernel image) and modules (any module files). (the resident kernel image) and modules (any module files).
It builds these goals by recursively descending into the subdirectories of It builds these goals by recursively descending into the subdirectories of
the kernel source tree. the kernel source tree.
The list of subdirectories which are visited depends upon the kernel The list of subdirectories which are visited depends upon the kernel
configuration. The top Makefile textually includes an arch Makefile configuration. The top Makefile textually includes an arch Makefile
with the name arch/$(SRCARCH)/Makefile. The arch Makefile supplies with the name arch/$(SRCARCH)/Makefile. The arch Makefile supplies
...@@ -35,7 +36,6 @@ any built-in or modular targets. ...@@ -35,7 +36,6 @@ any built-in or modular targets.
scripts/Makefile.* contains all the definitions/rules etc. that scripts/Makefile.* contains all the definitions/rules etc. that
are used to build the kernel based on the kbuild makefiles. are used to build the kernel based on the kbuild makefiles.
Who does what Who does what
============= =============
...@@ -68,6 +68,7 @@ The kbuild files ...@@ -68,6 +68,7 @@ The kbuild files
Most Makefiles within the kernel are kbuild Makefiles that use the Most Makefiles within the kernel are kbuild Makefiles that use the
kbuild infrastructure. This chapter introduces the syntax used in the kbuild infrastructure. This chapter introduces the syntax used in the
kbuild makefiles. kbuild makefiles.
The preferred name for the kbuild files are 'Makefile' but 'Kbuild' can The preferred name for the kbuild files are 'Makefile' but 'Kbuild' can
be used and if both a 'Makefile' and a 'Kbuild' file exists, then the 'Kbuild' be used and if both a 'Makefile' and a 'Kbuild' file exists, then the 'Kbuild'
file will be used. file will be used.
...@@ -78,53 +79,53 @@ more details, with real examples. ...@@ -78,53 +79,53 @@ more details, with real examples.
Goal definitions Goal definitions
---------------- ----------------
Goal definitions are the main part (heart) of the kbuild Makefile. Goal definitions are the main part (heart) of the kbuild Makefile.
These lines define the files to be built, any special compilation These lines define the files to be built, any special compilation
options, and any subdirectories to be entered recursively. options, and any subdirectories to be entered recursively.
The most simple kbuild makefile contains one line: The most simple kbuild makefile contains one line:
Example:: Example::
obj-y += foo.o obj-y += foo.o
This tells kbuild that there is one object in that directory, named This tells kbuild that there is one object in that directory, named
foo.o. foo.o will be built from foo.c or foo.S. foo.o. foo.o will be built from foo.c or foo.S.
If foo.o shall be built as a module, the variable obj-m is used. If foo.o shall be built as a module, the variable obj-m is used.
Therefore the following pattern is often used: Therefore the following pattern is often used:
Example:: Example::
obj-$(CONFIG_FOO) += foo.o obj-$(CONFIG_FOO) += foo.o
$(CONFIG_FOO) evaluates to either y (for built-in) or m (for module). $(CONFIG_FOO) evaluates to either y (for built-in) or m (for module).
If CONFIG_FOO is neither y nor m, then the file will not be compiled If CONFIG_FOO is neither y nor m, then the file will not be compiled
nor linked. nor linked.
Built-in object goals - obj-y Built-in object goals - obj-y
----------------------------- -----------------------------
The kbuild Makefile specifies object files for vmlinux The kbuild Makefile specifies object files for vmlinux
in the $(obj-y) lists. These lists depend on the kernel in the $(obj-y) lists. These lists depend on the kernel
configuration. configuration.
Kbuild compiles all the $(obj-y) files. It then calls Kbuild compiles all the $(obj-y) files. It then calls
"$(AR) rcSTP" to merge these files into one built-in.a file. "$(AR) rcSTP" to merge these files into one built-in.a file.
This is a thin archive without a symbol table. It will be later This is a thin archive without a symbol table. It will be later
linked into vmlinux by scripts/link-vmlinux.sh linked into vmlinux by scripts/link-vmlinux.sh
The order of files in $(obj-y) is significant. Duplicates in The order of files in $(obj-y) is significant. Duplicates in
the lists are allowed: the first instance will be linked into the lists are allowed: the first instance will be linked into
built-in.a and succeeding instances will be ignored. built-in.a and succeeding instances will be ignored.
Link order is significant, because certain functions Link order is significant, because certain functions
(module_init() / __initcall) will be called during boot in the (module_init() / __initcall) will be called during boot in the
order they appear. So keep in mind that changing the link order they appear. So keep in mind that changing the link
order may e.g. change the order in which your SCSI order may e.g. change the order in which your SCSI
controllers are detected, and thus your disks are renumbered. controllers are detected, and thus your disks are renumbered.
Example:: Example::
#drivers/isdn/i4l/Makefile #drivers/isdn/i4l/Makefile
# Makefile for the kernel ISDN subsystem and device drivers. # Makefile for the kernel ISDN subsystem and device drivers.
...@@ -135,41 +136,41 @@ Built-in object goals - obj-y ...@@ -135,41 +136,41 @@ Built-in object goals - obj-y
Loadable module goals - obj-m Loadable module goals - obj-m
----------------------------- -----------------------------
$(obj-m) specifies object files which are built as loadable $(obj-m) specifies object files which are built as loadable
kernel modules. kernel modules.
A module may be built from one source file or several source A module may be built from one source file or several source
files. In the case of one source file, the kbuild makefile files. In the case of one source file, the kbuild makefile
simply adds the file to $(obj-m). simply adds the file to $(obj-m).
Example:: Example::
#drivers/isdn/i4l/Makefile #drivers/isdn/i4l/Makefile
obj-$(CONFIG_ISDN_PPP_BSDCOMP) += isdn_bsdcomp.o obj-$(CONFIG_ISDN_PPP_BSDCOMP) += isdn_bsdcomp.o
Note: In this example $(CONFIG_ISDN_PPP_BSDCOMP) evaluates to 'm' Note: In this example $(CONFIG_ISDN_PPP_BSDCOMP) evaluates to 'm'
If a kernel module is built from several source files, you specify If a kernel module is built from several source files, you specify
that you want to build a module in the same way as above; however, that you want to build a module in the same way as above; however,
kbuild needs to know which object files you want to build your kbuild needs to know which object files you want to build your
module from, so you have to tell it by setting a $(<module_name>-y) module from, so you have to tell it by setting a $(<module_name>-y)
variable. variable.
Example:: Example::
#drivers/isdn/i4l/Makefile #drivers/isdn/i4l/Makefile
obj-$(CONFIG_ISDN_I4L) += isdn.o obj-$(CONFIG_ISDN_I4L) += isdn.o
isdn-y := isdn_net_lib.o isdn_v110.o isdn_common.o isdn-y := isdn_net_lib.o isdn_v110.o isdn_common.o
In this example, the module name will be isdn.o. Kbuild will In this example, the module name will be isdn.o. Kbuild will
compile the objects listed in $(isdn-y) and then run compile the objects listed in $(isdn-y) and then run
"$(LD) -r" on the list of these files to generate isdn.o. "$(LD) -r" on the list of these files to generate isdn.o.
Due to kbuild recognizing $(<module_name>-y) for composite objects, Due to kbuild recognizing $(<module_name>-y) for composite objects,
you can use the value of a `CONFIG_` symbol to optionally include an you can use the value of a `CONFIG_` symbol to optionally include an
object file as part of a composite object. object file as part of a composite object.
Example:: Example::
#fs/ext2/Makefile #fs/ext2/Makefile
obj-$(CONFIG_EXT2_FS) += ext2.o obj-$(CONFIG_EXT2_FS) += ext2.o
...@@ -178,133 +179,134 @@ Loadable module goals - obj-m ...@@ -178,133 +179,134 @@ Loadable module goals - obj-m
ext2-$(CONFIG_EXT2_FS_XATTR) += xattr.o xattr_user.o \ ext2-$(CONFIG_EXT2_FS_XATTR) += xattr.o xattr_user.o \
xattr_trusted.o xattr_trusted.o
In this example, xattr.o, xattr_user.o and xattr_trusted.o are only In this example, xattr.o, xattr_user.o and xattr_trusted.o are only
part of the composite object ext2.o if $(CONFIG_EXT2_FS_XATTR) part of the composite object ext2.o if $(CONFIG_EXT2_FS_XATTR)
evaluates to 'y'. evaluates to 'y'.
Note: Of course, when you are building objects into the kernel, Note: Of course, when you are building objects into the kernel,
the syntax above will also work. So, if you have CONFIG_EXT2_FS=y, the syntax above will also work. So, if you have CONFIG_EXT2_FS=y,
kbuild will build an ext2.o file for you out of the individual kbuild will build an ext2.o file for you out of the individual
parts and then link this into built-in.a, as you would expect. parts and then link this into built-in.a, as you would expect.
Library file goals - lib-y Library file goals - lib-y
-------------------------- --------------------------
Objects listed with obj-* are used for modules, or Objects listed with obj-* are used for modules, or
combined in a built-in.a for that specific directory. combined in a built-in.a for that specific directory.
There is also the possibility to list objects that will There is also the possibility to list objects that will
be included in a library, lib.a. be included in a library, lib.a.
All objects listed with lib-y are combined in a single All objects listed with lib-y are combined in a single
library for that directory. library for that directory.
Objects that are listed in obj-y and additionally listed in Objects that are listed in obj-y and additionally listed in
lib-y will not be included in the library, since they will lib-y will not be included in the library, since they will
be accessible anyway. be accessible anyway.
For consistency, objects listed in lib-m will be included in lib.a. For consistency, objects listed in lib-m will be included in lib.a.
Note that the same kbuild makefile may list files to be built-in
and to be part of a library. Therefore the same directory
may contain both a built-in.a and a lib.a file.
Example:: Note that the same kbuild makefile may list files to be built-in
and to be part of a library. Therefore the same directory
may contain both a built-in.a and a lib.a file.
Example::
#arch/x86/lib/Makefile #arch/x86/lib/Makefile
lib-y := delay.o lib-y := delay.o
This will create a library lib.a based on delay.o. For kbuild to This will create a library lib.a based on delay.o. For kbuild to
actually recognize that there is a lib.a being built, the directory actually recognize that there is a lib.a being built, the directory
shall be listed in libs-y. shall be listed in libs-y.
See also `List directories to visit when descending`_. See also `List directories to visit when descending`_.
Use of lib-y is normally restricted to `lib/` and `arch/*/lib`. Use of lib-y is normally restricted to `lib/` and `arch/*/lib`.
Descending down in directories Descending down in directories
------------------------------ ------------------------------
A Makefile is only responsible for building objects in its own A Makefile is only responsible for building objects in its own
directory. Files in subdirectories should be taken care of by directory. Files in subdirectories should be taken care of by
Makefiles in these subdirs. The build system will automatically Makefiles in these subdirs. The build system will automatically
invoke make recursively in subdirectories, provided you let it know of invoke make recursively in subdirectories, provided you let it know of
them. them.
To do so, obj-y and obj-m are used. To do so, obj-y and obj-m are used.
ext2 lives in a separate directory, and the Makefile present in fs/ ext2 lives in a separate directory, and the Makefile present in fs/
tells kbuild to descend down using the following assignment. tells kbuild to descend down using the following assignment.
Example:: Example::
#fs/Makefile #fs/Makefile
obj-$(CONFIG_EXT2_FS) += ext2/ obj-$(CONFIG_EXT2_FS) += ext2/
If CONFIG_EXT2_FS is set to either 'y' (built-in) or 'm' (modular) If CONFIG_EXT2_FS is set to either 'y' (built-in) or 'm' (modular)
the corresponding obj- variable will be set, and kbuild will descend the corresponding obj- variable will be set, and kbuild will descend
down in the ext2 directory. down in the ext2 directory.
Kbuild uses this information not only to decide that it needs to visit Kbuild uses this information not only to decide that it needs to visit
the directory, but also to decide whether or not to link objects from the directory, but also to decide whether or not to link objects from
the directory into vmlinux. the directory into vmlinux.
When Kbuild descends into the directory with 'y', all built-in objects When Kbuild descends into the directory with 'y', all built-in objects
from that directory are combined into the built-in.a, which will be from that directory are combined into the built-in.a, which will be
eventually linked into vmlinux. eventually linked into vmlinux.
When Kbuild descends into the directory with 'm', in contrast, nothing When Kbuild descends into the directory with 'm', in contrast, nothing
from that directory will be linked into vmlinux. If the Makefile in from that directory will be linked into vmlinux. If the Makefile in
that directory specifies obj-y, those objects will be left orphan. that directory specifies obj-y, those objects will be left orphan.
It is very likely a bug of the Makefile or of dependencies in Kconfig. It is very likely a bug of the Makefile or of dependencies in Kconfig.
Kbuild also supports dedicated syntax, subdir-y and subdir-m, for Kbuild also supports dedicated syntax, subdir-y and subdir-m, for
descending into subdirectories. It is a good fit when you know they descending into subdirectories. It is a good fit when you know they
do not contain kernel-space objects at all. A typical usage is to let do not contain kernel-space objects at all. A typical usage is to let
Kbuild descend into subdirectories to build tools. Kbuild descend into subdirectories to build tools.
Examples:: Examples::
# scripts/Makefile # scripts/Makefile
subdir-$(CONFIG_GCC_PLUGINS) += gcc-plugins subdir-$(CONFIG_GCC_PLUGINS) += gcc-plugins
subdir-$(CONFIG_MODVERSIONS) += genksyms subdir-$(CONFIG_MODVERSIONS) += genksyms
subdir-$(CONFIG_SECURITY_SELINUX) += selinux subdir-$(CONFIG_SECURITY_SELINUX) += selinux
Unlike obj-y/m, subdir-y/m does not need the trailing slash since this Unlike obj-y/m, subdir-y/m does not need the trailing slash since this
syntax is always used for directories. syntax is always used for directories.
It is good practice to use a `CONFIG_` variable when assigning directory It is good practice to use a `CONFIG_` variable when assigning directory
names. This allows kbuild to totally skip the directory if the names. This allows kbuild to totally skip the directory if the
corresponding `CONFIG_` option is neither 'y' nor 'm'. corresponding `CONFIG_` option is neither 'y' nor 'm'.
Non-builtin vmlinux targets - extra-y Non-builtin vmlinux targets - extra-y
------------------------------------- -------------------------------------
extra-y specifies targets which are needed for building vmlinux, extra-y specifies targets which are needed for building vmlinux,
but not combined into built-in.a. but not combined into built-in.a.
Examples are: Examples are:
1) vmlinux linker script 1) vmlinux linker script
The linker script for vmlinux is located at The linker script for vmlinux is located at
arch/$(SRCARCH)/kernel/vmlinux.lds arch/$(SRCARCH)/kernel/vmlinux.lds
Example:: Example::
# arch/x86/kernel/Makefile # arch/x86/kernel/Makefile
extra-y += vmlinux.lds extra-y += vmlinux.lds
$(extra-y) should only contain targets needed for vmlinux. $(extra-y) should only contain targets needed for vmlinux.
Kbuild skips extra-y when vmlinux is apparently not a final goal. Kbuild skips extra-y when vmlinux is apparently not a final goal.
(e.g. 'make modules', or building external modules) (e.g. 'make modules', or building external modules)
If you intend to build targets unconditionally, always-y (explained If you intend to build targets unconditionally, always-y (explained
in the next section) is the correct syntax to use. in the next section) is the correct syntax to use.
Always built goals - always-y Always built goals - always-y
----------------------------- -----------------------------
always-y specifies targets which are literally always built when always-y specifies targets which are literally always built when
Kbuild visits the Makefile. Kbuild visits the Makefile.
Example::
Example::
# ./Kbuild # ./Kbuild
offsets-file := include/generated/asm-offsets.h offsets-file := include/generated/asm-offsets.h
always-y += $(offsets-file) always-y += $(offsets-file)
...@@ -312,7 +314,7 @@ Always built goals - always-y ...@@ -312,7 +314,7 @@ Always built goals - always-y
Compilation flags Compilation flags
----------------- -----------------
ccflags-y, asflags-y and ldflags-y ccflags-y, asflags-y and ldflags-y
These three flags apply only to the kbuild makefile in which they These three flags apply only to the kbuild makefile in which they
are assigned. They are used for all the normal cc, as and ld are assigned. They are used for all the normal cc, as and ld
invocations happening during a recursive build. invocations happening during a recursive build.
...@@ -346,7 +348,7 @@ Compilation flags ...@@ -346,7 +348,7 @@ Compilation flags
#arch/cris/boot/compressed/Makefile #arch/cris/boot/compressed/Makefile
ldflags-y += -T $(srctree)/$(src)/decompress_$(arch-y).lds ldflags-y += -T $(srctree)/$(src)/decompress_$(arch-y).lds
subdir-ccflags-y, subdir-asflags-y subdir-ccflags-y, subdir-asflags-y
The two flags listed above are similar to ccflags-y and asflags-y. The two flags listed above are similar to ccflags-y and asflags-y.
The difference is that the subdir- variants have effect for the kbuild The difference is that the subdir- variants have effect for the kbuild
file where they are present and all subdirectories. file where they are present and all subdirectories.
...@@ -357,7 +359,7 @@ Compilation flags ...@@ -357,7 +359,7 @@ Compilation flags
subdir-ccflags-y := -Werror subdir-ccflags-y := -Werror
ccflags-remove-y, asflags-remove-y ccflags-remove-y, asflags-remove-y
These flags are used to remove particular flags for the compiler, These flags are used to remove particular flags for the compiler,
assembler invocations. assembler invocations.
...@@ -365,7 +367,7 @@ Compilation flags ...@@ -365,7 +367,7 @@ Compilation flags
ccflags-remove-$(CONFIG_MCOUNT) += -pg ccflags-remove-$(CONFIG_MCOUNT) += -pg
CFLAGS_$@, AFLAGS_$@ CFLAGS_$@, AFLAGS_$@
CFLAGS_$@ and AFLAGS_$@ only apply to commands in current CFLAGS_$@ and AFLAGS_$@ only apply to commands in current
kbuild makefile. kbuild makefile.
...@@ -395,41 +397,40 @@ Compilation flags ...@@ -395,41 +397,40 @@ Compilation flags
AFLAGS_crunch-bits.o := -Wa,-mcpu=ep9312 AFLAGS_crunch-bits.o := -Wa,-mcpu=ep9312
AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt
Dependency tracking Dependency tracking
------------------- -------------------
Kbuild tracks dependencies on the following: Kbuild tracks dependencies on the following:
1) All prerequisite files (both `*.c` and `*.h`) 1) All prerequisite files (both `*.c` and `*.h`)
2) `CONFIG_` options used in all prerequisite files 2) `CONFIG_` options used in all prerequisite files
3) Command-line used to compile target 3) Command-line used to compile target
Thus, if you change an option to $(CC) all affected files will Thus, if you change an option to $(CC) all affected files will
be re-compiled. be re-compiled.
Custom Rules Custom Rules
------------ ------------
Custom rules are used when the kbuild infrastructure does Custom rules are used when the kbuild infrastructure does
not provide the required support. A typical example is not provide the required support. A typical example is
header files generated during the build process. header files generated during the build process.
Another example are the architecture-specific Makefiles which Another example are the architecture-specific Makefiles which
need custom rules to prepare boot images etc. need custom rules to prepare boot images etc.
Custom rules are written as normal Make rules. Custom rules are written as normal Make rules.
Kbuild is not executing in the directory where the Makefile is Kbuild is not executing in the directory where the Makefile is
located, so all custom rules shall use a relative located, so all custom rules shall use a relative
path to prerequisite files and target files. path to prerequisite files and target files.
Two variables are used when defining custom rules: Two variables are used when defining custom rules:
$(src) $(src)
$(src) is a relative path which points to the directory $(src) is a relative path which points to the directory
where the Makefile is located. Always use $(src) when where the Makefile is located. Always use $(src) when
referring to files located in the src tree. referring to files located in the src tree.
$(obj) $(obj)
$(obj) is a relative path which points to the directory $(obj) is a relative path which points to the directory
where the target is saved. Always use $(obj) when where the target is saved. Always use $(obj) when
referring to generated files. referring to generated files.
...@@ -448,7 +449,7 @@ Custom Rules ...@@ -448,7 +449,7 @@ Custom Rules
to prerequisites are referenced with $(src) (because they are not to prerequisites are referenced with $(src) (because they are not
generated files). generated files).
$(kecho) $(kecho)
echoing information to user in a rule is often a good practice echoing information to user in a rule is often a good practice
but when execution "make -s" one does not expect to see any output but when execution "make -s" one does not expect to see any output
except for warnings/errors. except for warnings/errors.
...@@ -479,7 +480,7 @@ Custom Rules ...@@ -479,7 +480,7 @@ Custom Rules
$(obj)/crc32table.h: $(obj)/gen_crc32table $(obj)/crc32table.h: $(obj)/gen_crc32table
$(call cmd,crc32) $(call cmd,crc32)
When updating the $(obj)/crc32table.h target, the line: When updating the $(obj)/crc32table.h target, the line::
GEN lib/crc32table.h GEN lib/crc32table.h
...@@ -488,15 +489,15 @@ Custom Rules ...@@ -488,15 +489,15 @@ Custom Rules
Command change detection Command change detection
------------------------ ------------------------
When the rule is evaluated, timestamps are compared between the target When the rule is evaluated, timestamps are compared between the target
and its prerequisite files. GNU Make updates the target when any of the and its prerequisite files. GNU Make updates the target when any of the
prerequisites is newer than that. prerequisites is newer than that.
The target should be rebuilt also when the command line has changed The target should be rebuilt also when the command line has changed
since the last invocation. This is not supported by Make itself, so since the last invocation. This is not supported by Make itself, so
Kbuild achieves this by a kind of meta-programming. Kbuild achieves this by a kind of meta-programming.
if_changed is the macro used for this purpose, in the following form:: if_changed is the macro used for this purpose, in the following form::
quiet_cmd_<command> = ... quiet_cmd_<command> = ...
cmd_<command> = ... cmd_<command> = ...
...@@ -504,27 +505,27 @@ Command change detection ...@@ -504,27 +505,27 @@ Command change detection
<target>: <source(s)> FORCE <target>: <source(s)> FORCE
$(call if_changed,<command>) $(call if_changed,<command>)
Any target that utilizes if_changed must be listed in $(targets), Any target that utilizes if_changed must be listed in $(targets),
otherwise the command line check will fail, and the target will otherwise the command line check will fail, and the target will
always be built. always be built.
If the target is already listed in the recognized syntax such as If the target is already listed in the recognized syntax such as
obj-y/m, lib-y/m, extra-y/m, always-y/m, hostprogs, userprogs, Kbuild obj-y/m, lib-y/m, extra-y/m, always-y/m, hostprogs, userprogs, Kbuild
automatically adds it to $(targets). Otherwise, the target must be automatically adds it to $(targets). Otherwise, the target must be
explicitly added to $(targets). explicitly added to $(targets).
Assignments to $(targets) are without $(obj)/ prefix. if_changed may be Assignments to $(targets) are without $(obj)/ prefix. if_changed may be
used in conjunction with custom rules as defined in `Custom Rules`_. used in conjunction with custom rules as defined in `Custom Rules`_.
Note: It is a typical mistake to forget the FORCE prerequisite. Note: It is a typical mistake to forget the FORCE prerequisite.
Another common pitfall is that whitespace is sometimes significant; for Another common pitfall is that whitespace is sometimes significant; for
instance, the below will fail (note the extra space after the comma):: instance, the below will fail (note the extra space after the comma)::
target: source(s) FORCE target: source(s) FORCE
**WRONG!** $(call if_changed, objcopy) **WRONG!** $(call if_changed, objcopy)
Note: Note:
if_changed should not be used more than once per target. if_changed should not be used more than once per target.
It stores the executed command in a corresponding .cmd It stores the executed command in a corresponding .cmd
file and multiple calls would result in overwrites and file and multiple calls would result in overwrites and
...@@ -534,13 +535,13 @@ Command change detection ...@@ -534,13 +535,13 @@ Command change detection
$(CC) support functions $(CC) support functions
----------------------- -----------------------
The kernel may be built with several different versions of The kernel may be built with several different versions of
$(CC), each supporting a unique set of features and options. $(CC), each supporting a unique set of features and options.
kbuild provides basic support to check for valid options for $(CC). kbuild provides basic support to check for valid options for $(CC).
$(CC) is usually the gcc compiler, but other alternatives are $(CC) is usually the gcc compiler, but other alternatives are
available. available.
as-option as-option
as-option is used to check if $(CC) -- when used to compile as-option is used to check if $(CC) -- when used to compile
assembler (`*.S`) files -- supports the given option. An optional assembler (`*.S`) files -- supports the given option. An optional
second option may be specified if the first option is not supported. second option may be specified if the first option is not supported.
...@@ -555,13 +556,13 @@ $(CC) support functions ...@@ -555,13 +556,13 @@ $(CC) support functions
The second argument is optional, and if supplied will be used The second argument is optional, and if supplied will be used
if first argument is not supported. if first argument is not supported.
as-instr as-instr
as-instr checks if the assembler reports a specific instruction as-instr checks if the assembler reports a specific instruction
and then outputs either option1 or option2 and then outputs either option1 or option2
C escapes are supported in the test instruction C escapes are supported in the test instruction
Note: as-instr-option uses KBUILD_AFLAGS for assembler options Note: as-instr-option uses KBUILD_AFLAGS for assembler options
cc-option cc-option
cc-option is used to check if $(CC) supports a given option, and if cc-option is used to check if $(CC) supports a given option, and if
not supported to use an optional second option. not supported to use an optional second option.
...@@ -576,7 +577,7 @@ $(CC) support functions ...@@ -576,7 +577,7 @@ $(CC) support functions
cflags-y will be assigned no value if first option is not supported. cflags-y will be assigned no value if first option is not supported.
Note: cc-option uses KBUILD_CFLAGS for $(CC) options Note: cc-option uses KBUILD_CFLAGS for $(CC) options
cc-option-yn cc-option-yn
cc-option-yn is used to check if gcc supports a given option cc-option-yn is used to check if gcc supports a given option
and return 'y' if supported, otherwise 'n'. and return 'y' if supported, otherwise 'n'.
...@@ -591,9 +592,10 @@ $(CC) support functions ...@@ -591,9 +592,10 @@ $(CC) support functions
option. When $(biarch) equals 'y', the expanded variables $(aflags-y) option. When $(biarch) equals 'y', the expanded variables $(aflags-y)
and $(cflags-y) will be assigned the values -a32 and -m32, and $(cflags-y) will be assigned the values -a32 and -m32,
respectively. respectively.
Note: cc-option-yn uses KBUILD_CFLAGS for $(CC) options Note: cc-option-yn uses KBUILD_CFLAGS for $(CC) options
cc-disable-warning cc-disable-warning
cc-disable-warning checks if gcc supports a given warning and returns cc-disable-warning checks if gcc supports a given warning and returns
the commandline switch to disable it. This special function is needed, the commandline switch to disable it. This special function is needed,
because gcc 4.4 and later accept any unknown -Wno-* option and only because gcc 4.4 and later accept any unknown -Wno-* option and only
...@@ -606,7 +608,7 @@ $(CC) support functions ...@@ -606,7 +608,7 @@ $(CC) support functions
In the above example, -Wno-unused-but-set-variable will be added to In the above example, -Wno-unused-but-set-variable will be added to
KBUILD_CFLAGS only if gcc really accepts it. KBUILD_CFLAGS only if gcc really accepts it.
gcc-min-version gcc-min-version
gcc-min-version tests if the value of $(CONFIG_GCC_VERSION) is greater than gcc-min-version tests if the value of $(CONFIG_GCC_VERSION) is greater than
or equal to the provided value and evaluates to y if so. or equal to the provided value and evaluates to y if so.
...@@ -617,7 +619,7 @@ $(CC) support functions ...@@ -617,7 +619,7 @@ $(CC) support functions
In this example, cflags-y will be assigned the value -foo if $(CC) is gcc and In this example, cflags-y will be assigned the value -foo if $(CC) is gcc and
$(CONFIG_GCC_VERSION) is >= 7.1. $(CONFIG_GCC_VERSION) is >= 7.1.
clang-min-version clang-min-version
clang-min-version tests if the value of $(CONFIG_CLANG_VERSION) is greater clang-min-version tests if the value of $(CONFIG_CLANG_VERSION) is greater
than or equal to the provided value and evaluates to y if so. than or equal to the provided value and evaluates to y if so.
...@@ -628,16 +630,19 @@ $(CC) support functions ...@@ -628,16 +630,19 @@ $(CC) support functions
In this example, cflags-y will be assigned the value -foo if $(CC) is clang In this example, cflags-y will be assigned the value -foo if $(CC) is clang
and $(CONFIG_CLANG_VERSION) is >= 11.0.0. and $(CONFIG_CLANG_VERSION) is >= 11.0.0.
cc-cross-prefix cc-cross-prefix
cc-cross-prefix is used to check if there exists a $(CC) in path with cc-cross-prefix is used to check if there exists a $(CC) in path with
one of the listed prefixes. The first prefix where there exist a one of the listed prefixes. The first prefix where there exist a
prefix$(CC) in the PATH is returned - and if no prefix$(CC) is found prefix$(CC) in the PATH is returned - and if no prefix$(CC) is found
then nothing is returned. then nothing is returned.
Additional prefixes are separated by a single space in the Additional prefixes are separated by a single space in the
call of cc-cross-prefix. call of cc-cross-prefix.
This functionality is useful for architecture Makefiles that try This functionality is useful for architecture Makefiles that try
to set CROSS_COMPILE to well-known values but may have several to set CROSS_COMPILE to well-known values but may have several
values to select between. values to select between.
It is recommended only to try to set CROSS_COMPILE if it is a cross It is recommended only to try to set CROSS_COMPILE if it is a cross
build (host arch is different from target arch). And if CROSS_COMPILE build (host arch is different from target arch). And if CROSS_COMPILE
is already set then leave it with the old value. is already set then leave it with the old value.
...@@ -654,9 +659,10 @@ $(CC) support functions ...@@ -654,9 +659,10 @@ $(CC) support functions
$(LD) support functions $(LD) support functions
----------------------- -----------------------
ld-option ld-option
ld-option is used to check if $(LD) supports the supplied option. ld-option is used to check if $(LD) supports the supplied option.
ld-option takes two options as arguments. ld-option takes two options as arguments.
The second argument is an optional option that can be used if the The second argument is an optional option that can be used if the
first option is not supported by $(LD). first option is not supported by $(LD).
...@@ -668,18 +674,18 @@ $(LD) support functions ...@@ -668,18 +674,18 @@ $(LD) support functions
Script invocation Script invocation
----------------- -----------------
Make rules may invoke scripts to build the kernel. The rules shall Make rules may invoke scripts to build the kernel. The rules shall
always provide the appropriate interpreter to execute the script. They always provide the appropriate interpreter to execute the script. They
shall not rely on the execute bits being set, and shall not invoke the shall not rely on the execute bits being set, and shall not invoke the
script directly. For the convenience of manual script invocation, such script directly. For the convenience of manual script invocation, such
as invoking ./scripts/checkpatch.pl, it is recommended to set execute as invoking ./scripts/checkpatch.pl, it is recommended to set execute
bits on the scripts nonetheless. bits on the scripts nonetheless.
Kbuild provides variables $(CONFIG_SHELL), $(AWK), $(PERL), Kbuild provides variables $(CONFIG_SHELL), $(AWK), $(PERL),
and $(PYTHON3) to refer to interpreters for the respective and $(PYTHON3) to refer to interpreters for the respective
scripts. scripts.
Example:: Example::
#Makefile #Makefile
cmd_depmod = $(CONFIG_SHELL) $(srctree)/scripts/depmod.sh $(DEPMOD) \ cmd_depmod = $(CONFIG_SHELL) $(srctree)/scripts/depmod.sh $(DEPMOD) \
...@@ -690,6 +696,7 @@ Host Program support ...@@ -690,6 +696,7 @@ Host Program support
Kbuild supports building executables on the host for use during the Kbuild supports building executables on the host for use during the
compilation stage. compilation stage.
Two steps are required in order to use a host executable. Two steps are required in order to use a host executable.
The first step is to tell kbuild that a host program exists. This is The first step is to tell kbuild that a host program exists. This is
...@@ -703,61 +710,62 @@ Both possibilities are described in the following. ...@@ -703,61 +710,62 @@ Both possibilities are described in the following.
Simple Host Program Simple Host Program
------------------- -------------------
In some cases there is a need to compile and run a program on the In some cases there is a need to compile and run a program on the
computer where the build is running. computer where the build is running.
The following line tells kbuild that the program bin2hex shall be
built on the build host.
Example:: The following line tells kbuild that the program bin2hex shall be
built on the build host.
Example::
hostprogs := bin2hex hostprogs := bin2hex
Kbuild assumes in the above example that bin2hex is made from a single Kbuild assumes in the above example that bin2hex is made from a single
c-source file named bin2hex.c located in the same directory as c-source file named bin2hex.c located in the same directory as
the Makefile. the Makefile.
Composite Host Programs Composite Host Programs
----------------------- -----------------------
Host programs can be made up based on composite objects. Host programs can be made up based on composite objects.
The syntax used to define composite objects for host programs is The syntax used to define composite objects for host programs is
similar to the syntax used for kernel objects. similar to the syntax used for kernel objects.
$(<executable>-objs) lists all objects used to link the final $(<executable>-objs) lists all objects used to link the final
executable. executable.
Example:: Example::
#scripts/lxdialog/Makefile #scripts/lxdialog/Makefile
hostprogs := lxdialog hostprogs := lxdialog
lxdialog-objs := checklist.o lxdialog.o lxdialog-objs := checklist.o lxdialog.o
Objects with extension .o are compiled from the corresponding .c Objects with extension .o are compiled from the corresponding .c
files. In the above example, checklist.c is compiled to checklist.o files. In the above example, checklist.c is compiled to checklist.o
and lxdialog.c is compiled to lxdialog.o. and lxdialog.c is compiled to lxdialog.o.
Finally, the two .o files are linked to the executable, lxdialog. Finally, the two .o files are linked to the executable, lxdialog.
Note: The syntax <executable>-y is not permitted for host-programs. Note: The syntax <executable>-y is not permitted for host-programs.
Using C++ for host programs Using C++ for host programs
--------------------------- ---------------------------
kbuild offers support for host programs written in C++. This was kbuild offers support for host programs written in C++. This was
introduced solely to support kconfig, and is not recommended introduced solely to support kconfig, and is not recommended
for general use. for general use.
Example:: Example::
#scripts/kconfig/Makefile #scripts/kconfig/Makefile
hostprogs := qconf hostprogs := qconf
qconf-cxxobjs := qconf.o qconf-cxxobjs := qconf.o
In the example above the executable is composed of the C++ file In the example above the executable is composed of the C++ file
qconf.cc - identified by $(qconf-cxxobjs). qconf.cc - identified by $(qconf-cxxobjs).
If qconf is composed of a mixture of .c and .cc files, then an If qconf is composed of a mixture of .c and .cc files, then an
additional line can be used to identify this. additional line can be used to identify this.
Example:: Example::
#scripts/kconfig/Makefile #scripts/kconfig/Makefile
hostprogs := qconf hostprogs := qconf
...@@ -767,60 +775,62 @@ Using C++ for host programs ...@@ -767,60 +775,62 @@ Using C++ for host programs
Using Rust for host programs Using Rust for host programs
---------------------------- ----------------------------
Kbuild offers support for host programs written in Rust. However, Kbuild offers support for host programs written in Rust. However,
since a Rust toolchain is not mandatory for kernel compilation, since a Rust toolchain is not mandatory for kernel compilation,
it may only be used in scenarios where Rust is required to be it may only be used in scenarios where Rust is required to be
available (e.g. when ``CONFIG_RUST`` is enabled). available (e.g. when ``CONFIG_RUST`` is enabled).
Example:: Example::
hostprogs := target hostprogs := target
target-rust := y target-rust := y
Kbuild will compile ``target`` using ``target.rs`` as the crate root, Kbuild will compile ``target`` using ``target.rs`` as the crate root,
located in the same directory as the ``Makefile``. The crate may located in the same directory as the ``Makefile``. The crate may
consist of several source files (see ``samples/rust/hostprogs``). consist of several source files (see ``samples/rust/hostprogs``).
Controlling compiler options for host programs Controlling compiler options for host programs
---------------------------------------------- ----------------------------------------------
When compiling host programs, it is possible to set specific flags. When compiling host programs, it is possible to set specific flags.
The programs will always be compiled utilising $(HOSTCC) passed The programs will always be compiled utilising $(HOSTCC) passed
the options specified in $(KBUILD_HOSTCFLAGS). the options specified in $(KBUILD_HOSTCFLAGS).
To set flags that will take effect for all host programs created
in that Makefile, use the variable HOST_EXTRACFLAGS.
Example:: To set flags that will take effect for all host programs created
in that Makefile, use the variable HOST_EXTRACFLAGS.
Example::
#scripts/lxdialog/Makefile #scripts/lxdialog/Makefile
HOST_EXTRACFLAGS += -I/usr/include/ncurses HOST_EXTRACFLAGS += -I/usr/include/ncurses
To set specific flags for a single file the following construction To set specific flags for a single file the following construction
is used: is used:
Example:: Example::
#arch/ppc64/boot/Makefile #arch/ppc64/boot/Makefile
HOSTCFLAGS_piggyback.o := -DKERNELBASE=$(KERNELBASE) HOSTCFLAGS_piggyback.o := -DKERNELBASE=$(KERNELBASE)
It is also possible to specify additional options to the linker. It is also possible to specify additional options to the linker.
Example:: Example::
#scripts/kconfig/Makefile #scripts/kconfig/Makefile
HOSTLDLIBS_qconf := -L$(QTDIR)/lib HOSTLDLIBS_qconf := -L$(QTDIR)/lib
When linking qconf, it will be passed the extra option When linking qconf, it will be passed the extra option
"-L$(QTDIR)/lib". "-L$(QTDIR)/lib".
When host programs are actually built When host programs are actually built
------------------------------------- -------------------------------------
Kbuild will only build host-programs when they are referenced Kbuild will only build host-programs when they are referenced
as a prerequisite. as a prerequisite.
This is possible in two ways:
This is possible in two ways:
(1) List the prerequisite explicitly in a custom rule. (1) List the prerequisite explicitly in a custom rule.
Example:: Example::
...@@ -833,7 +843,7 @@ When host programs are actually built ...@@ -833,7 +843,7 @@ When host programs are actually built
$(obj)/gen-devlist is updated. Note that references to $(obj)/gen-devlist is updated. Note that references to
the host programs in custom rules must be prefixed with $(obj). the host programs in custom rules must be prefixed with $(obj).
(2) Use always-y (2) Use always-y
When there is no suitable custom rule, and the host program When there is no suitable custom rule, and the host program
shall be built when a makefile is entered, the always-y shall be built when a makefile is entered, the always-y
...@@ -845,7 +855,7 @@ When host programs are actually built ...@@ -845,7 +855,7 @@ When host programs are actually built
hostprogs := lxdialog hostprogs := lxdialog
always-y := $(hostprogs) always-y := $(hostprogs)
Kbuild provides the following shorthand for this: Kbuild provides the following shorthand for this::
hostprogs-always-y := lxdialog hostprogs-always-y := lxdialog
...@@ -865,78 +875,79 @@ The syntax is quite similar. The difference is to use "userprogs" instead of ...@@ -865,78 +875,79 @@ The syntax is quite similar. The difference is to use "userprogs" instead of
Simple Userspace Program Simple Userspace Program
------------------------ ------------------------
The following line tells kbuild that the program bpf-direct shall be The following line tells kbuild that the program bpf-direct shall be
built for the target architecture. built for the target architecture.
Example:: Example::
userprogs := bpf-direct userprogs := bpf-direct
Kbuild assumes in the above example that bpf-direct is made from a Kbuild assumes in the above example that bpf-direct is made from a
single C source file named bpf-direct.c located in the same directory single C source file named bpf-direct.c located in the same directory
as the Makefile. as the Makefile.
Composite Userspace Programs Composite Userspace Programs
---------------------------- ----------------------------
Userspace programs can be made up based on composite objects. Userspace programs can be made up based on composite objects.
The syntax used to define composite objects for userspace programs is The syntax used to define composite objects for userspace programs is
similar to the syntax used for kernel objects. similar to the syntax used for kernel objects.
$(<executable>-objs) lists all objects used to link the final $(<executable>-objs) lists all objects used to link the final
executable. executable.
Example:: Example::
#samples/seccomp/Makefile #samples/seccomp/Makefile
userprogs := bpf-fancy userprogs := bpf-fancy
bpf-fancy-objs := bpf-fancy.o bpf-helper.o bpf-fancy-objs := bpf-fancy.o bpf-helper.o
Objects with extension .o are compiled from the corresponding .c Objects with extension .o are compiled from the corresponding .c
files. In the above example, bpf-fancy.c is compiled to bpf-fancy.o files. In the above example, bpf-fancy.c is compiled to bpf-fancy.o
and bpf-helper.c is compiled to bpf-helper.o. and bpf-helper.c is compiled to bpf-helper.o.
Finally, the two .o files are linked to the executable, bpf-fancy. Finally, the two .o files are linked to the executable, bpf-fancy.
Note: The syntax <executable>-y is not permitted for userspace programs. Note: The syntax <executable>-y is not permitted for userspace programs.
Controlling compiler options for userspace programs Controlling compiler options for userspace programs
--------------------------------------------------- ---------------------------------------------------
When compiling userspace programs, it is possible to set specific flags. When compiling userspace programs, it is possible to set specific flags.
The programs will always be compiled utilising $(CC) passed The programs will always be compiled utilising $(CC) passed
the options specified in $(KBUILD_USERCFLAGS). the options specified in $(KBUILD_USERCFLAGS).
To set flags that will take effect for all userspace programs created
in that Makefile, use the variable userccflags.
Example:: To set flags that will take effect for all userspace programs created
in that Makefile, use the variable userccflags.
Example::
# samples/seccomp/Makefile # samples/seccomp/Makefile
userccflags += -I usr/include userccflags += -I usr/include
To set specific flags for a single file the following construction To set specific flags for a single file the following construction
is used: is used:
Example:: Example::
bpf-helper-userccflags += -I user/include bpf-helper-userccflags += -I user/include
It is also possible to specify additional options to the linker. It is also possible to specify additional options to the linker.
Example:: Example::
# net/bpfilter/Makefile # net/bpfilter/Makefile
bpfilter_umh-userldflags += -static bpfilter_umh-userldflags += -static
When linking bpfilter_umh, it will be passed the extra option -static. When linking bpfilter_umh, it will be passed the extra option -static.
From command line, :ref:`USERCFLAGS and USERLDFLAGS <userkbuildflags>` will also be used. From command line, :ref:`USERCFLAGS and USERLDFLAGS <userkbuildflags>` will also be used.
When userspace programs are actually built When userspace programs are actually built
------------------------------------------ ------------------------------------------
Kbuild builds userspace programs only when told to do so. Kbuild builds userspace programs only when told to do so.
There are two ways to do this. There are two ways to do this.
(1) Add it as the prerequisite of another file (1) Add it as the prerequisite of another file
Example:: Example::
...@@ -946,14 +957,14 @@ When userspace programs are actually built ...@@ -946,14 +957,14 @@ When userspace programs are actually built
$(obj)/bpfilter_umh is built before $(obj)/bpfilter_umh_blob.o $(obj)/bpfilter_umh is built before $(obj)/bpfilter_umh_blob.o
(2) Use always-y (2) Use always-y
Example:: Example::
userprogs := binderfs_example userprogs := binderfs_example
always-y := $(userprogs) always-y := $(userprogs)
Kbuild provides the following shorthand for this: Kbuild provides the following shorthand for this::
userprogs-always-y := binderfs_example userprogs-always-y := binderfs_example
...@@ -974,7 +985,7 @@ source tree when "make clean" is executed. ...@@ -974,7 +985,7 @@ source tree when "make clean" is executed.
Additional files or directories can be specified in kbuild makefiles by use of Additional files or directories can be specified in kbuild makefiles by use of
$(clean-files). $(clean-files).
Example:: Example::
#lib/Makefile #lib/Makefile
clean-files := crc32table.h clean-files := crc32table.h
...@@ -990,7 +1001,7 @@ Usually kbuild descends down in subdirectories due to "obj-* := dir/", ...@@ -990,7 +1001,7 @@ Usually kbuild descends down in subdirectories due to "obj-* := dir/",
but in the architecture makefiles where the kbuild infrastructure but in the architecture makefiles where the kbuild infrastructure
is not sufficient this sometimes needs to be explicit. is not sufficient this sometimes needs to be explicit.
Example:: Example::
#arch/x86/boot/Makefile #arch/x86/boot/Makefile
subdir- := compressed subdir- := compressed
...@@ -1010,34 +1021,43 @@ Architecture Makefiles ...@@ -1010,34 +1021,43 @@ Architecture Makefiles
The top level Makefile sets up the environment and does the preparation, The top level Makefile sets up the environment and does the preparation,
before starting to descend down in the individual directories. before starting to descend down in the individual directories.
The top level makefile contains the generic part, whereas The top level makefile contains the generic part, whereas
arch/$(SRCARCH)/Makefile contains what is required to set up kbuild arch/$(SRCARCH)/Makefile contains what is required to set up kbuild
for said architecture. for said architecture.
To do so, arch/$(SRCARCH)/Makefile sets up a number of variables and defines To do so, arch/$(SRCARCH)/Makefile sets up a number of variables and defines
a few targets. a few targets.
When kbuild executes, the following steps are followed (roughly): When kbuild executes, the following steps are followed (roughly):
1) Configuration of the kernel => produce .config 1) Configuration of the kernel => produce .config
2) Store kernel version in include/linux/version.h 2) Store kernel version in include/linux/version.h
3) Updating all other prerequisites to the target prepare: 3) Updating all other prerequisites to the target prepare:
- Additional prerequisites are specified in arch/$(SRCARCH)/Makefile - Additional prerequisites are specified in arch/$(SRCARCH)/Makefile
4) Recursively descend down in all directories listed in 4) Recursively descend down in all directories listed in
init-* core* drivers-* net-* libs-* and build all targets. init-* core* drivers-* net-* libs-* and build all targets.
- The values of the above variables are expanded in arch/$(SRCARCH)/Makefile. - The values of the above variables are expanded in arch/$(SRCARCH)/Makefile.
5) All object files are then linked and the resulting file vmlinux is 5) All object files are then linked and the resulting file vmlinux is
located at the root of the obj tree. located at the root of the obj tree.
The very first objects linked are listed in scripts/head-object-list.txt. The very first objects linked are listed in scripts/head-object-list.txt.
6) Finally, the architecture-specific part does any required post processing 6) Finally, the architecture-specific part does any required post processing
and builds the final bootimage. and builds the final bootimage.
- This includes building boot records - This includes building boot records
- Preparing initrd images and the like - Preparing initrd images and the like
Set variables to tweak the build to the architecture Set variables to tweak the build to the architecture
---------------------------------------------------- ----------------------------------------------------
KBUILD_LDFLAGS KBUILD_LDFLAGS
Generic $(LD) options Generic $(LD) options
Flags used for all invocations of the linker. Flags used for all invocations of the linker.
...@@ -1051,11 +1071,12 @@ Set variables to tweak the build to the architecture ...@@ -1051,11 +1071,12 @@ Set variables to tweak the build to the architecture
Note: ldflags-y can be used to further customise Note: ldflags-y can be used to further customise
the flags used. See `Non-builtin vmlinux targets - extra-y`_. the flags used. See `Non-builtin vmlinux targets - extra-y`_.
LDFLAGS_vmlinux LDFLAGS_vmlinux
Options for $(LD) when linking vmlinux Options for $(LD) when linking vmlinux
LDFLAGS_vmlinux is used to specify additional flags to pass to LDFLAGS_vmlinux is used to specify additional flags to pass to
the linker when linking the final vmlinux image. the linker when linking the final vmlinux image.
LDFLAGS_vmlinux uses the LDFLAGS_$@ support. LDFLAGS_vmlinux uses the LDFLAGS_$@ support.
Example:: Example::
...@@ -1063,11 +1084,12 @@ Set variables to tweak the build to the architecture ...@@ -1063,11 +1084,12 @@ Set variables to tweak the build to the architecture
#arch/x86/Makefile #arch/x86/Makefile
LDFLAGS_vmlinux := -e stext LDFLAGS_vmlinux := -e stext
OBJCOPYFLAGS OBJCOPYFLAGS
objcopy flags objcopy flags
When $(call if_changed,objcopy) is used to translate a .o file, When $(call if_changed,objcopy) is used to translate a .o file,
the flags specified in OBJCOPYFLAGS will be used. the flags specified in OBJCOPYFLAGS will be used.
$(call if_changed,objcopy) is often used to generate raw binaries on $(call if_changed,objcopy) is often used to generate raw binaries on
vmlinux. vmlinux.
...@@ -1083,10 +1105,11 @@ Set variables to tweak the build to the architecture ...@@ -1083,10 +1105,11 @@ Set variables to tweak the build to the architecture
In this example, the binary $(obj)/image is a binary version of In this example, the binary $(obj)/image is a binary version of
vmlinux. The usage of $(call if_changed,xxx) will be described later. vmlinux. The usage of $(call if_changed,xxx) will be described later.
KBUILD_AFLAGS KBUILD_AFLAGS
Assembler flags Assembler flags
Default value - see top level Makefile Default value - see top level Makefile.
Append or modify as required per architecture. Append or modify as required per architecture.
Example:: Example::
...@@ -1094,10 +1117,11 @@ Set variables to tweak the build to the architecture ...@@ -1094,10 +1117,11 @@ Set variables to tweak the build to the architecture
#arch/sparc64/Makefile #arch/sparc64/Makefile
KBUILD_AFLAGS += -m64 -mcpu=ultrasparc KBUILD_AFLAGS += -m64 -mcpu=ultrasparc
KBUILD_CFLAGS KBUILD_CFLAGS
$(CC) compiler flags $(CC) compiler flags
Default value - see top level Makefile Default value - see top level Makefile.
Append or modify as required per architecture. Append or modify as required per architecture.
Often, the KBUILD_CFLAGS variable depends on the configuration. Often, the KBUILD_CFLAGS variable depends on the configuration.
...@@ -1126,10 +1150,11 @@ Set variables to tweak the build to the architecture ...@@ -1126,10 +1150,11 @@ Set variables to tweak the build to the architecture
The first example utilises the trick that a config option expands The first example utilises the trick that a config option expands
to 'y' when selected. to 'y' when selected.
KBUILD_RUSTFLAGS KBUILD_RUSTFLAGS
$(RUSTC) compiler flags $(RUSTC) compiler flags
Default value - see top level Makefile Default value - see top level Makefile.
Append or modify as required per architecture. Append or modify as required per architecture.
Often, the KBUILD_RUSTFLAGS variable depends on the configuration. Often, the KBUILD_RUSTFLAGS variable depends on the configuration.
...@@ -1137,13 +1162,13 @@ Set variables to tweak the build to the architecture ...@@ -1137,13 +1162,13 @@ Set variables to tweak the build to the architecture
Note that target specification file generation (for ``--target``) Note that target specification file generation (for ``--target``)
is handled in ``scripts/generate_rust_target.rs``. is handled in ``scripts/generate_rust_target.rs``.
KBUILD_AFLAGS_KERNEL KBUILD_AFLAGS_KERNEL
Assembler options specific for built-in Assembler options specific for built-in
$(KBUILD_AFLAGS_KERNEL) contains extra C compiler flags used to compile $(KBUILD_AFLAGS_KERNEL) contains extra C compiler flags used to compile
resident kernel code. resident kernel code.
KBUILD_AFLAGS_MODULE KBUILD_AFLAGS_MODULE
Assembler options specific for modules Assembler options specific for modules
$(KBUILD_AFLAGS_MODULE) is used to add arch-specific options that $(KBUILD_AFLAGS_MODULE) is used to add arch-specific options that
...@@ -1151,33 +1176,35 @@ Set variables to tweak the build to the architecture ...@@ -1151,33 +1176,35 @@ Set variables to tweak the build to the architecture
From commandline AFLAGS_MODULE shall be used (see kbuild.rst). From commandline AFLAGS_MODULE shall be used (see kbuild.rst).
KBUILD_CFLAGS_KERNEL KBUILD_CFLAGS_KERNEL
$(CC) options specific for built-in $(CC) options specific for built-in
$(KBUILD_CFLAGS_KERNEL) contains extra C compiler flags used to compile $(KBUILD_CFLAGS_KERNEL) contains extra C compiler flags used to compile
resident kernel code. resident kernel code.
KBUILD_CFLAGS_MODULE KBUILD_CFLAGS_MODULE
Options for $(CC) when building modules Options for $(CC) when building modules
$(KBUILD_CFLAGS_MODULE) is used to add arch-specific options that $(KBUILD_CFLAGS_MODULE) is used to add arch-specific options that
are used for $(CC). are used for $(CC).
From commandline CFLAGS_MODULE shall be used (see kbuild.rst). From commandline CFLAGS_MODULE shall be used (see kbuild.rst).
KBUILD_RUSTFLAGS_KERNEL KBUILD_RUSTFLAGS_KERNEL
$(RUSTC) options specific for built-in $(RUSTC) options specific for built-in
$(KBUILD_RUSTFLAGS_KERNEL) contains extra Rust compiler flags used to $(KBUILD_RUSTFLAGS_KERNEL) contains extra Rust compiler flags used to
compile resident kernel code. compile resident kernel code.
KBUILD_RUSTFLAGS_MODULE KBUILD_RUSTFLAGS_MODULE
Options for $(RUSTC) when building modules Options for $(RUSTC) when building modules
$(KBUILD_RUSTFLAGS_MODULE) is used to add arch-specific options that $(KBUILD_RUSTFLAGS_MODULE) is used to add arch-specific options that
are used for $(RUSTC). are used for $(RUSTC).
From commandline RUSTFLAGS_MODULE shall be used (see kbuild.rst). From commandline RUSTFLAGS_MODULE shall be used (see kbuild.rst).
KBUILD_LDFLAGS_MODULE KBUILD_LDFLAGS_MODULE
Options for $(LD) when linking modules Options for $(LD) when linking modules
$(KBUILD_LDFLAGS_MODULE) is used to add arch-specific options $(KBUILD_LDFLAGS_MODULE) is used to add arch-specific options
...@@ -1185,25 +1212,21 @@ Set variables to tweak the build to the architecture ...@@ -1185,25 +1212,21 @@ Set variables to tweak the build to the architecture
From commandline LDFLAGS_MODULE shall be used (see kbuild.rst). From commandline LDFLAGS_MODULE shall be used (see kbuild.rst).
KBUILD_LDS KBUILD_LDS
The linker script with full path. Assigned by the top-level Makefile. The linker script with full path. Assigned by the top-level Makefile.
KBUILD_LDS_MODULE KBUILD_LDS_MODULE
The module linker script with full path. Assigned by the top-level The module linker script with full path. Assigned by the top-level
Makefile and additionally by the arch Makefile. Makefile and additionally by the arch Makefile.
KBUILD_VMLINUX_OBJS KBUILD_VMLINUX_OBJS
All object files for vmlinux. They are linked to vmlinux in the same All object files for vmlinux. They are linked to vmlinux in the same
order as listed in KBUILD_VMLINUX_OBJS. order as listed in KBUILD_VMLINUX_OBJS.
The objects listed in scripts/head-object-list.txt are exceptions; The objects listed in scripts/head-object-list.txt are exceptions;
they are placed before the other objects. they are placed before the other objects.
KBUILD_VMLINUX_LIBS KBUILD_VMLINUX_LIBS
All .a "lib" files for vmlinux. KBUILD_VMLINUX_OBJS and All .a "lib" files for vmlinux. KBUILD_VMLINUX_OBJS and
KBUILD_VMLINUX_LIBS together specify all the object files used to KBUILD_VMLINUX_LIBS together specify all the object files used to
link vmlinux. link vmlinux.
...@@ -1211,42 +1234,40 @@ Set variables to tweak the build to the architecture ...@@ -1211,42 +1234,40 @@ Set variables to tweak the build to the architecture
Add prerequisites to archheaders Add prerequisites to archheaders
-------------------------------- --------------------------------
The archheaders: rule is used to generate header files that The archheaders: rule is used to generate header files that
may be installed into user space by "make header_install". may be installed into user space by "make header_install".
It is run before "make archprepare" when run on the
architecture itself.
It is run before "make archprepare" when run on the
architecture itself.
Add prerequisites to archprepare Add prerequisites to archprepare
-------------------------------- --------------------------------
The archprepare: rule is used to list prerequisites that need to be The archprepare: rule is used to list prerequisites that need to be
built before starting to descend down in the subdirectories. built before starting to descend down in the subdirectories.
This is usually used for header files containing assembler constants.
Example:: This is usually used for header files containing assembler constants.
Example::
#arch/arm/Makefile #arch/arm/Makefile
archprepare: maketools archprepare: maketools
In this example, the file target maketools will be processed In this example, the file target maketools will be processed
before descending down in the subdirectories. before descending down in the subdirectories.
See also chapter XXX-TODO that describes how kbuild supports
generating offset header files.
See also chapter XXX-TODO that describes how kbuild supports
generating offset header files.
List directories to visit when descending List directories to visit when descending
----------------------------------------- -----------------------------------------
An arch Makefile cooperates with the top Makefile to define variables An arch Makefile cooperates with the top Makefile to define variables
which specify how to build the vmlinux file. Note that there is no which specify how to build the vmlinux file. Note that there is no
corresponding arch-specific section for modules; the module-building corresponding arch-specific section for modules; the module-building
machinery is all architecture-independent. machinery is all architecture-independent.
core-y, libs-y, drivers-y
core-y, libs-y, drivers-y
$(libs-y) lists directories where a lib.a archive can be located. $(libs-y) lists directories where a lib.a archive can be located.
The rest list directories where a built-in.a object file can be The rest list directories where a built-in.a object file can be
...@@ -1273,65 +1294,67 @@ List directories to visit when descending ...@@ -1273,65 +1294,67 @@ List directories to visit when descending
Architecture-specific boot images Architecture-specific boot images
--------------------------------- ---------------------------------
An arch Makefile specifies goals that take the vmlinux file, compress An arch Makefile specifies goals that take the vmlinux file, compress
it, wrap it in bootstrapping code, and copy the resulting files it, wrap it in bootstrapping code, and copy the resulting files
somewhere. This includes various kinds of installation commands. somewhere. This includes various kinds of installation commands.
The actual goals are not standardized across architectures. The actual goals are not standardized across architectures.
It is common to locate any additional processing in a boot/ It is common to locate any additional processing in a boot/
directory below arch/$(SRCARCH)/. directory below arch/$(SRCARCH)/.
Kbuild does not provide any smart way to support building a Kbuild does not provide any smart way to support building a
target specified in boot/. Therefore arch/$(SRCARCH)/Makefile shall target specified in boot/. Therefore arch/$(SRCARCH)/Makefile shall
call make manually to build a target in boot/. call make manually to build a target in boot/.
The recommended approach is to include shortcuts in The recommended approach is to include shortcuts in
arch/$(SRCARCH)/Makefile, and use the full path when calling down arch/$(SRCARCH)/Makefile, and use the full path when calling down
into the arch/$(SRCARCH)/boot/Makefile. into the arch/$(SRCARCH)/boot/Makefile.
Example:: Example::
#arch/x86/Makefile #arch/x86/Makefile
boot := arch/x86/boot boot := arch/x86/boot
bzImage: vmlinux bzImage: vmlinux
$(Q)$(MAKE) $(build)=$(boot) $(boot)/$@ $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
"$(Q)$(MAKE) $(build)=<dir>" is the recommended way to invoke "$(Q)$(MAKE) $(build)=<dir>" is the recommended way to invoke
make in a subdirectory. make in a subdirectory.
There are no rules for naming architecture-specific targets, There are no rules for naming architecture-specific targets,
but executing "make help" will list all relevant targets. but executing "make help" will list all relevant targets.
To support this, $(archhelp) must be defined. To support this, $(archhelp) must be defined.
Example:: Example::
#arch/x86/Makefile #arch/x86/Makefile
define archhelp define archhelp
echo '* bzImage - Compressed kernel image (arch/x86/boot/bzImage)' echo '* bzImage - Compressed kernel image (arch/x86/boot/bzImage)'
endif endif
When make is executed without arguments, the first goal encountered When make is executed without arguments, the first goal encountered
will be built. In the top level Makefile the first goal present will be built. In the top level Makefile the first goal present
is all:. is all:.
An architecture shall always, per default, build a bootable image.
In "make help", the default goal is highlighted with a '*'.
Add a new prerequisite to all: to select a default goal different
from vmlinux.
Example:: An architecture shall always, per default, build a bootable image.
In "make help", the default goal is highlighted with a '*'.
Add a new prerequisite to all: to select a default goal different
from vmlinux.
Example::
#arch/x86/Makefile #arch/x86/Makefile
all: bzImage all: bzImage
When "make" is executed without arguments, bzImage will be built. When "make" is executed without arguments, bzImage will be built.
Commands useful for building a boot image Commands useful for building a boot image
----------------------------------------- -----------------------------------------
Kbuild provides a few macros that are useful when building a Kbuild provides a few macros that are useful when building a
boot image. boot image.
ld ld
Link target. Often, LDFLAGS_$@ is used to set specific options to ld. Link target. Often, LDFLAGS_$@ is used to set specific options to ld.
Example:: Example::
...@@ -1347,6 +1370,7 @@ Commands useful for building a boot image ...@@ -1347,6 +1370,7 @@ Commands useful for building a boot image
In this example, there are two possible targets, requiring different In this example, there are two possible targets, requiring different
options to the linker. The linker options are specified using the options to the linker. The linker options are specified using the
LDFLAGS_$@ syntax - one for each potential target. LDFLAGS_$@ syntax - one for each potential target.
$(targets) are assigned all potential targets, by which kbuild knows $(targets) are assigned all potential targets, by which kbuild knows
the targets and will: the targets and will:
...@@ -1361,12 +1385,13 @@ Commands useful for building a boot image ...@@ -1361,12 +1385,13 @@ Commands useful for building a boot image
resulting in the target file being recompiled for no resulting in the target file being recompiled for no
obvious reason. obvious reason.
objcopy objcopy
Copy binary. Uses OBJCOPYFLAGS usually specified in Copy binary. Uses OBJCOPYFLAGS usually specified in
arch/$(SRCARCH)/Makefile. arch/$(SRCARCH)/Makefile.
OBJCOPYFLAGS_$@ may be used to set additional options. OBJCOPYFLAGS_$@ may be used to set additional options.
gzip gzip
Compress target. Use maximum compression to compress target. Compress target. Use maximum compression to compress target.
Example:: Example::
...@@ -1375,7 +1400,7 @@ Commands useful for building a boot image ...@@ -1375,7 +1400,7 @@ Commands useful for building a boot image
$(obj)/vmlinux.bin.gz: $(vmlinux.bin.all-y) FORCE $(obj)/vmlinux.bin.gz: $(vmlinux.bin.all-y) FORCE
$(call if_changed,gzip) $(call if_changed,gzip)
dtc dtc
Create flattened device tree blob object suitable for linking Create flattened device tree blob object suitable for linking
into vmlinux. Device tree blobs linked into vmlinux are placed into vmlinux. Device tree blobs linked into vmlinux are placed
in an init section in the image. Platform code *must* copy the in an init section in the image. Platform code *must* copy the
...@@ -1395,23 +1420,26 @@ Commands useful for building a boot image ...@@ -1395,23 +1420,26 @@ Commands useful for building a boot image
Preprocessing linker scripts Preprocessing linker scripts
---------------------------- ----------------------------
When the vmlinux image is built, the linker script When the vmlinux image is built, the linker script
arch/$(SRCARCH)/kernel/vmlinux.lds is used. arch/$(SRCARCH)/kernel/vmlinux.lds is used.
The script is a preprocessed variant of the file vmlinux.lds.S
located in the same directory.
kbuild knows .lds files and includes a rule `*lds.S` -> `*lds`.
Example:: The script is a preprocessed variant of the file vmlinux.lds.S
located in the same directory.
kbuild knows .lds files and includes a rule `*lds.S` -> `*lds`.
Example::
#arch/x86/kernel/Makefile #arch/x86/kernel/Makefile
extra-y := vmlinux.lds extra-y := vmlinux.lds
The assignment to extra-y is used to tell kbuild to build the The assignment to extra-y is used to tell kbuild to build the
target vmlinux.lds. target vmlinux.lds.
The assignment to $(CPPFLAGS_vmlinux.lds) tells kbuild to use the
specified options when building the target vmlinux.lds.
When building the `*.lds` target, kbuild uses the variables:: The assignment to $(CPPFLAGS_vmlinux.lds) tells kbuild to use the
specified options when building the target vmlinux.lds.
When building the `*.lds` target, kbuild uses the variables::
KBUILD_CPPFLAGS : Set in top-level Makefile KBUILD_CPPFLAGS : Set in top-level Makefile
cppflags-y : May be set in the kbuild makefile cppflags-y : May be set in the kbuild makefile
...@@ -1419,33 +1447,35 @@ Preprocessing linker scripts ...@@ -1419,33 +1447,35 @@ Preprocessing linker scripts
Note that the full filename is used in this Note that the full filename is used in this
assignment. assignment.
The kbuild infrastructure for `*lds` files is used in several The kbuild infrastructure for `*lds` files is used in several
architecture-specific files. architecture-specific files.
Generic header files Generic header files
-------------------- --------------------
The directory include/asm-generic contains the header files The directory include/asm-generic contains the header files
that may be shared between individual architectures. that may be shared between individual architectures.
The recommended approach how to use a generic header file is
to list the file in the Kbuild file. The recommended approach how to use a generic header file is
See `generic-y`_ for further info on syntax etc. to list the file in the Kbuild file.
See `generic-y`_ for further info on syntax etc.
Post-link pass Post-link pass
-------------- --------------
If the file arch/xxx/Makefile.postlink exists, this makefile If the file arch/xxx/Makefile.postlink exists, this makefile
will be invoked for post-link objects (vmlinux and modules.ko) will be invoked for post-link objects (vmlinux and modules.ko)
for architectures to run post-link passes on. Must also handle for architectures to run post-link passes on. Must also handle
the clean target. the clean target.
This pass runs after kallsyms generation. If the architecture This pass runs after kallsyms generation. If the architecture
needs to modify symbol locations, rather than manipulate the needs to modify symbol locations, rather than manipulate the
kallsyms, it may be easier to add another postlink target for kallsyms, it may be easier to add another postlink target for
.tmp_vmlinux? targets to be called from link-vmlinux.sh. .tmp_vmlinux? targets to be called from link-vmlinux.sh.
For example, powerpc uses this to check relocation sanity of For example, powerpc uses this to check relocation sanity of
the linked vmlinux file. the linked vmlinux file.
Kbuild syntax for exported headers Kbuild syntax for exported headers
================================== ==================================
...@@ -1453,6 +1483,7 @@ Kbuild syntax for exported headers ...@@ -1453,6 +1483,7 @@ Kbuild syntax for exported headers
The kernel includes a set of headers that is exported to userspace. The kernel includes a set of headers that is exported to userspace.
Many headers can be exported as-is but other headers require a Many headers can be exported as-is but other headers require a
minimal pre-processing before they are ready for user-space. minimal pre-processing before they are ready for user-space.
The pre-processing does: The pre-processing does:
- drop kernel-specific annotations - drop kernel-specific annotations
...@@ -1465,55 +1496,56 @@ are exported. ...@@ -1465,55 +1496,56 @@ are exported.
A Kbuild file may be defined under arch/<arch>/include/uapi/asm/ and A Kbuild file may be defined under arch/<arch>/include/uapi/asm/ and
arch/<arch>/include/asm/ to list asm files coming from asm-generic. arch/<arch>/include/asm/ to list asm files coming from asm-generic.
See subsequent chapter for the syntax of the Kbuild file. See subsequent chapter for the syntax of the Kbuild file.
no-export-headers no-export-headers
----------------- -----------------
no-export-headers is essentially used by include/uapi/linux/Kbuild to no-export-headers is essentially used by include/uapi/linux/Kbuild to
avoid exporting specific headers (e.g. kvm.h) on architectures that do avoid exporting specific headers (e.g. kvm.h) on architectures that do
not support it. It should be avoided as much as possible. not support it. It should be avoided as much as possible.
generic-y generic-y
--------- ---------
If an architecture uses a verbatim copy of a header from If an architecture uses a verbatim copy of a header from
include/asm-generic then this is listed in the file include/asm-generic then this is listed in the file
arch/$(SRCARCH)/include/asm/Kbuild like this: arch/$(SRCARCH)/include/asm/Kbuild like this:
Example:: Example::
#arch/x86/include/asm/Kbuild #arch/x86/include/asm/Kbuild
generic-y += termios.h generic-y += termios.h
generic-y += rtc.h generic-y += rtc.h
During the prepare phase of the build a wrapper include During the prepare phase of the build a wrapper include
file is generated in the directory:: file is generated in the directory::
arch/$(SRCARCH)/include/generated/asm arch/$(SRCARCH)/include/generated/asm
When a header is exported where the architecture uses When a header is exported where the architecture uses
the generic header a similar wrapper is generated as part the generic header a similar wrapper is generated as part
of the set of exported headers in the directory:: of the set of exported headers in the directory::
usr/include/asm usr/include/asm
The generated wrapper will in both cases look like the following: The generated wrapper will in both cases look like the following:
Example: termios.h:: Example: termios.h::
#include <asm-generic/termios.h> #include <asm-generic/termios.h>
generated-y generated-y
----------- -----------
If an architecture generates other header files alongside generic-y If an architecture generates other header files alongside generic-y
wrappers, generated-y specifies them. wrappers, generated-y specifies them.
This prevents them being treated as stale asm-generic wrappers and This prevents them being treated as stale asm-generic wrappers and
removed. removed.
Example:: Example::
#arch/x86/include/asm/Kbuild #arch/x86/include/asm/Kbuild
generated-y += syscalls_32.h generated-y += syscalls_32.h
...@@ -1521,19 +1553,19 @@ generated-y ...@@ -1521,19 +1553,19 @@ generated-y
mandatory-y mandatory-y
----------- -----------
mandatory-y is essentially used by include/(uapi/)asm-generic/Kbuild mandatory-y is essentially used by include/(uapi/)asm-generic/Kbuild
to define the minimum set of ASM headers that all architectures must have. to define the minimum set of ASM headers that all architectures must have.
This works like optional generic-y. If a mandatory header is missing This works like optional generic-y. If a mandatory header is missing
in arch/$(SRCARCH)/include/(uapi/)/asm, Kbuild will automatically in arch/$(SRCARCH)/include/(uapi/)/asm, Kbuild will automatically
generate a wrapper of the asm-generic one. generate a wrapper of the asm-generic one.
Kbuild Variables Kbuild Variables
================ ================
The top Makefile exports the following variables: The top Makefile exports the following variables:
VERSION, PATCHLEVEL, SUBLEVEL, EXTRAVERSION VERSION, PATCHLEVEL, SUBLEVEL, EXTRAVERSION
These variables define the current kernel version. A few arch These variables define the current kernel version. A few arch
Makefiles actually use these values directly; they should use Makefiles actually use these values directly; they should use
$(KERNELRELEASE) instead. $(KERNELRELEASE) instead.
...@@ -1546,12 +1578,12 @@ The top Makefile exports the following variables: ...@@ -1546,12 +1578,12 @@ The top Makefile exports the following variables:
or additional patches. It is usually some non-numeric string or additional patches. It is usually some non-numeric string
such as "-pre4", and is often blank. such as "-pre4", and is often blank.
KERNELRELEASE KERNELRELEASE
$(KERNELRELEASE) is a single string such as "2.4.0-pre4", suitable $(KERNELRELEASE) is a single string such as "2.4.0-pre4", suitable
for constructing installation directory names or showing in for constructing installation directory names or showing in
version strings. Some arch Makefiles use it for this purpose. version strings. Some arch Makefiles use it for this purpose.
ARCH ARCH
This variable defines the target architecture, such as "i386", This variable defines the target architecture, such as "i386",
"arm", or "sparc". Some kbuild Makefiles test $(ARCH) to "arm", or "sparc". Some kbuild Makefiles test $(ARCH) to
determine which files to compile. determine which files to compile.
...@@ -1562,7 +1594,7 @@ The top Makefile exports the following variables: ...@@ -1562,7 +1594,7 @@ The top Makefile exports the following variables:
make ARCH=m68k ... make ARCH=m68k ...
SRCARCH SRCARCH
This variable specifies the directory in arch/ to build. This variable specifies the directory in arch/ to build.
ARCH and SRCARCH may not necessarily match. A couple of arch ARCH and SRCARCH may not necessarily match. A couple of arch
...@@ -1573,12 +1605,12 @@ The top Makefile exports the following variables: ...@@ -1573,12 +1605,12 @@ The top Makefile exports the following variables:
For all of them, SRCARCH=x86 because arch/x86/ supports both i386 and For all of them, SRCARCH=x86 because arch/x86/ supports both i386 and
x86_64. x86_64.
INSTALL_PATH INSTALL_PATH
This variable defines a place for the arch Makefiles to install This variable defines a place for the arch Makefiles to install
the resident kernel image and System.map file. the resident kernel image and System.map file.
Use this for architecture-specific install targets. Use this for architecture-specific install targets.
INSTALL_MOD_PATH, MODLIB INSTALL_MOD_PATH, MODLIB
$(INSTALL_MOD_PATH) specifies a prefix to $(MODLIB) for module $(INSTALL_MOD_PATH) specifies a prefix to $(MODLIB) for module
installation. This variable is not defined in the Makefile but installation. This variable is not defined in the Makefile but
may be passed in by the user if desired. may be passed in by the user if desired.
...@@ -1588,14 +1620,13 @@ The top Makefile exports the following variables: ...@@ -1588,14 +1620,13 @@ The top Makefile exports the following variables:
$(INSTALL_MOD_PATH)/lib/modules/$(KERNELRELEASE). The user may $(INSTALL_MOD_PATH)/lib/modules/$(KERNELRELEASE). The user may
override this value on the command line if desired. override this value on the command line if desired.
INSTALL_MOD_STRIP INSTALL_MOD_STRIP
If this variable is specified, it will cause modules to be stripped If this variable is specified, it will cause modules to be stripped
after they are installed. If INSTALL_MOD_STRIP is '1', then the after they are installed. If INSTALL_MOD_STRIP is '1', then the
default option --strip-debug will be used. Otherwise, the default option --strip-debug will be used. Otherwise, the
INSTALL_MOD_STRIP value will be used as the option(s) to the strip INSTALL_MOD_STRIP value will be used as the option(s) to the strip
command. command.
Makefile language Makefile language
================= =================
......
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