Commit 9f2ade33 authored by Christian König's avatar Christian König Committed by Alex Deucher

drm/amdgpu: send VCE IB tests directly to the ring again

We need the IB test for GPU resets as well and
the scheduler should be stoped then.
Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucer@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent d7af97db
...@@ -337,7 +337,7 @@ void amdgpu_vce_free_handles(struct amdgpu_device *adev, struct drm_file *filp) ...@@ -337,7 +337,7 @@ void amdgpu_vce_free_handles(struct amdgpu_device *adev, struct drm_file *filp)
amdgpu_vce_note_usage(adev); amdgpu_vce_note_usage(adev);
r = amdgpu_vce_get_destroy_msg(ring, handle, NULL); r = amdgpu_vce_get_destroy_msg(ring, handle, false, NULL);
if (r) if (r)
DRM_ERROR("Error destroying VCE handle (%d)!\n", r); DRM_ERROR("Error destroying VCE handle (%d)!\n", r);
...@@ -411,9 +411,11 @@ int amdgpu_vce_get_create_msg(struct amdgpu_ring *ring, uint32_t handle, ...@@ -411,9 +411,11 @@ int amdgpu_vce_get_create_msg(struct amdgpu_ring *ring, uint32_t handle,
for (i = ib->length_dw; i < ib_size_dw; ++i) for (i = ib->length_dw; i < ib_size_dw; ++i)
ib->ptr[i] = 0x0; ib->ptr[i] = 0x0;
r = amdgpu_job_submit(job, ring, AMDGPU_FENCE_OWNER_UNDEFINED, &f); r = amdgpu_ib_schedule(ring, 1, ib, AMDGPU_FENCE_OWNER_UNDEFINED, &f);
if (r) if (r)
goto err; goto err;
amdgpu_job_free(job);
if (fence) if (fence)
*fence = fence_get(f); *fence = fence_get(f);
fence_put(f); fence_put(f);
...@@ -435,7 +437,7 @@ int amdgpu_vce_get_create_msg(struct amdgpu_ring *ring, uint32_t handle, ...@@ -435,7 +437,7 @@ int amdgpu_vce_get_create_msg(struct amdgpu_ring *ring, uint32_t handle,
* Close up a stream for HW test or if userspace failed to do so * Close up a stream for HW test or if userspace failed to do so
*/ */
int amdgpu_vce_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle, int amdgpu_vce_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle,
struct fence **fence) bool direct, struct fence **fence)
{ {
const unsigned ib_size_dw = 1024; const unsigned ib_size_dw = 1024;
struct amdgpu_job *job; struct amdgpu_job *job;
...@@ -468,9 +470,21 @@ int amdgpu_vce_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle, ...@@ -468,9 +470,21 @@ int amdgpu_vce_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle,
for (i = ib->length_dw; i < ib_size_dw; ++i) for (i = ib->length_dw; i < ib_size_dw; ++i)
ib->ptr[i] = 0x0; ib->ptr[i] = 0x0;
r = amdgpu_job_submit(job, ring, AMDGPU_FENCE_OWNER_UNDEFINED, &f);
if (direct) {
r = amdgpu_ib_schedule(ring, 1, ib,
AMDGPU_FENCE_OWNER_UNDEFINED, &f);
if (r) if (r)
goto err; goto err;
amdgpu_job_free(job);
} else {
r = amdgpu_job_submit(job, ring,
AMDGPU_FENCE_OWNER_UNDEFINED, &f);
if (r)
goto err;
}
if (fence) if (fence)
*fence = fence_get(f); *fence = fence_get(f);
fence_put(f); fence_put(f);
...@@ -811,7 +825,7 @@ int amdgpu_vce_ring_test_ib(struct amdgpu_ring *ring) ...@@ -811,7 +825,7 @@ int amdgpu_vce_ring_test_ib(struct amdgpu_ring *ring)
goto error; goto error;
} }
r = amdgpu_vce_get_destroy_msg(ring, 1, &fence); r = amdgpu_vce_get_destroy_msg(ring, 1, true, &fence);
if (r) { if (r) {
DRM_ERROR("amdgpu: failed to get destroy ib (%d).\n", r); DRM_ERROR("amdgpu: failed to get destroy ib (%d).\n", r);
goto error; goto error;
......
...@@ -31,7 +31,7 @@ int amdgpu_vce_resume(struct amdgpu_device *adev); ...@@ -31,7 +31,7 @@ int amdgpu_vce_resume(struct amdgpu_device *adev);
int amdgpu_vce_get_create_msg(struct amdgpu_ring *ring, uint32_t handle, int amdgpu_vce_get_create_msg(struct amdgpu_ring *ring, uint32_t handle,
struct fence **fence); struct fence **fence);
int amdgpu_vce_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle, int amdgpu_vce_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle,
struct fence **fence); bool direct, struct fence **fence);
void amdgpu_vce_free_handles(struct amdgpu_device *adev, struct drm_file *filp); void amdgpu_vce_free_handles(struct amdgpu_device *adev, struct drm_file *filp);
int amdgpu_vce_ring_parse_cs(struct amdgpu_cs_parser *p, uint32_t ib_idx); int amdgpu_vce_ring_parse_cs(struct amdgpu_cs_parser *p, uint32_t ib_idx);
void amdgpu_vce_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib); void amdgpu_vce_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib);
......
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