Commit a32226fa authored by Thomas Gleixner's avatar Thomas Gleixner Committed by Peter Zijlstra

x86/cpu/cacheinfo: Remove cpu_callout_mask dependency

cpu_callout_mask is used for the stop machine based MTRR/PAT init.

In preparation of moving the BP/AP synchronization to the core hotplug
code, use a private CPU mask for cacheinfo and manage it in the
starting/dying hotplug state.
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Tested-by: default avatarMichael Kelley <mikelley@microsoft.com>
Tested-by: default avatarOleksandr Natalenko <oleksandr@natalenko.name>
Tested-by: Helge Deller <deller@gmx.de> # parisc
Tested-by: Guilherme G. Piccoli <gpiccoli@igalia.com> # Steam Deck
Link: https://lore.kernel.org/r/20230512205256.035041005@linutronix.de
parent e94cd150
...@@ -39,6 +39,8 @@ DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_llc_shared_map); ...@@ -39,6 +39,8 @@ DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_llc_shared_map);
/* Shared L2 cache maps */ /* Shared L2 cache maps */
DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_l2c_shared_map); DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_l2c_shared_map);
static cpumask_var_t cpu_cacheinfo_mask;
/* Kernel controls MTRR and/or PAT MSRs. */ /* Kernel controls MTRR and/or PAT MSRs. */
unsigned int memory_caching_control __ro_after_init; unsigned int memory_caching_control __ro_after_init;
...@@ -1172,8 +1174,10 @@ void cache_bp_restore(void) ...@@ -1172,8 +1174,10 @@ void cache_bp_restore(void)
cache_cpu_init(); cache_cpu_init();
} }
static int cache_ap_init(unsigned int cpu) static int cache_ap_online(unsigned int cpu)
{ {
cpumask_set_cpu(cpu, cpu_cacheinfo_mask);
if (!memory_caching_control || get_cache_aps_delayed_init()) if (!memory_caching_control || get_cache_aps_delayed_init())
return 0; return 0;
...@@ -1191,11 +1195,17 @@ static int cache_ap_init(unsigned int cpu) ...@@ -1191,11 +1195,17 @@ static int cache_ap_init(unsigned int cpu)
* lock to prevent MTRR entry changes * lock to prevent MTRR entry changes
*/ */
stop_machine_from_inactive_cpu(cache_rendezvous_handler, NULL, stop_machine_from_inactive_cpu(cache_rendezvous_handler, NULL,
cpu_callout_mask); cpu_cacheinfo_mask);
return 0; return 0;
} }
static int cache_ap_offline(unsigned int cpu)
{
cpumask_clear_cpu(cpu, cpu_cacheinfo_mask);
return 0;
}
/* /*
* Delayed cache initialization for all AP's * Delayed cache initialization for all AP's
*/ */
...@@ -1210,9 +1220,12 @@ void cache_aps_init(void) ...@@ -1210,9 +1220,12 @@ void cache_aps_init(void)
static int __init cache_ap_register(void) static int __init cache_ap_register(void)
{ {
zalloc_cpumask_var(&cpu_cacheinfo_mask, GFP_KERNEL);
cpumask_set_cpu(smp_processor_id(), cpu_cacheinfo_mask);
cpuhp_setup_state_nocalls(CPUHP_AP_CACHECTRL_STARTING, cpuhp_setup_state_nocalls(CPUHP_AP_CACHECTRL_STARTING,
"x86/cachectrl:starting", "x86/cachectrl:starting",
cache_ap_init, NULL); cache_ap_online, cache_ap_offline);
return 0; return 0;
} }
core_initcall(cache_ap_register); early_initcall(cache_ap_register);
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment