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Kirill Smelkov
linux
Commits
a32b2ffb
Commit
a32b2ffb
authored
Jul 01, 2013
by
Ben Skeggs
Browse files
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Plain Diff
drm/nvc0-/gr: generate cs register lists from grctx data
Signed-off-by:
Ben Skeggs
<
bskeggs@redhat.com
>
parent
70f824ac
Changes
11
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11 changed files
with
1152 additions
and
2073 deletions
+1152
-2073
drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpc.fuc
drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpc.fuc
+15
-37
drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpcnvc0.fuc
drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpcnvc0.fuc
+0
-114
drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpcnvc0.fuc.h
drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpcnvc0.fuc.h
+157
-247
drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpcnve0.fuc
drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpcnve0.fuc
+0
-141
drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpcnve0.fuc.h
drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpcnve0.fuc.h
+189
-316
drivers/gpu/drm/nouveau/core/engine/graph/fuc/hub.fuc
drivers/gpu/drm/nouveau/core/engine/graph/fuc/hub.fuc
+8
-29
drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnvc0.fuc
drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnvc0.fuc
+0
-79
drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnvc0.fuc.h
drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnvc0.fuc.h
+369
-500
drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnve0.fuc
drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnve0.fuc
+0
-125
drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnve0.fuc.h
drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnve0.fuc.h
+367
-484
drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c
drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c
+47
-1
No files found.
drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpc.fuc
View file @
a32b2ffb
...
...
@@ -29,23 +29,26 @@
*/
#ifdef INCLUDE_DATA
gpc_mmio_list_head: .b32 #mmio_list_base
gpc_mmio_list_tail:
tpc_mmio_list_head: .b32 #mmio_list_base
tpc_mmio_list_tail:
unk_mmio_list_head: .b32 #mmio_list_base
unk_mmio_list_tail: .b32 #mmio_list_base
gpc_id: .b32 0
gpc_mmio_list_head: .b32 0
gpc_mmio_list_tail: .b32 0
tpc_count: .b32 0
tpc_mask: .b32 0
tpc_mmio_list_head: .b32 0
tpc_mmio_list_tail: .b32 0
#ifdef NVGK
unk_count: .b32 1
unk_mask: .b32 1
unk_mmio_list_head: .b32 #nve4_unk_mmio_head
unk_mmio_list_tail: .b32 #nve4_unk_mmio_tail
#endif
cmd_queue: queue_init
mmio_list_base:
#endif
#ifdef INCLUDE_CODE
...
...
@@ -68,7 +71,6 @@ error:
// fall through to main loop after completion.
//
// Input:
// CC_SCRATCH[0]: chipset (PMC_BOOT_0 read returns 0x0bad0bad... sigh)
// CC_SCRATCH[1]: context base
//
// Output:
...
...
@@ -113,23 +115,7 @@ init:
iord $r2 I[$r1 + 0x000] // MYINDEX
st b32 D[$r0 + #gpc_id] $r2
// find context data for this chipset
mov $r2 0x800
shl b32 $r2 6
iord $r2 I[$r2 + 0x000] // CC_SCRATCH[0]
mov $r1 #chipsets - 12
init_find_chipset:
add b32 $r1 12
ld b32 $r3 D[$r1 + 0x00]
cmpu b32 $r3 $r2
bra e #init_context
cmpu b32 $r3 0
bra ne #init_find_chipset
// unknown chipset
ret
// initialise context base, and size tracking
init_context:
mov $r2 0x800
shl b32 $r2 6
iord $r2 I[$r2 + 0x100] // CC_SCRATCH[1], initial base
...
...
@@ -143,24 +129,16 @@ init:
iowr I[$r4 + 0x000] $r5 // MMCTX_SAVE_SWBASE
iowr I[$r4 + 0x100] $r5 // MMCTX_LOAD_SWBASE
// calculate GPC mmio context size, store the chipset-specific
// mmio list pointers somewhere we can get at them later without
// re-parsing the chipset list
clear b32 $r14
clear b32 $r15
ld b16 $r14 D[$r1 + 4]
ld b16 $r15 D[$r1 + 6]
st b16 D[$r0 + #gpc_mmio_list_head] $r14
st b16 D[$r0 + #gpc_mmio_list_tail] $r15
// calculate GPC mmio context size
ld b32 $r14 D[$r0 + #gpc_mmio_list_head]
ld b32 $r15 D[$r0 + #gpc_mmio_list_tail]
call #mmctx_size
add b32 $r2 $r15
add b32 $r3 $r15
// calculate per-TPC mmio context size, store the list pointers
ld b16 $r14 D[$r1 + 8]
ld b16 $r15 D[$r1 + 10]
st b16 D[$r0 + #tpc_mmio_list_head] $r14
st b16 D[$r0 + #tpc_mmio_list_tail] $r15
// calculate per-TPC mmio context size
ld b32 $r14 D[$r0 + #tpc_mmio_list_head]
ld b32 $r15 D[$r0 + #tpc_mmio_list_tail]
call #mmctx_size
ld b32 $r14 D[$r0 + #tpc_count]
mulu $r14 $r15
...
...
drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpcnvc0.fuc
View file @
a32b2ffb
...
...
@@ -29,120 +29,6 @@
#define INCLUDE_DATA
#include "com.fuc"
#include "gpc.fuc"
chipsets:
.b8 0xc0 0 0 0
.b16 #nvc0_gpc_mmio_head
.b16 #nvc0_gpc_mmio_tail
.b16 #nvc0_tpc_mmio_head
.b16 #nvc0_tpc_mmio_tail
.b8 0xc1 0 0 0
.b16 #nvc0_gpc_mmio_head
.b16 #nvc1_gpc_mmio_tail
.b16 #nvc0_tpc_mmio_head
.b16 #nvc1_tpc_mmio_tail
.b8 0xc3 0 0 0
.b16 #nvc0_gpc_mmio_head
.b16 #nvc0_gpc_mmio_tail
.b16 #nvc0_tpc_mmio_head
.b16 #nvc3_tpc_mmio_tail
.b8 0xc4 0 0 0
.b16 #nvc0_gpc_mmio_head
.b16 #nvc0_gpc_mmio_tail
.b16 #nvc0_tpc_mmio_head
.b16 #nvc3_tpc_mmio_tail
.b8 0xc8 0 0 0
.b16 #nvc0_gpc_mmio_head
.b16 #nvc0_gpc_mmio_tail
.b16 #nvc0_tpc_mmio_head
.b16 #nvc0_tpc_mmio_tail
.b8 0xce 0 0 0
.b16 #nvc0_gpc_mmio_head
.b16 #nvc0_gpc_mmio_tail
.b16 #nvc0_tpc_mmio_head
.b16 #nvc3_tpc_mmio_tail
.b8 0xcf 0 0 0
.b16 #nvc0_gpc_mmio_head
.b16 #nvc0_gpc_mmio_tail
.b16 #nvc0_tpc_mmio_head
.b16 #nvc3_tpc_mmio_tail
.b8 0xd9 0 0 0
.b16 #nvd9_gpc_mmio_head
.b16 #nvc1_gpc_mmio_tail
.b16 #nvc0_tpc_mmio_head
.b16 #nvd9_tpc_mmio_tail
.b8 0xd7 0 0 0
.b16 #nvd9_gpc_mmio_head
.b16 #nvc1_gpc_mmio_tail
.b16 #nvc0_tpc_mmio_head
.b16 #nvd9_tpc_mmio_tail
.b8 0 0 0 0
// GPC mmio lists
nvc0_gpc_mmio_head:
mmctx_data(0x000408, 1)
nvd9_gpc_mmio_head:
mmctx_data(0x000380, 1)
mmctx_data(0x000400, 2);
mmctx_data(0x00040c, 3);
mmctx_data(0x000450, 9)
mmctx_data(0x000600, 1)
mmctx_data(0x000684, 1)
mmctx_data(0x000700, 5)
mmctx_data(0x000800, 1)
mmctx_data(0x000808, 3)
mmctx_data(0x000828, 1)
mmctx_data(0x000830, 1)
mmctx_data(0x0008d8, 1)
mmctx_data(0x0008e0, 1)
mmctx_data(0x0008e8, 6)
mmctx_data(0x00091c, 1)
mmctx_data(0x000924, 3)
mmctx_data(0x000b00, 1)
mmctx_data(0x000b08, 6)
mmctx_data(0x000bb8, 1)
mmctx_data(0x000c08, 1)
mmctx_data(0x000c10, 8)
mmctx_data(0x000c80, 1)
mmctx_data(0x000c8c, 1)
mmctx_data(0x001000, 3)
mmctx_data(0x001014, 1)
nvc0_gpc_mmio_tail:
mmctx_data(0x000c6c, 1);
nvc1_gpc_mmio_tail:
// TPC mmio lists
nvc0_tpc_mmio_head:
mmctx_data(0x000018, 1)
mmctx_data(0x00003c, 1)
mmctx_data(0x000048, 1)
mmctx_data(0x000064, 1)
mmctx_data(0x000088, 1)
mmctx_data(0x000200, 6)
mmctx_data(0x000300, 6)
mmctx_data(0x0003d0, 1)
mmctx_data(0x0003e0, 2)
mmctx_data(0x000400, 3)
mmctx_data(0x000420, 1)
mmctx_data(0x0004b0, 1)
mmctx_data(0x0004e8, 1)
mmctx_data(0x0004f4, 1)
mmctx_data(0x000520, 2)
mmctx_data(0x000604, 4)
mmctx_data(0x000644, 20)
mmctx_data(0x000698, 1)
mmctx_data(0x000750, 2)
nvc0_tpc_mmio_tail:
mmctx_data(0x00021c, 2)
mmctx_data(0x0002c4, 1)
mmctx_data(0x000730, 8)
mmctx_data(0x000758, 1)
nvc3_tpc_mmio_tail:
mmctx_data(0x000544, 1)
nvc1_tpc_mmio_tail:
mmctx_data(0x000424, 2);
mmctx_data(0x0006e0, 1);
nvd9_tpc_mmio_tail:
#undef INCLUDE_DATA
.section #nvc0_grgpc_code
...
...
drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpcnvc0.fuc.h
View file @
a32b2ffb
uint32_t
nvc0_grgpc_data
[]
=
{
/* 0x0000: gpc_id */
0x00000000
,
/* 0x0004: gpc_mmio_list_head */
0x00000000
,
/* 0x0008: gpc_mmio_list_tail */
0x00000000
,
/* 0x000c: tpc_count */
0x00000000
,
/* 0x0010: tpc_mask */
/* 0x0000: gpc_mmio_list_head */
0x00000064
,
/* 0x0004: gpc_mmio_list_tail */
/* 0x0004: tpc_mmio_list_head */
0x00000064
,
/* 0x0008: tpc_mmio_list_tail */
/* 0x0008: unk_mmio_list_head */
0x00000064
,
/* 0x000c: unk_mmio_list_tail */
0x00000064
,
/* 0x0010: gpc_id */
0x00000000
,
/* 0x0014: tpc_
mmio_list_head
*/
/* 0x0014: tpc_
count
*/
0x00000000
,
/* 0x0018: tpc_m
mio_list_tail
*/
/* 0x0018: tpc_m
ask
*/
0x00000000
,
/* 0x001c: cmd_queue */
0x00000000
,
...
...
@@ -32,96 +34,6 @@ uint32_t nvc0_grgpc_data[] = {
0x00000000
,
0x00000000
,
0x00000000
,
/* 0x0064: chipsets */
0x000000c0
,
0x013c00d4
,
0x018c0140
,
0x000000c1
,
0x014000d4
,
0x01a00140
,
0x000000c3
,
0x013c00d4
,
0x019c0140
,
0x000000c4
,
0x013c00d4
,
0x019c0140
,
0x000000c8
,
0x013c00d4
,
0x018c0140
,
0x000000ce
,
0x013c00d4
,
0x019c0140
,
0x000000cf
,
0x013c00d4
,
0x019c0140
,
0x000000d9
,
0x014000d8
,
0x01a80140
,
0x000000d7
,
0x014000d8
,
0x01a80140
,
0x00000000
,
/* 0x00d4: nvc0_gpc_mmio_head */
0x00000408
,
/* 0x00d8: nvd9_gpc_mmio_head */
0x00000380
,
0x04000400
,
0x0800040c
,
0x20000450
,
0x00000600
,
0x00000684
,
0x10000700
,
0x00000800
,
0x08000808
,
0x00000828
,
0x00000830
,
0x000008d8
,
0x000008e0
,
0x140008e8
,
0x0000091c
,
0x08000924
,
0x00000b00
,
0x14000b08
,
0x00000bb8
,
0x00000c08
,
0x1c000c10
,
0x00000c80
,
0x00000c8c
,
0x08001000
,
0x00001014
,
/* 0x013c: nvc0_gpc_mmio_tail */
0x00000c6c
,
/* 0x0140: nvc1_gpc_mmio_tail */
/* 0x0140: nvc0_tpc_mmio_head */
0x00000018
,
0x0000003c
,
0x00000048
,
0x00000064
,
0x00000088
,
0x14000200
,
0x14000300
,
0x000003d0
,
0x040003e0
,
0x08000400
,
0x00000420
,
0x000004b0
,
0x000004e8
,
0x000004f4
,
0x04000520
,
0x0c000604
,
0x4c000644
,
0x00000698
,
0x04000750
,
/* 0x018c: nvc0_tpc_mmio_tail */
0x0400021c
,
0x000002c4
,
0x1c000730
,
0x00000758
,
/* 0x019c: nvc3_tpc_mmio_tail */
0x00000544
,
/* 0x01a0: nvc1_tpc_mmio_tail */
0x04000424
,
0x000006e0
,
};
uint32_t
nvc0_grgpc_code
[]
=
{
...
...
@@ -355,7 +267,7 @@ uint32_t nvc0_grgpc_code[] = {
0xf10004fe
,
0xf0120017
,
0x12d00227
,
0x
3e
17f100
,
0x
0d
17f100
,
0x0010fe04
,
0x040017f1
,
0xf0c010d0
,
...
...
@@ -367,154 +279,152 @@ uint32_t nvc0_grgpc_code[] = {
0x1f24f001
,
0xb60432bb
,
0x02800132
,
0x0
4038003
,
0x0
6038005
,
0x040010b7
,
0x800012cf
,
0x27f10
0
02
,
0x27f10
4
02
,
0x24b60800
,
0x0022cf06
,
/* 0x035f: init_find_chipset */
0xb65817f0
,
0x13980c10
,
0x0432b800
,
0xb00b0bf4
,
0x1bf40034
,
/* 0x0373: init_context */
0xf100f8f1
,
0xb6080027
,
0x22cf0624
,
0xf134bd40
,
0xb6070047
,
0x25950644
,
0x0045d008
,
0xbd4045d0
,
0x58f4bde4
,
0x1f58021e
,
0x020e4003
,
0xf5040f40
,
0xbb013d21
,
0x3fbb002f
,
0x041e5800
,
0x40051f58
,
0x0f400a0e
,
0x3d21f50c
,
0x030e9801
,
0xbb00effd
,
0x3ebb002e
,
0x0040b700
,
0x0235b613
,
0xb60043d0
,
0x35b60825
,
0x0120b606
,
0xb60130b6
,
0x34b60824
,
0x022fb908
,
0x026321f5
,
0xf1003fbb
,
0xb6080017
,
0x13d00614
,
0x0010b740
,
0xf024bd08
,
0x12d01f29
,
/* 0x0401: main */
0x0031f400
,
0xf00028f4
,
0x21f41cd7
,
0xf401f439
,
0xf404e4b0
,
0x81fe1e18
,
0x0627f001
,
0x12fd20bd
,
0x01e4b604
,
0xfe051efd
,
0x21f50018
,
0x0ef404c3
,
/* 0x0431: main_not_ctx_xfer */
0x10ef94d3
,
0xf501f5f0
,
0xf402ec21
,
/* 0x043e: ih */
0x80f9c60e
,
0xf90188fe
,
0xf990f980
,
0xf9b0f9a0
,
0xf9e0f9d0
,
0x800acff0
,
0xf404abc4
,
0xb7f11d0b
,
0xd7f01900
,
0x40becf1c
,
0xf400bfcf
,
0xb0b70421
,
0xe7f00400
,
0x00bed001
,
/* 0x0474: ih_no_fifo */
0xfc400ad0
,
0xfce0fcf0
,
0xfcb0fcd0
,
0xfc90fca0
,
0x0088fe80
,
0x32f480fc
,
/* 0x048f: hub_barrier_done */
0xf001f800
,
0x0e9801f7
,
0x04febb00
,
0x9418e7f1
,
0xf440e3f0
,
0x00f88d21
,
/* 0x04a4: ctx_redswitch */
0x0614e7f1
,
0xf006e4b6
,
0xefd020f7
,
0x08f7f000
,
/* 0x04b4: ctx_redswitch_delay */
0xf401f2b6
,
0xf7f1fd1b
,
0xefd00a20
,
/* 0x04c3: ctx_xfer */
0xf100f800
,
0xb60a0417
,
0x1fd00614
,
0x0711f400
,
0x04a421f5
,
/* 0x04d4: ctx_xfer_not_load */
0x4afc17f1
,
0xf00213f0
,
0x12d00c27
,
0x0721f500
,
0xfc27f102
,
0x0223f047
,
0xf00020d0
,
0x20b6012c
,
0x0012d003
,
0xf001acf0
,
0xb7f002a5
,
0x50b3f000
,
0xb6000c98
,
0xbcbb0fc4
,
0x010c9800
,
0xf0020d98
,
0x21f500e7
,
0xacf0015c
,
0x00b7f101
,
0x50b3f040
,
0xb6000c98
,
0xbcbb0fc4
,
0x050c9800
,
0x98060d98
,
0xe7f1040f
,
0x21f50800
,
0x21f5015c
,
0x01f40207
,
0x1412f406
,
/* 0x0548: ctx_xfer_post */
0x4afc17f1
,
0xf00213f0
,
0x12d00d27
,
0x0721f500
,
/* 0x0559: ctx_xfer_done */
0x8f21f502
,
0x0000f804
,
0x4022cf06
,
0x47f134bd
,
0x44b60700
,
0x08259506
,
0xd00045d0
,
0x0e984045
,
0x010f9800
,
0x013d21f5
,
0xbb002fbb
,
0x0e98003f
,
0x020f9801
,
0x013d21f5
,
0xfd050e98
,
0x2ebb00ef
,
0x003ebb00
,
0x130040b7
,
0xd00235b6
,
0x25b60043
,
0x0635b608
,
0xb60120b6
,
0x24b60130
,
0x0834b608
,
0xf5022fb9
,
0xbb026321
,
0x17f1003f
,
0x14b60800
,
0x4013d006
,
0x080010b7
,
0x29f024bd
,
0x0012d01f
,
/* 0x03d0: main */
0xf40031f4
,
0xd7f00028
,
0x3921f41c
,
0xb0f401f4
,
0x18f404e4
,
0x0181fe1e
,
0xbd0627f0
,
0x0412fd20
,
0xfd01e4b6
,
0x18fe051e
,
0x9221f500
,
0xd30ef404
,
/* 0x0400: main_not_ctx_xfer */
0xf010ef94
,
0x21f501f5
,
0x0ef402ec
,
/* 0x040d: ih */
0xfe80f9c6
,
0x80f90188
,
0xa0f990f9
,
0xd0f9b0f9
,
0xf0f9e0f9
,
0xc4800acf
,
0x0bf404ab
,
0x00b7f11d
,
0x1cd7f019
,
0xcf40becf
,
0x21f400bf
,
0x00b0b704
,
0x01e7f004
,
/* 0x0443: ih_no_fifo */
0xd000bed0
,
0xf0fc400a
,
0xd0fce0fc
,
0xa0fcb0fc
,
0x80fc90fc
,
0xfc0088fe
,
0x0032f480
,
/* 0x045e: hub_barrier_done */
0xf7f001f8
,
0x040e9801
,
0xf104febb
,
0xf09418e7
,
0x21f440e3
,
/* 0x0473: ctx_redswitch */
0xf100f88d
,
0xb60614e7
,
0xf7f006e4
,
0x00efd020
,
/* 0x0483: ctx_redswitch_delay */
0xb608f7f0
,
0x1bf401f2
,
0x20f7f1fd
,
0x00efd00a
,
/* 0x0492: ctx_xfer */
0x17f100f8
,
0x14b60a04
,
0x001fd006
,
0xf50711f4
,
/* 0x04a3: ctx_xfer_not_load */
0xf1047321
,
0xf04afc17
,
0x27f00213
,
0x0012d00c
,
0x020721f5
,
0x47fc27f1
,
0xd00223f0
,
0x2cf00020
,
0x0320b601
,
0xf00012d0
,
0xa5f001ac
,
0x00b7f002
,
0x9850b3f0
,
0xc4b6040c
,
0x00bcbb0f
,
0x98000c98
,
0xe7f0010d
,
0x5c21f500
,
0x01acf001
,
0x4000b7f1
,
0x9850b3f0
,
0xc4b6040c
,
0x00bcbb0f
,
0x98010c98
,
0x0f98020d
,
0x00e7f106
,
0x5c21f508
,
0x0721f501
,
0x0601f402
,
/* 0x0517: ctx_xfer_post */
0xf11412f4
,
0xf04afc17
,
0x27f00213
,
0x0012d00d
,
0x020721f5
,
/* 0x0528: ctx_xfer_done */
0x045e21f5
,
0x000000f8
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
...
...
drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpcnve0.fuc
View file @
a32b2ffb
...
...
@@ -29,147 +29,6 @@
#define INCLUDE_DATA
#include "com.fuc"
#include "gpc.fuc"
chipsets:
.b8 0xe4 0 0 0
.b16 #nve4_gpc_mmio_head
.b16 #nve4_gpc_mmio_tail
.b16 #nve4_tpc_mmio_head
.b16 #nve4_tpc_mmio_tail
.b8 0xe7 0 0 0
.b16 #nve4_gpc_mmio_head
.b16 #nve4_gpc_mmio_tail
.b16 #nve4_tpc_mmio_head
.b16 #nve4_tpc_mmio_tail
.b8 0xe6 0 0 0
.b16 #nve4_gpc_mmio_head
.b16 #nve4_gpc_mmio_tail
.b16 #nve4_tpc_mmio_head
.b16 #nve4_tpc_mmio_tail
.b8 0xf0 0 0 0
.b16 #nvf0_gpc_mmio_head
.b16 #nvf0_gpc_mmio_tail
.b16 #nvf0_tpc_mmio_head
.b16 #nvf0_tpc_mmio_tail
.b8 0 0 0 0
// GPC mmio lists
nve4_gpc_mmio_head:
mmctx_data(0x000380, 1)
mmctx_data(0x000400, 2)
mmctx_data(0x00040c, 3)
mmctx_data(0x000450, 9)
mmctx_data(0x000600, 1)
mmctx_data(0x000684, 1)
mmctx_data(0x000700, 5)
mmctx_data(0x000800, 1)
mmctx_data(0x000808, 3)
mmctx_data(0x000828, 1)
mmctx_data(0x000830, 1)
mmctx_data(0x0008d8, 1)
mmctx_data(0x0008e0, 1)
mmctx_data(0x0008e8, 6)
mmctx_data(0x00091c, 1)
mmctx_data(0x000924, 3)
mmctx_data(0x000b00, 1)
mmctx_data(0x000b08, 6)
mmctx_data(0x000bb8, 1)
mmctx_data(0x000c08, 1)
mmctx_data(0x000c10, 8)
mmctx_data(0x000c40, 1)
mmctx_data(0x000c6c, 1)
mmctx_data(0x000c80, 1)
mmctx_data(0x000c8c, 1)
mmctx_data(0x001000, 3)
mmctx_data(0x001014, 1)
nve4_gpc_mmio_tail:
nvf0_gpc_mmio_head:
mmctx_data(0x000380, 1)
mmctx_data(0x000400, 2)
mmctx_data(0x00040c, 3)
mmctx_data(0x000450, 9)
mmctx_data(0x000600, 1)
mmctx_data(0x000684, 1)
mmctx_data(0x000700, 5)
mmctx_data(0x000800, 1)
mmctx_data(0x000808, 3)
mmctx_data(0x000828, 1)
mmctx_data(0x000830, 1)
mmctx_data(0x0008d8, 1)
mmctx_data(0x0008e0, 1)
mmctx_data(0x0008e8, 6)
mmctx_data(0x00091c, 1)
mmctx_data(0x000924, 3)
mmctx_data(0x000b00, 1)
mmctx_data(0x000b08, 6)
mmctx_data(0x000bb8, 1)
mmctx_data(0x000c08, 1)
mmctx_data(0x000c10, 8)
mmctx_data(0x000c40, 1)
mmctx_data(0x000c6c, 1)
mmctx_data(0x000c80, 1)
mmctx_data(0x000c8c, 1)
mmctx_data(0x000d24, 1)
mmctx_data(0x001000, 3)
mmctx_data(0x001014, 1)
nvf0_gpc_mmio_tail:
// TPC mmio lists
nve4_tpc_mmio_head:
mmctx_data(0x000048, 1)
mmctx_data(0x000064, 1)
mmctx_data(0x000088, 1)
mmctx_data(0x000200, 6)
mmctx_data(0x00021c, 2)
mmctx_data(0x000230, 1)
mmctx_data(0x0002c4, 1)
mmctx_data(0x000400, 3)
mmctx_data(0x000420, 3)
mmctx_data(0x0004e8, 1)
mmctx_data(0x0004f4, 1)
mmctx_data(0x000604, 4)
mmctx_data(0x000644, 22)
mmctx_data(0x0006ac, 2)
mmctx_data(0x0006c8, 1)
mmctx_data(0x000730, 8)
mmctx_data(0x000758, 1)
mmctx_data(0x000770, 1)
mmctx_data(0x000778, 2)
nve4_tpc_mmio_tail:
nvf0_tpc_mmio_head:
mmctx_data(0x000048, 1)
mmctx_data(0x000064, 1)
mmctx_data(0x000088, 1)
mmctx_data(0x000200, 6)
mmctx_data(0x00021c, 2)
mmctx_data(0x000230, 1)
mmctx_data(0x0002c4, 1)
mmctx_data(0x000400, 3)
mmctx_data(0x000420, 3)
mmctx_data(0x0004e8, 1)
mmctx_data(0x0004f4, 1)
mmctx_data(0x000604, 4)
mmctx_data(0x000644, 22)
mmctx_data(0x0006ac, 2)
mmctx_data(0x0006b8, 1)
mmctx_data(0x0006c8, 1)
mmctx_data(0x000730, 8)
mmctx_data(0x000758, 1)
mmctx_data(0x000770, 1)
mmctx_data(0x000778, 2)
nvf0_tpc_mmio_tail:
// UNK mmio lists
nve4_unk_mmio_head:
mmctx_data(0x000024, 1)
mmctx_data(0x0000c0, 2)
mmctx_data(0x0000e4, 1)
mmctx_data(0x000100, 6)
mmctx_data(0x0001d0, 1)
mmctx_data(0x0001e0, 2)
nve4_unk_mmio_tail:
#undef INCLUDE_DATA
.section #nve0_grgpc_code
...
...
drivers/gpu/drm/nouveau/core/engine/graph/fuc/gpcnve0.fuc.h
View file @
a32b2ffb
uint32_t
nve0_grgpc_data
[]
=
{
/* 0x0000: gpc_id */
/* 0x0000: gpc_mmio_list_head */
0x0000006c
,
/* 0x0004: gpc_mmio_list_tail */
/* 0x0004: tpc_mmio_list_head */
0x0000006c
,
/* 0x0008: tpc_mmio_list_tail */
/* 0x0008: unk_mmio_list_head */
0x0000006c
,
/* 0x000c: unk_mmio_list_tail */
0x0000006c
,
/* 0x0010: gpc_id */
0x00000000
,
/* 0x0014: tpc_count */
0x00000000
,
/* 0x0018: tpc_mask */
0x00000000
,
/* 0x001c: unk_count */
0x00000001
,
/* 0x0020: unk_mask */
0x00000001
,
/* 0x0024: cmd_queue */
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
/* 0x0004: gpc_mmio_list_head */
0x00000000
,
/* 0x0008: gpc_mmio_list_tail */
0x00000000
,
/* 0x000c: tpc_count */
0x00000000
,
/* 0x0010: tpc_mask */
0x00000000
,
/* 0x0014: tpc_mmio_list_head */
0x00000000
,
/* 0x0018: tpc_mmio_list_tail */
0x00000000
,
/* 0x001c: unk_count */
0x00000001
,
/* 0x0020: unk_mask */
0x00000001
,
/* 0x0024: unk_mmio_list_head */
0x00000220
,
/* 0x0028: unk_mmio_list_tail */
0x00000238
,
/* 0x002c: cmd_queue */
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
/* 0x0074: chipsets */
0x000000e4
,
0x011400a8
,
0x01d00184
,
0x000000e7
,
0x011400a8
,
0x01d00184
,
0x000000e6
,
0x011400a8
,
0x01d00184
,
0x000000f0
,
0x01840114
,
0x022001d0
,
0x00000000
,
/* 0x00a8: nve4_gpc_mmio_head */
0x00000380
,
0x04000400
,
0x0800040c
,
0x20000450
,
0x00000600
,
0x00000684
,
0x10000700
,
0x00000800
,
0x08000808
,
0x00000828
,
0x00000830
,
0x000008d8
,
0x000008e0
,
0x140008e8
,
0x0000091c
,
0x08000924
,
0x00000b00
,
0x14000b08
,
0x00000bb8
,
0x00000c08
,
0x1c000c10
,
0x00000c40
,
0x00000c6c
,
0x00000c80
,
0x00000c8c
,
0x08001000
,
0x00001014
,
/* 0x0114: nve4_gpc_mmio_tail */
/* 0x0114: nvf0_gpc_mmio_head */
0x00000380
,
0x04000400
,
0x0800040c
,
0x20000450
,
0x00000600
,
0x00000684
,
0x10000700
,
0x00000800
,
0x08000808
,
0x00000828
,
0x00000830
,
0x000008d8
,
0x000008e0
,
0x140008e8
,
0x0000091c
,
0x08000924
,
0x00000b00
,
0x14000b08
,
0x00000bb8
,
0x00000c08
,
0x1c000c10
,
0x00000c40
,
0x00000c6c
,
0x00000c80
,
0x00000c8c
,
0x00000d24
,
0x08001000
,
0x00001014
,
/* 0x0184: nvf0_gpc_mmio_tail */
/* 0x0184: nve4_tpc_mmio_head */
0x00000048
,
0x00000064
,
0x00000088
,
0x14000200
,
0x0400021c
,
0x00000230
,
0x000002c4
,
0x08000400
,
0x08000420
,
0x000004e8
,
0x000004f4
,
0x0c000604
,
0x54000644
,
0x040006ac
,
0x000006c8
,
0x1c000730
,
0x00000758
,
0x00000770
,
0x04000778
,
/* 0x01d0: nve4_tpc_mmio_tail */
/* 0x01d0: nvf0_tpc_mmio_head */
0x00000048
,
0x00000064
,
0x00000088
,
0x14000200
,
0x0400021c
,
0x00000230
,
0x000002c4
,
0x08000400
,
0x08000420
,
0x000004e8
,
0x000004f4
,
0x0c000604
,
0x54000644
,
0x040006ac
,
0x000006b8
,
0x000006c8
,
0x1c000730
,
0x00000758
,
0x00000770
,
0x04000778
,
/* 0x0220: nvf0_tpc_mmio_tail */
/* 0x0220: nve4_unk_mmio_head */
0x00000024
,
0x040000c0
,
0x000000e4
,
0x14000100
,
0x000001d0
,
0x040001e0
,
};
uint32_t
nve0_grgpc_code
[]
=
{
...
...
@@ -396,7 +271,7 @@ uint32_t nve0_grgpc_code[] = {
0xf10004fe
,
0xf0120017
,
0x12d00227
,
0x
54
17f100
,
0x
23
17f100
,
0x0010fe04
,
0x040017f1
,
0xf0c010d0
,
...
...
@@ -408,169 +283,167 @@ uint32_t nve0_grgpc_code[] = {
0x1f24f001
,
0xb60432bb
,
0x02800132
,
0x0
4038003
,
0x0
6038005
,
0x040010b7
,
0x800012cf
,
0x27f10
0
02
,
0x27f10
4
02
,
0x24b60800
,
0x0022cf06
,
/* 0x035f: init_find_chipset */
0xb66817f0
,
0x13980c10
,
0x0432b800
,
0xb00b0bf4
,
0x1bf40034
,
/* 0x0373: init_context */
0xf100f8f1
,
0xb6080027
,
0x22cf0624
,
0xf134bd40
,
0xb6070047
,
0x25950644
,
0x0045d008
,
0xbd4045d0
,
0x58f4bde4
,
0x1f58021e
,
0x020e4003
,
0xf5040f40
,
0xbb013d21
,
0x3fbb002f
,
0x041e5800
,
0x40051f58
,
0x0f400a0e
,
0x3d21f50c
,
0x030e9801
,
0xbb00effd
,
0x3ebb002e
,
0x090e9800
,
0xf50a0f98
,
0x98013d21
,
0xeffd070e
,
0x002ebb00
,
0xb7003ebb
,
0xb6130040
,
0x43d00235
,
0x0825b600
,
0xb60635b6
,
0x30b60120
,
0x0824b601
,
0xb90834b6
,
0x21f5022f
,
0x3fbb0263
,
0x0017f100
,
0x0614b608
,
0xb74013d0
,
0xbd080010
,
0x1f29f024
,
/* 0x0417: main */
0xf40012d0
,
0x28f40031
,
0x2cd7f000
,
0xf43921f4
,
0xe4b0f401
,
0x1e18f404
,
0xf00181fe
,
0x20bd0627
,
0xb60412fd
,
0x1efd01e4
,
0x0018fe05
,
0x04d921f5
,
/* 0x0447: main_not_ctx_xfer */
0x94d30ef4
,
0xf5f010ef
,
0xec21f501
,
0xc60ef402
,
/* 0x0454: ih */
0x88fe80f9
,
0xf980f901
,
0xf9a0f990
,
0xf9d0f9b0
,
0xcff0f9e0
,
0xabc4800a
,
0x1d0bf404
,
0x1900b7f1
,
0xcf2cd7f0
,
0xbfcf40be
,
0x0421f400
,
0x0400b0b7
,
0xd001e7f0
,
/* 0x048a: ih_no_fifo */
0x0ad000be
,
0xfcf0fc40
,
0xfcd0fce0
,
0xfca0fcb0
,
0xfe80fc90
,
0x80fc0088
,
0xf80032f4
,
/* 0x04a5: hub_barrier_done */
0x01f7f001
,
0xbb000e98
,
0xe7f104fe
,
0xe3f09418
,
0x8d21f440
,
/* 0x04ba: ctx_redswitch */
0xe7f100f8
,
0xe4b60614
,
0x20f7f006
,
0xf000efd0
,
/* 0x04ca: ctx_redswitch_delay */
0xf2b608f7
,
0xfd1bf401
,
0x0a20f7f1
,
0xf800efd0
,
/* 0x04d9: ctx_xfer */
0x0417f100
,
0x0614b60a
,
0xf4001fd0
,
0x21f50711
,
/* 0x04ea: ctx_xfer_not_load */
0x17f104ba
,
0x13f04afc
,
0x0c27f002
,
0xf50012d0
,
0xf1020721
,
0xf047fc27
,
0x20d00223
,
0x012cf000
,
0xd00320b6
,
0xacf00012
,
0x02a5f001
,
0xf000b7f0
,
0x0c9850b3
,
0x0fc4b600
,
0x9800bcbb
,
0x0d98010c
,
0x00e7f002
,
0x015c21f5
,
0xf101acf0
,
0xf04000b7
,
0x0c9850b3
,
0x0fc4b600
,
0x9800bcbb
,
0x0d98050c
,
0x040f9806
,
0x0800e7f1
,
0x015c21f5
,
0xf001acf0
,
0xb7f104a5
,
0xb3f03000
,
0x000c9850
,
0xbb0fc4b6
,
0x0c9800bc
,
0x0a0d9809
,
0xf1080f98
,
0xf50200e7
,
0xf5015c21
,
0xf4020721
,
0x12f40601
,
/* 0x0585: ctx_xfer_post */
0xfc17f114
,
0x4022cf06
,
0x47f134bd
,
0x44b60700
,
0x08259506
,
0xd00045d0
,
0x0e984045
,
0x010f9800
,
0x013d21f5
,
0xbb002fbb
,
0x0e98003f
,
0x020f9801
,
0x013d21f5
,
0xfd050e98
,
0x2ebb00ef
,
0x003ebb00
,
0x98020e98
,
0x21f5030f
,
0x0e98013d
,
0x00effd07
,
0xbb002ebb
,
0x40b7003e
,
0x35b61300
,
0x0043d002
,
0xb60825b6
,
0x20b60635
,
0x0130b601
,
0xb60824b6
,
0x2fb90834
,
0x6321f502
,
0x003fbb02
,
0x080017f1
,
0xd00614b6
,
0x10b74013
,
0x24bd0800
,
0xd01f29f0
,
/* 0x03e6: main */
0x31f40012
,
0x0028f400
,
0xf424d7f0
,
0x01f43921
,
0x04e4b0f4
,
0xfe1e18f4
,
0x27f00181
,
0xfd20bd06
,
0xe4b60412
,
0x051efd01
,
0xf50018fe
,
0xf404a821
,
/* 0x0416: main_not_ctx_xfer */
0xef94d30e
,
0x01f5f010
,
0x02ec21f5
,
/* 0x0423: ih */
0xf9c60ef4
,
0x0188fe80
,
0x90f980f9
,
0xb0f9a0f9
,
0xe0f9d0f9
,
0x0acff0f9
,
0x04abc480
,
0xf11d0bf4
,
0xf01900b7
,
0xbecf24d7
,
0x00bfcf40
,
0xb70421f4
,
0xf00400b0
,
0xbed001e7
,
/* 0x0459: ih_no_fifo */
0x400ad000
,
0xe0fcf0fc
,
0xb0fcd0fc
,
0x90fca0fc
,
0x88fe80fc
,
0xf480fc00
,
0x01f80032
,
/* 0x0474: hub_barrier_done */
0x9801f7f0
,
0xfebb040e
,
0x18e7f104
,
0x40e3f094
,
0xf88d21f4
,
/* 0x0489: ctx_redswitch */
0x14e7f100
,
0x06e4b606
,
0xd020f7f0
,
0xf7f000ef
,
/* 0x0499: ctx_redswitch_delay */
0x01f2b608
,
0xf1fd1bf4
,
0xd00a20f7
,
0x00f800ef
,
/* 0x04a8: ctx_xfer */
0x0a0417f1
,
0xd00614b6
,
0x11f4001f
,
0x8921f507
,
/* 0x04b9: ctx_xfer_not_load */
0xfc17f104
,
0x0213f04a
,
0xd00
d
27f0
,
0xd00
c
27f0
,
0x21f50012
,
/* 0x0596: ctx_xfer_done */
0x21f50207
,
0x00f804a5
,
0x27f10207
,
0x23f047fc
,
0x0020d002
,
0xb6012cf0
,
0x12d00320
,
0x01acf000
,
0xf002a5f0
,
0xb3f000b7
,
0x040c9850
,
0xbb0fc4b6
,
0x0c9800bc
,
0x010d9800
,
0xf500e7f0
,
0xf0015c21
,
0xb7f101ac
,
0xb3f04000
,
0x040c9850
,
0xbb0fc4b6
,
0x0c9800bc
,
0x020d9801
,
0xf1060f98
,
0xf50800e7
,
0xf0015c21
,
0xa5f001ac
,
0x00b7f104
,
0x50b3f030
,
0xb6040c98
,
0xbcbb0fc4
,
0x020c9800
,
0x98030d98
,
0xe7f1080f
,
0x21f50200
,
0x21f5015c
,
0x01f40207
,
0x1412f406
,
/* 0x0554: ctx_xfer_post */
0x4afc17f1
,
0xf00213f0
,
0x12d00d27
,
0x0721f500
,
/* 0x0565: ctx_xfer_done */
0x7421f502
,
0x0000f804
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
...
...
drivers/gpu/drm/nouveau/core/engine/graph/fuc/hub.fuc
View file @
a32b2ffb
...
...
@@ -24,11 +24,12 @@
*/
#ifdef INCLUDE_DATA
hub_mmio_list_head: .b32 #hub_mmio_list_base
hub_mmio_list_tail: .b32 #hub_mmio_list_next
gpc_count: .b32 0
rop_count: .b32 0
cmd_queue: queue_init
hub_mmio_list_head: .b32 0
hub_mmio_list_tail: .b32 0
ctx_current: .b32 0
...
...
@@ -40,6 +41,9 @@ chan_mmio_address: .b32 0
.align 256
xfer_data: .skip 256
hub_mmio_list_base:
.b32 0x0417e91c // 0x17e91c, 2
hub_mmio_list_next:
#endif
#ifdef INCLUDE_CODE
...
...
@@ -62,9 +66,6 @@ error:
// HUB fuc initialisation, executed by triggering ucode start, will
// fall through to main loop after completion.
//
// Input:
// CC_SCRATCH[0]: chipset (PMC_BOOT_0 read returns 0x0bad0bad... sigh)
//
// Output:
// CC_SCRATCH[0]:
// 31:31: set to signal completion
...
...
@@ -141,31 +142,12 @@ init:
iowr I[$r2 + 0x000] $r1
iowr I[$r2 + 0x100] $r1
// find context data for this chipset
mov $r2 0x800
shl b32 $r2 6
iord $r2 I[$r2 + 0x000] // CC_SCRATCH[0]
mov $r15 #chipsets - 8
init_find_chipset:
add b32 $r15 8
ld b32 $r3 D[$r15 + 0x00]
cmpu b32 $r3 $r2
bra e #init_context
cmpu b32 $r3 0
bra ne #init_find_chipset
// unknown chipset
ret
// context size calculation, reserve first 256 bytes for use by fuc
init_context:
mov $r1 256
// calculate size of mmio context data
ld b16 $r14 D[$r15 + 4]
ld b16 $r15 D[$r15 + 6]
sethi $r14 0
st b32 D[$r0 + #hub_mmio_list_head] $r14
st b32 D[$r0 + #hub_mmio_list_tail] $r15
ld b32 $r14 D[$r0 + #hub_mmio_list_head]
ld b32 $r15 D[$r0 + #hub_mmio_list_tail]
call #mmctx_size
// set mmctx base addresses now so we don't have to do it later,
...
...
@@ -204,9 +186,6 @@ init:
add b32 $r14 $r4 0x804
mov b32 $r15 $r1
call #nv_wr32 // CC_SCRATCH[1] = ctx offset
add b32 $r14 $r4 0x800
mov b32 $r15 $r2
call #nv_wr32 // CC_SCRATCH[0] = chipset
add b32 $r14 $r4 0x10c
clear b32 $r15
call #nv_wr32
...
...
drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnvc0.fuc
View file @
a32b2ffb
...
...
@@ -29,85 +29,6 @@
#define INCLUDE_DATA
#include "com.fuc"
#include "hub.fuc"
chipsets:
.b8 0xc0 0 0 0
.b16 #nvc0_hub_mmio_head
.b16 #nvc0_hub_mmio_tail
.b8 0xc1 0 0 0
.b16 #nvc0_hub_mmio_head
.b16 #nvc1_hub_mmio_tail
.b8 0xc3 0 0 0
.b16 #nvc0_hub_mmio_head
.b16 #nvc0_hub_mmio_tail
.b8 0xc4 0 0 0
.b16 #nvc0_hub_mmio_head
.b16 #nvc0_hub_mmio_tail
.b8 0xc8 0 0 0
.b16 #nvc0_hub_mmio_head
.b16 #nvc0_hub_mmio_tail
.b8 0xce 0 0 0
.b16 #nvc0_hub_mmio_head
.b16 #nvc0_hub_mmio_tail
.b8 0xcf 0 0 0
.b16 #nvc0_hub_mmio_head
.b16 #nvc0_hub_mmio_tail
.b8 0xd9 0 0 0
.b16 #nvd9_hub_mmio_head
.b16 #nvd9_hub_mmio_tail
.b8 0xd7 0 0 0
.b16 #nvd9_hub_mmio_head
.b16 #nvd9_hub_mmio_tail
.b8 0 0 0 0
nvc0_hub_mmio_head:
mmctx_data(0x40402c, 1)
mmctx_data(0x404174, 1)
nvd9_hub_mmio_head:
mmctx_data(0x17e91c, 2)
mmctx_data(0x400204, 2)
mmctx_data(0x404004, 10)
mmctx_data(0x404044, 1)
mmctx_data(0x404094, 14)
mmctx_data(0x4040d0, 7)
mmctx_data(0x4040f8, 1)
mmctx_data(0x404130, 3)
mmctx_data(0x404150, 3)
mmctx_data(0x404164, 2)
mmctx_data(0x404178, 2)
mmctx_data(0x404200, 8)
mmctx_data(0x404404, 14)
mmctx_data(0x404460, 4)
mmctx_data(0x404480, 1)
mmctx_data(0x404498, 1)
mmctx_data(0x404604, 4)
mmctx_data(0x404618, 32)
mmctx_data(0x404698, 21)
mmctx_data(0x4046f0, 2)
mmctx_data(0x404700, 22)
mmctx_data(0x405800, 1)
mmctx_data(0x405830, 3)
mmctx_data(0x405854, 1)
mmctx_data(0x405870, 4)
mmctx_data(0x405a00, 2)
mmctx_data(0x405a18, 1)
mmctx_data(0x406020, 1)
mmctx_data(0x406028, 4)
mmctx_data(0x4064a8, 2)
mmctx_data(0x4064b4, 2)
mmctx_data(0x407804, 1)
mmctx_data(0x40780c, 6)
mmctx_data(0x4078bc, 1)
mmctx_data(0x408000, 7)
mmctx_data(0x408064, 1)
mmctx_data(0x408800, 3)
mmctx_data(0x408900, 3)
mmctx_data(0x408980, 1)
nvc0_hub_mmio_tail:
mmctx_data(0x4064c0, 2)
nvc1_hub_mmio_tail:
mmctx_data(0x4064bc, 3)
nvd9_hub_mmio_tail:
#undef INCLUDE_DATA
.section #nvc0_grhub_code
...
...
drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnvc0.fuc.h
View file @
a32b2ffb
uint32_t
nvc0_grhub_data
[]
=
{
/* 0x0000: gpc_count */
/* 0x0000: hub_mmio_list_head */
0x00000300
,
/* 0x0004: hub_mmio_list_tail */
0x00000304
,
/* 0x0008: gpc_count */
0x00000000
,
/* 0x000
4
: rop_count */
/* 0x000
c
: rop_count */
0x00000000
,
/* 0x00
08
: cmd_queue */
/* 0x00
10
: cmd_queue */
0x00000000
,
0x00000000
,
0x00000000
,
...
...
@@ -22,10 +26,6 @@ uint32_t nvc0_grhub_data[] = {
0x00000000
,
0x00000000
,
0x00000000
,
/* 0x0050: hub_mmio_list_head */
0x00000000
,
/* 0x0054: hub_mmio_list_tail */
0x00000000
,
/* 0x0058: ctx_current */
0x00000000
,
0x00000000
,
...
...
@@ -201,73 +201,8 @@ uint32_t nvc0_grhub_data[] = {
0x00000000
,
0x00000000
,
0x00000000
,
/* 0x0300: chipsets */
0x000000c0
,
0x03f0034c
,
0x000000c1
,
0x03f4034c
,
0x000000c3
,
0x03f0034c
,
0x000000c4
,
0x03f0034c
,
0x000000c8
,
0x03f0034c
,
0x000000ce
,
0x03f0034c
,
0x000000cf
,
0x03f0034c
,
0x000000d9
,
0x03f80354
,
0x000000d7
,
0x03f80354
,
0x00000000
,
/* 0x034c: nvc0_hub_mmio_head */
0x0040402c
,
0x00404174
,
/* 0x0354: nvd9_hub_mmio_head */
/* 0x0300: hub_mmio_list_base */
0x0417e91c
,
0x04400204
,
0x24404004
,
0x00404044
,
0x34404094
,
0x184040d0
,
0x004040f8
,
0x08404130
,
0x08404150
,
0x04404164
,
0x04404178
,
0x1c404200
,
0x34404404
,
0x0c404460
,
0x00404480
,
0x00404498
,
0x0c404604
,
0x7c404618
,
0x50404698
,
0x044046f0
,
0x54404700
,
0x00405800
,
0x08405830
,
0x00405854
,
0x0c405870
,
0x04405a00
,
0x00405a18
,
0x00406020
,
0x0c406028
,
0x044064a8
,
0x044064b4
,
0x00407804
,
0x1440780c
,
0x004078bc
,
0x18408000
,
0x00408064
,
0x08408800
,
0x08408900
,
0x00408980
,
/* 0x03f0: nvc0_hub_mmio_tail */
0x044064c0
,
/* 0x03f4: nvc1_hub_mmio_tail */
0x084064bc
,
};
uint32_t
nvc0_grhub_code
[]
=
{
...
...
@@ -503,7 +438,7 @@ uint32_t nvc0_grhub_code[] = {
0x0017f100
,
0x0227f012
,
0xf10012d0
,
0xfe05
ba
17
,
0xfe05
85
17
,
0x17f10010
,
0x10d00400
,
0x0437f1c0
,
...
...
@@ -527,462 +462,396 @@ uint32_t nvc0_grhub_code[] = {
0x9604e7f1
,
0xf440e3f0
,
0xf1c76821
,
0x0
1
018090
,
0x0
3
018090
,
0x801ff4f0
,
0x17f00
0
0f
,
0x17f00
2
0f
,
0x041fbb01
,
0xf10112b6
,
0xb6040c27
,
0x21d00624
,
0x4021d000
,
0x080027f1
,
0xcf0624b6
,
0xf7f10022
,
/* 0x03aa: init_find_chipset */
0xf0b602f8
,
0x00f39808
,
0xf40432b8
,
0x34b00b0b
,
0xf11bf400
,
/* 0x03be: init_context */
0x17f100f8
,
0xfe580100
,
0x03ff5802
,
0x8000e3f0
,
0x0f80140e
,
0x3d21f515
,
0x0037f101
,
0x0634b607
,
0xd0081495
,
0x34d00034
,
0x0030b740
,
0x001fbb13
,
0xd002f5b6
,
0x15b6003f
,
0x0110b608
,
0xb90814b6
,
0x21f5021f
,
0x1fbb0263
,
0x00039800
,
0x200047f1
,
/* 0x040f: init_gpc */
0xa05043f0
,
0xb908044e
,
0x21f4021f
,
0x004ea08d
,
0x022fb908
,
0xa08d21f4
,
0xbd010c4e
,
0x8d21f4f4
,
0x01044ea0
,
0x010017f1
,
0x98000e98
,
0x21f5010f
,
0x37f1013d
,
0x34b60700
,
0x08149506
,
0xd00034d0
,
0x30b74034
,
0x1fbb1300
,
0x02f5b600
,
0xb6003fd0
,
0x10b60815
,
0x0814b601
,
0xf5021fb9
,
0xbb026321
,
0x0398001f
,
0x0047f102
,
0x5043f020
,
/* 0x03e4: init_gpc */
0x08044ea0
,
0xf4021fb9
,
0x4ea08d21
,
0xf4bd010c
,
0xa08d21f4
,
0xf001004e
,
0x21f402f7
,
0x004ea08d
,
/* 0x0441: init_gpc_wait */
0xf401044e
,
0x4ea08d21
,
0xf7f00100
,
0x8d21f402
,
0x08004ea0
,
/* 0x040c: init_gpc_wait */
0xc86821f4
,
0x0bf41fff
,
0x044ea0fa
,
0x6821f408
,
0xf41fffc8
,
0x4ea0fa0b
,
0x21f40804
,
0x001fbb68
,
0x800040b7
,
0xf40132b6
,
0x27f1b41b
,
0x24b60800
,
0x4021d006
,
0x080020b7
,
0x19f014bd
,
0x0021d01f
,
/* 0x0474: main */
0xf40031f4
,
0xd7f00028
,
0x3921f408
,
0xb1f401f4
,
0xf54001e4
,
0xf100d11b
,
0xb7001fbb
,
0xb6800040
,
0x1bf40132
,
0x0027f1be
,
0x0624b608
,
0xb74021d0
,
0xbd080020
,
0x1f19f014
,
/* 0x043f: main */
0xf40021d0
,
0x28f40031
,
0x10d7f000
,
0xf43921f4
,
0xe4b1f401
,
0x1bf54001
,
0x87f100d1
,
0x84b6083c
,
0xf094bd06
,
0x89d00499
,
0x0017f100
,
0x0614b60b
,
0xcf4012cf
,
0x13c80011
,
0x7e0bf41f
,
0xf41f23c8
,
0x20f95a0b
,
0xf10212b9
,
0xb6083c87
,
0x94bd0684
,
0xd00499f0
,
0x17f10089
,
0x14b60b00
,
0x4012cf06
,
0xc80011cf
,
0x0bf41f13
,
0x1f23c87e
,
0xf95a0bf4
,
0x0212b920
,
0x083c87f1
,
0xd00799f0
,
0x32f40089
,
0x0231f401
,
0x07f521f5
,
0x085c87f1
,
0xbd0684b6
,
0x0799f094
,
0xf40089d0
,
0x31f40132
,
0x2a21f502
,
0x5c87f108
,
0xfc0089d0
,
0x3c87f120
,
0x0684b608
,
0x99f094bd
,
0x0089d007
,
0x87f120fc
,
0x84b6083c
,
0xf094bd06
,
0x89d00699
,
0x0131f400
,
0x082a21f5
,
0x0089d006
,
0xf50131f4
,
0xf107f521
,
0xb6085c87
,
0x94bd0684
,
0xd00699f0
,
0x0ef40089
,
/* 0x04d5: chsw_prev_no_next */
0xb920f931
,
0x32f40212
,
0x0232f401
,
0x07f521f5
,
0x17f120fc
,
0x14b60b00
,
0x0012d006
,
/* 0x04f3: chsw_no_prev */
0xc8130ef4
,
0x0bf41f23
,
0x0131f40d
,
0xf50232f4
,
/* 0x0503: chsw_done */
0xf107f521
,
0xb60b0c17
,
0x27f00614
,
0x0012d001
,
0x085c87f1
,
0xbd0684b6
,
0x0699f094
,
0xf40089d0
,
/* 0x050a: chsw_prev_no_next */
0x20f9310e
,
0xf40212b9
,
0x32f40132
,
0x2a21f502
,
0xf120fc08
,
0xb60b0017
,
0x12d00614
,
0x130ef400
,
/* 0x0528: chsw_no_prev */
0xf41f23c8
,
0x31f40d0b
,
0x0232f401
,
0x082a21f5
,
/* 0x0538: chsw_done */
0x0b0c17f1
,
0xf00614b6
,
0x12d00127
,
0x5c87f100
,
0x0499f094
,
0xf50089d0
,
/* 0x0523: main_not_ctx_switch */
0xb0ff200e
,
0x1bf401e4
,
0x02f2b90d
,
0x078121f5
,
/* 0x0533: main_not_ctx_chan */
0xb0420ef4
,
0x1bf402e4
,
0x3c87f12e
,
0x0684b608
,
0x99f094bd
,
0x0089d004
,
0xff200ef5
,
/* 0x0558: main_not_ctx_switch */
0xf401e4b0
,
0xf2b90d1b
,
0xb621f502
,
0x420ef407
,
/* 0x0568: main_not_ctx_chan */
0xf402e4b0
,
0x87f12e1b
,
0x84b6083c
,
0x0089d007
,
0xf40132f4
,
0x21f50232
,
0x87f107f5
,
0x84b6085c
,
0xf094bd06
,
0x89d00799
,
0x0132f400
,
0xf50232f4
,
0xf1082a21
,
0xb6085c87
,
0x94bd0684
,
0xd00799f0
,
0x0ef40089
,
/* 0x0599: main_not_ctx_save */
0x10ef9411
,
0xf501f5f0
,
0xf502ec21
,
/* 0x05a7: main_done */
0xf1fed10e
,
0xb6082017
,
0x24bd0614
,
0xd01f29f0
,
0x0ef50012
,
/* 0x05ba: ih */
0x80f9febe
,
0xf90188fe
,
0xf990f980
,
0xf9b0f9a0
,
0xf9e0f9d0
,
0x800acff0
,
0xf404abc4
,
0xb7f11d0b
,
0xd7f01900
,
0x40becf08
,
0xf400bfcf
,
0xb0b70421
,
0xe7f00400
,
0x00bed001
,
/* 0x05f0: ih_no_fifo */
0x0100abe4
,
0xf00d0bf4
,
0xe7f108d7
,
0x21f44001
,
/* 0x0601: ih_no_ctxsw */
0x04b7f104
,
0xffb0bd01
,
0x0bf4b4ab
,
0x1ca7f10d
,
0x06a4b60c
,
/* 0x0617: ih_no_other */
0xd000abd0
,
0xf0fc400a
,
0xd0fce0fc
,
0xa0fcb0fc
,
0x80fc90fc
,
0xfc0088fe
,
0x0032f480
,
/* 0x0632: ctx_4160s */
0xe7f101f8
,
0xe3f04160
,
0x01f7f040
,
/* 0x063f: ctx_4160s_wait */
0xf48d21f4
,
0xffc86821
,
0xfa0bf404
,
/* 0x064a: ctx_4160c */
0xe7f100f8
,
0xe3f04160
,
0xf4f4bd40
,
0x00f88d21
,
/* 0x0658: ctx_4170s */
0x4170e7f1
,
0xf040e3f0
,
0x21f410f5
,
/* 0x0667: ctx_4170w */
0x110ef400
,
/* 0x0564: main_not_ctx_save */
0xf010ef94
,
0x21f501f5
,
0x0ef502ec
,
/* 0x0572: main_done */
0x17f1fed1
,
0x14b60820
,
0xf024bd06
,
0x12d01f29
,
0xbe0ef500
,
/* 0x0585: ih */
0xfe80f9fe
,
0x80f90188
,
0xa0f990f9
,
0xd0f9b0f9
,
0xf0f9e0f9
,
0xc4800acf
,
0x0bf404ab
,
0x00b7f11d
,
0x10d7f019
,
0xcf40becf
,
0x21f400bf
,
0x00b0b704
,
0x01e7f004
,
/* 0x05bb: ih_no_fifo */
0xe400bed0
,
0xf40100ab
,
0xd7f00d0b
,
0x01e7f110
,
0x0421f440
,
/* 0x05cc: ih_no_ctxsw */
0x0104b7f1
,
0xabffb0bd
,
0x0d0bf4b4
,
0x0c1ca7f1
,
0xd006a4b6
,
/* 0x05e2: ih_no_other */
0x0ad000ab
,
0xfcf0fc40
,
0xfcd0fce0
,
0xfca0fcb0
,
0xfe80fc90
,
0x80fc0088
,
0xf80032f4
,
/* 0x05fd: ctx_4160s */
0x60e7f101
,
0x40e3f041
,
0xf401f7f0
,
/* 0x060a: ctx_4160s_wait */
0x21f48d21
,
0x04ffc868
,
0xf8fa0bf4
,
/* 0x0615: ctx_4160c */
0x60e7f100
,
0x40e3f041
,
0x21f4f4bd
,
/* 0x0623: ctx_4170s */
0xf100f88d
,
0xf04170e7
,
0x21f440e3
,
0x10f4f068
,
0xf8f31bf4
,
/* 0x0679: ctx_redswitch */
0x14e7f100
,
0x06e4b606
,
0x0270f7f1
,
0xf000efd0
,
/* 0x068a: ctx_redswitch_delay */
0xf2b608f7
,
0xfd1bf401
,
0x0770f7f1
,
0xf800efd0
,
/* 0x0699: ctx_86c */
0x6ce7f100
,
0x06e4b608
,
0xf100efd0
,
0xf08a14e7
,
0x21f440e3
,
0x6ce7f18d
,
0x41e3f0a8
,
0xf88d21f4
,
/* 0x06b9: ctx_load */
0x3c87f100
,
0x0684b608
,
0x99f094bd
,
0x0089d005
,
0xf40ca7f0
,
0x17f1c921
,
0x14b60a24
,
0x0010d006
,
0x0b0037f1
,
0xd00634b6
,
0x17f14032
,
0x14b60a0c
,
0x0747f006
,
0xd00012d0
,
/* 0x06f2: ctx_chan_wait_0 */
0x14cf4014
,
0x1f44f040
,
0xd0fa1bf4
,
0x0bfe0032
,
0x1f2af000
,
0xb60424b6
,
0x87f10220
,
0x84b6083c
,
0xf094bd06
,
0x89d00899
,
0x0417f100
,
0x0614b60a
,
0xf10012d0
,
0xb60a2017
,
0x27f00614
,
0x0023f102
,
0x0012d080
,
0xf11017f0
,
0xf0020027
,
0x12fa0223
,
0xf103f805
,
0xb6085c87
,
0x94bd0684
,
0xd00899f0
,
0x01980089
,
0x1814b681
,
0xb6800298
,
0x12fd0825
,
0x16018005
,
0xf5f040e3
,
0x8d21f410
,
/* 0x0632: ctx_4170w */
0xe7f100f8
,
0xe3f04170
,
0x6821f440
,
0xf410f4f0
,
0x00f8f31b
,
/* 0x0644: ctx_redswitch */
0x0614e7f1
,
0xf106e4b6
,
0xd00270f7
,
0xf7f000ef
,
/* 0x0655: ctx_redswitch_delay */
0x01f2b608
,
0xf1fd1bf4
,
0xd00770f7
,
0x00f800ef
,
/* 0x0664: ctx_86c */
0x086ce7f1
,
0xd006e4b6
,
0xe7f100ef
,
0xe3f08a14
,
0x8d21f440
,
0xa86ce7f1
,
0xf441e3f0
,
0x00f88d21
,
/* 0x0684: ctx_load */
0x083c87f1
,
0xbd0684b6
,
0x0999f094
,
0xf10089d0
,
0xb60a0427
,
0x21d00624
,
0x0127f000
,
0x0a2017f1
,
0x0599f094
,
0xf00089d0
,
0x21f40ca7
,
0x2417f1c9
,
0x0614b60a
,
0xf10010d0
,
0xb60b0037
,
0x32d00634
,
0x0c17f140
,
0x0614b60a
,
0xd00747f0
,
0x14d00012
,
/* 0x06bd: ctx_chan_wait_0 */
0x4014cf40
,
0xf41f44f0
,
0x32d0fa1b
,
0x000bfe00
,
0xb61f2af0
,
0x20b60424
,
0x3c87f102
,
0x0684b608
,
0x99f094bd
,
0x0089d008
,
0x0a0417f1
,
0xd00614b6
,
0x17f10012
,
0x13f00100
,
0x0501fa06
,
0x14b60a20
,
0x0227f006
,
0x800023f1
,
0xf00012d0
,
0x27f11017
,
0x23f00200
,
0x0512fa02
,
0x87f103f8
,
0x84b6085c
,
0xf094bd06
,
0x89d00999
,
0x5c87f100
,
0x89d00899
,
0x81019800
,
0x981814b6
,
0x25b68002
,
0x0512fd08
,
0xf1160180
,
0xb6083c87
,
0x94bd0684
,
0xd00999f0
,
0x27f10089
,
0x24b60a04
,
0x0021d006
,
0xf10127f0
,
0xb60a2017
,
0x12d00614
,
0x0017f100
,
0x0613f001
,
0xf80501fa
,
0x5c87f103
,
0x0684b608
,
0x99f094bd
,
0x0089d005
,
/* 0x07b6: ctx_chan */
0x21f500f8
,
0x21f50632
,
0xa7f006b9
,
0xc921f40c
,
0x0a1017f1
,
0xf00614b6
,
0x12d00527
,
/* 0x07d1: ctx_chan_wait */
0x0012cf00
,
0xf40522fd
,
0x21f5fa1b
,
0x00f8064a
,
/* 0x07e0: ctx_mmio_exec */
0xf1410398
,
0xb60a0427
,
0x23d00624
,
/* 0x07ef: ctx_mmio_loop */
0xc434bd00
,
0x1bf4ff34
,
0x0057f10f
,
0x0653f002
,
0xf80535fa
,
/* 0x0801: ctx_mmio_pull */
0x804e9803
,
0xf4814f98
,
0x30b68d21
,
0x0112b608
,
/* 0x0813: ctx_mmio_done */
0x98df1bf4
,
0x23d01603
,
0x40008000
,
0x010017f1
,
0xfa0613f0
,
0x03f80601
,
/* 0x082a: ctx_xfer */
0xf7f100f8
,
0xf4b60c00
,
0x04e7f006
,
/* 0x0837: ctx_xfer_idle */
0xcf80fed0
,
0xe4f100fe
,
0x1bf42000
,
0x0611f4f9
,
/* 0x0847: ctx_xfer_pre */
0xf01102f4
,
0x21f510f7
,
0x21f50699
,
0x11f40632
,
/* 0x0855: ctx_xfer_pre_load */
0x02f7f01c
,
0x065821f5
,
0x066721f5
,
0x067921f5
,
0x21f5f4bd
,
0x21f50658
,
/* 0x086e: ctx_xfer_exec */
0x019806b9
,
0x1427f116
,
0x0624b604
,
0xf10020d0
,
0xf0a500e7
,
0x1fb941e3
,
0x8d21f402
,
0xf004e0b6
,
0x2cf001fc
,
0x0124b602
,
0xf405f2fd
,
0x17f18d21
,
0x13f04afc
,
0x0c27f002
,
0xf50012d0
,
0xf1020721
,
0xf047fc27
,
0x20d00223
,
0x012cf000
,
0xd00320b6
,
0xacf00012
,
0x06a5f001
,
0x9800b7f0
,
0x0d98140c
,
0x00e7f015
,
0x015c21f5
,
0xf508a7f0
,
0xf5010321
,
0xf4020721
,
0xa7f02201
,
0xc921f40c
,
0x0a1017f1
,
0xf00614b6
,
0x12d00527
,
/* 0x08f5: ctx_xfer_post_save_wait */
0x0012cf00
,
0xf40522fd
,
0x02f4fa1b
,
/* 0x0901: ctx_xfer_post */
0x02f7f032
,
0x065821f5
,
0x21f5f4bd
,
0x21f50699
,
0x21f50226
,
0xf4bd0667
,
0x065821f5
,
0x981011f4
,
0x11fd4001
,
0x070bf405
,
0x07e021f5
,
/* 0x092c: ctx_xfer_no_post_mmio */
0x064a21f5
,
/* 0x0930: ctx_xfer_done */
0x000000f8
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x0089d009
,
0x085c87f1
,
0xbd0684b6
,
0x0599f094
,
0xf80089d0
,
/* 0x0781: ctx_chan */
0xfd21f500
,
0x8421f505
,
0x0ca7f006
,
0xf1c921f4
,
0xb60a1017
,
0x27f00614
,
0x0012d005
,
/* 0x079c: ctx_chan_wait */
0xfd0012cf
,
0x1bf40522
,
0x1521f5fa
,
/* 0x07ab: ctx_mmio_exec */
0x9800f806
,
0x27f14103
,
0x24b60a04
,
0x0023d006
,
/* 0x07ba: ctx_mmio_loop */
0x34c434bd
,
0x0f1bf4ff
,
0x020057f1
,
0xfa0653f0
,
0x03f80535
,
/* 0x07cc: ctx_mmio_pull */
0x98804e98
,
0x21f4814f
,
0x0830b68d
,
0xf40112b6
,
/* 0x07de: ctx_mmio_done */
0x0398df1b
,
0x0023d016
,
0xf1400080
,
0xf0010017
,
0x01fa0613
,
0xf803f806
,
/* 0x07f5: ctx_xfer */
0x00f7f100
,
0x06f4b60c
,
0xd004e7f0
,
/* 0x0802: ctx_xfer_idle */
0xfecf80fe
,
0x00e4f100
,
0xf91bf420
,
0xf40611f4
,
/* 0x0812: ctx_xfer_pre */
0xf7f01102
,
0x6421f510
,
0xfd21f506
,
0x1c11f405
,
/* 0x0820: ctx_xfer_pre_load */
0xf502f7f0
,
0xf5062321
,
0xf5063221
,
0xbd064421
,
0x2321f5f4
,
0x8421f506
,
/* 0x0839: ctx_xfer_exec */
0x16019806
,
0x041427f1
,
0xd00624b6
,
0xe7f10020
,
0xe3f0a500
,
0x021fb941
,
0xb68d21f4
,
0xfcf004e0
,
0x022cf001
,
0xfd0124b6
,
0x21f405f2
,
0xfc17f18d
,
0x0213f04a
,
0xd00c27f0
,
0x21f50012
,
0x27f10207
,
0x23f047fc
,
0x0020d002
,
0xb6012cf0
,
0x12d00320
,
0x01acf000
,
0xf006a5f0
,
0x0c9800b7
,
0x010d9800
,
0xf500e7f0
,
0xf0015c21
,
0x21f508a7
,
0x21f50103
,
0x01f40207
,
0x0ca7f022
,
0xf1c921f4
,
0xb60a1017
,
0x27f00614
,
0x0012d005
,
/* 0x08c0: ctx_xfer_post_save_wait */
0xfd0012cf
,
0x1bf40522
,
0x3202f4fa
,
/* 0x08cc: ctx_xfer_post */
0xf502f7f0
,
0xbd062321
,
0x6421f5f4
,
0x2621f506
,
0x3221f502
,
0xf5f4bd06
,
0xf4062321
,
0x01981011
,
0x0511fd40
,
0xf5070bf4
,
/* 0x08f7: ctx_xfer_no_post_mmio */
0xf507ab21
,
/* 0x08fb: ctx_xfer_done */
0xf8061521
,
0x00000000
,
};
drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnve0.fuc
View file @
a32b2ffb
...
...
@@ -29,131 +29,6 @@
#define INCLUDE_DATA
#include "com.fuc"
#include "hub.fuc"
chipsets:
.b8 0xe4 0 0 0
.b16 #nve4_hub_mmio_head
.b16 #nve4_hub_mmio_tail
.b8 0xe7 0 0 0
.b16 #nve4_hub_mmio_head
.b16 #nve4_hub_mmio_tail
.b8 0xe6 0 0 0
.b16 #nve4_hub_mmio_head
.b16 #nve4_hub_mmio_tail
.b8 0xf0 0 0 0
.b16 #nvf0_hub_mmio_head
.b16 #nvf0_hub_mmio_tail
.b8 0 0 0 0
nve4_hub_mmio_head:
mmctx_data(0x17e91c, 2)
mmctx_data(0x400204, 2)
mmctx_data(0x404010, 7)
mmctx_data(0x4040a8, 9)
mmctx_data(0x4040d0, 7)
mmctx_data(0x4040f8, 1)
mmctx_data(0x404130, 3)
mmctx_data(0x404150, 3)
mmctx_data(0x404164, 1)
mmctx_data(0x4041a0, 4)
mmctx_data(0x404200, 4)
mmctx_data(0x404404, 14)
mmctx_data(0x404460, 4)
mmctx_data(0x404480, 1)
mmctx_data(0x404498, 1)
mmctx_data(0x404604, 4)
mmctx_data(0x404618, 4)
mmctx_data(0x40462c, 2)
mmctx_data(0x404640, 1)
mmctx_data(0x404654, 1)
mmctx_data(0x404660, 1)
mmctx_data(0x404678, 19)
mmctx_data(0x4046c8, 3)
mmctx_data(0x404700, 3)
mmctx_data(0x404718, 10)
mmctx_data(0x404744, 2)
mmctx_data(0x404754, 1)
mmctx_data(0x405800, 1)
mmctx_data(0x405830, 3)
mmctx_data(0x405854, 1)
mmctx_data(0x405870, 4)
mmctx_data(0x405a00, 2)
mmctx_data(0x405a18, 1)
mmctx_data(0x405b00, 1)
mmctx_data(0x405b10, 1)
mmctx_data(0x406020, 1)
mmctx_data(0x406028, 4)
mmctx_data(0x4064a8, 2)
mmctx_data(0x4064b4, 2)
mmctx_data(0x4064c0, 12)
mmctx_data(0x4064fc, 1)
mmctx_data(0x407040, 1)
mmctx_data(0x407804, 1)
mmctx_data(0x40780c, 6)
mmctx_data(0x4078bc, 1)
mmctx_data(0x408000, 7)
mmctx_data(0x408064, 1)
mmctx_data(0x408800, 3)
mmctx_data(0x408840, 1)
mmctx_data(0x408900, 3)
mmctx_data(0x408980, 1)
nve4_hub_mmio_tail:
nvf0_hub_mmio_head:
mmctx_data(0x17e91c, 2)
mmctx_data(0x400204, 2)
mmctx_data(0x404004, 17)
mmctx_data(0x4040a8, 9)
mmctx_data(0x4040d0, 7)
mmctx_data(0x4040f8, 1)
mmctx_data(0x404100, 10)
mmctx_data(0x404130, 3)
mmctx_data(0x404150, 3)
mmctx_data(0x404164, 1)
mmctx_data(0x40417c, 2)
mmctx_data(0x4041a0, 4)
mmctx_data(0x404200, 4)
mmctx_data(0x404404, 12)
mmctx_data(0x404438, 1)
mmctx_data(0x404460, 4)
mmctx_data(0x404480, 1)
mmctx_data(0x404498, 1)
mmctx_data(0x404604, 4)
mmctx_data(0x404618, 4)
mmctx_data(0x40462c, 2)
mmctx_data(0x404640, 1)
mmctx_data(0x404654, 1)
mmctx_data(0x404660, 1)
mmctx_data(0x404678, 19)
mmctx_data(0x4046c8, 3)
mmctx_data(0x404700, 3)
mmctx_data(0x404718, 10)
mmctx_data(0x404744, 2)
mmctx_data(0x404754, 1)
mmctx_data(0x405800, 1)
mmctx_data(0x405830, 3)
mmctx_data(0x405854, 1)
mmctx_data(0x405870, 4)
mmctx_data(0x405a00, 2)
mmctx_data(0x405a18, 1)
mmctx_data(0x405b00, 1)
mmctx_data(0x405b10, 1)
mmctx_data(0x405b20, 1)
mmctx_data(0x406020, 1)
mmctx_data(0x406028, 4)
mmctx_data(0x4064a8, 5)
mmctx_data(0x4064c0, 12)
mmctx_data(0x4064fc, 1)
mmctx_data(0x407804, 1)
mmctx_data(0x40780c, 6)
mmctx_data(0x4078bc, 1)
mmctx_data(0x408000, 7)
mmctx_data(0x408064, 1)
mmctx_data(0x408800, 3)
mmctx_data(0x408840, 1)
mmctx_data(0x408900, 3)
mmctx_data(0x408980, 1)
nvf0_hub_mmio_tail:
#undef INCLUDE_DATA
.section #nve0_grhub_code
...
...
drivers/gpu/drm/nouveau/core/engine/graph/fuc/hubnve0.fuc.h
View file @
a32b2ffb
uint32_t
nve0_grhub_data
[]
=
{
/* 0x0000: gpc_count */
/* 0x0000: hub_mmio_list_head */
0x00000300
,
/* 0x0004: hub_mmio_list_tail */
0x00000304
,
/* 0x0008: gpc_count */
0x00000000
,
/* 0x000
4
: rop_count */
/* 0x000
c
: rop_count */
0x00000000
,
/* 0x00
08
: cmd_queue */
/* 0x00
10
: cmd_queue */
0x00000000
,
0x00000000
,
0x00000000
,
...
...
@@ -22,10 +26,6 @@ uint32_t nve0_grhub_data[] = {
0x00000000
,
0x00000000
,
0x00000000
,
/* 0x0050: hub_mmio_list_head */
0x00000000
,
/* 0x0054: hub_mmio_list_tail */
0x00000000
,
/* 0x0058: ctx_current */
0x00000000
,
0x00000000
,
...
...
@@ -201,123 +201,8 @@ uint32_t nve0_grhub_data[] = {
0x00000000
,
0x00000000
,
0x00000000
,
/* 0x0300: chipsets */
0x000000e4
,
0x03f00324
,
0x000000e7
,
0x03f00324
,
0x000000e6
,
0x03f00324
,
0x000000f0
,
0x04c403f0
,
0x00000000
,
/* 0x0324: nve4_hub_mmio_head */
/* 0x0300: hub_mmio_list_base */
0x0417e91c
,
0x04400204
,
0x18404010
,
0x204040a8
,
0x184040d0
,
0x004040f8
,
0x08404130
,
0x08404150
,
0x00404164
,
0x0c4041a0
,
0x0c404200
,
0x34404404
,
0x0c404460
,
0x00404480
,
0x00404498
,
0x0c404604
,
0x0c404618
,
0x0440462c
,
0x00404640
,
0x00404654
,
0x00404660
,
0x48404678
,
0x084046c8
,
0x08404700
,
0x24404718
,
0x04404744
,
0x00404754
,
0x00405800
,
0x08405830
,
0x00405854
,
0x0c405870
,
0x04405a00
,
0x00405a18
,
0x00405b00
,
0x00405b10
,
0x00406020
,
0x0c406028
,
0x044064a8
,
0x044064b4
,
0x2c4064c0
,
0x004064fc
,
0x00407040
,
0x00407804
,
0x1440780c
,
0x004078bc
,
0x18408000
,
0x00408064
,
0x08408800
,
0x00408840
,
0x08408900
,
0x00408980
,
/* 0x03f0: nve4_hub_mmio_tail */
/* 0x03f0: nvf0_hub_mmio_head */
0x0417e91c
,
0x04400204
,
0x40404004
,
0x204040a8
,
0x184040d0
,
0x004040f8
,
0x24404100
,
0x08404130
,
0x08404150
,
0x00404164
,
0x0440417c
,
0x0c4041a0
,
0x0c404200
,
0x2c404404
,
0x00404438
,
0x0c404460
,
0x00404480
,
0x00404498
,
0x0c404604
,
0x0c404618
,
0x0440462c
,
0x00404640
,
0x00404654
,
0x00404660
,
0x48404678
,
0x084046c8
,
0x08404700
,
0x24404718
,
0x04404744
,
0x00404754
,
0x00405800
,
0x08405830
,
0x00405854
,
0x0c405870
,
0x04405a00
,
0x00405a18
,
0x00405b00
,
0x00405b10
,
0x00405b20
,
0x00406020
,
0x0c406028
,
0x104064a8
,
0x2c4064c0
,
0x004064fc
,
0x00407804
,
0x1440780c
,
0x004078bc
,
0x18408000
,
0x00408064
,
0x08408800
,
0x00408840
,
0x08408900
,
0x00408980
,
};
uint32_t
nve0_grhub_code
[]
=
{
...
...
@@ -553,7 +438,7 @@ uint32_t nve0_grhub_code[] = {
0x0017f100
,
0x0227f012
,
0xf10012d0
,
0xfe05
ba
17
,
0xfe05
85
17
,
0x17f10010
,
0x10d00400
,
0x0437f1c0
,
...
...
@@ -577,395 +462,393 @@ uint32_t nve0_grhub_code[] = {
0x9604e7f1
,
0xf440e3f0
,
0xf1c76821
,
0x0
1
018090
,
0x0
3
018090
,
0x801ff4f0
,
0x17f00
0
0f
,
0x17f00
2
0f
,
0x041fbb01
,
0xf10112b6
,
0xb6040c27
,
0x21d00624
,
0x4021d000
,
0x080027f1
,
0xcf0624b6
,
0xf7f10022
,
/* 0x03aa: init_find_chipset */
0xf0b602f8
,
0x00f39808
,
0xf40432b8
,
0x34b00b0b
,
0xf11bf400
,
/* 0x03be: init_context */
0x17f100f8
,
0xfe580100
,
0x03ff5802
,
0x8000e3f0
,
0x0f80140e
,
0x3d21f515
,
0x0037f101
,
0x0634b607
,
0xd0081495
,
0x34d00034
,
0x0030b740
,
0x001fbb13
,
0xd002f5b6
,
0x15b6003f
,
0x0110b608
,
0xb90814b6
,
0x21f5021f
,
0x1fbb0263
,
0x00039800
,
0x200047f1
,
/* 0x040f: init_gpc */
0xa05043f0
,
0xb908044e
,
0x21f4021f
,
0x004ea08d
,
0x022fb908
,
0xa08d21f4
,
0xbd010c4e
,
0x8d21f4f4
,
0x01044ea0
,
0x010017f1
,
0x98000e98
,
0x21f5010f
,
0x37f1013d
,
0x34b60700
,
0x08149506
,
0xd00034d0
,
0x30b74034
,
0x1fbb1300
,
0x02f5b600
,
0xb6003fd0
,
0x10b60815
,
0x0814b601
,
0xf5021fb9
,
0xbb026321
,
0x0398001f
,
0x0047f102
,
0x5043f020
,
/* 0x03e4: init_gpc */
0x08044ea0
,
0xf4021fb9
,
0x4ea08d21
,
0xf4bd010c
,
0xa08d21f4
,
0xf001004e
,
0x21f402f7
,
0x004ea08d
,
/* 0x0441: init_gpc_wait */
0xf401044e
,
0x4ea08d21
,
0xf7f00100
,
0x8d21f402
,
0x08004ea0
,
/* 0x040c: init_gpc_wait */
0xc86821f4
,
0x0bf41fff
,
0x044ea0fa
,
0x6821f408
,
0xf41fffc8
,
0x4ea0fa0b
,
0x21f40804
,
0x001fbb68
,
0x800040b7
,
0xf40132b6
,
0x27f1b41b
,
0x24b60800
,
0x4021d006
,
0x080020b7
,
0x19f014bd
,
0x0021d01f
,
/* 0x0474: main */
0xf40031f4
,
0xd7f00028
,
0x3921f408
,
0xb1f401f4
,
0xf54001e4
,
0xf100d11b
,
0xb7001fbb
,
0xb6800040
,
0x1bf40132
,
0x0027f1be
,
0x0624b608
,
0xb74021d0
,
0xbd080020
,
0x1f19f014
,
/* 0x043f: main */
0xf40021d0
,
0x28f40031
,
0x10d7f000
,
0xf43921f4
,
0xe4b1f401
,
0x1bf54001
,
0x87f100d1
,
0x84b6083c
,
0xf094bd06
,
0x89d00499
,
0x0017f100
,
0x0614b60b
,
0xcf4012cf
,
0x13c80011
,
0x7e0bf41f
,
0xf41f23c8
,
0x20f95a0b
,
0xf10212b9
,
0xb6083c87
,
0x94bd0684
,
0xd00499f0
,
0x17f10089
,
0x14b60b00
,
0x4012cf06
,
0xc80011cf
,
0x0bf41f13
,
0x1f23c87e
,
0xf95a0bf4
,
0x0212b920
,
0x083c87f1
,
0xd00799f0
,
0x32f40089
,
0x0231f401
,
0x07c721f5
,
0x085c87f1
,
0xbd0684b6
,
0x0799f094
,
0xf40089d0
,
0x31f40132
,
0xfc21f502
,
0x5c87f107
,
0xfc0089d0
,
0x3c87f120
,
0x0684b608
,
0x99f094bd
,
0x0089d007
,
0x87f120fc
,
0x84b6083c
,
0xf094bd06
,
0x89d00699
,
0x0131f400
,
0x07fc21f5
,
0x0089d006
,
0xf50131f4
,
0xf107c721
,
0xb6085c87
,
0x94bd0684
,
0xd00699f0
,
0x0ef40089
,
/* 0x04d5: chsw_prev_no_next */
0xb920f931
,
0x32f40212
,
0x0232f401
,
0x07c721f5
,
0x17f120fc
,
0x14b60b00
,
0x0012d006
,
/* 0x04f3: chsw_no_prev */
0xc8130ef4
,
0x0bf41f23
,
0x0131f40d
,
0xf50232f4
,
/* 0x0503: chsw_done */
0xf107c721
,
0xb60b0c17
,
0x27f00614
,
0x0012d001
,
0x085c87f1
,
0xbd0684b6
,
0x0699f094
,
0xf40089d0
,
/* 0x050a: chsw_prev_no_next */
0x20f9310e
,
0xf40212b9
,
0x32f40132
,
0xfc21f502
,
0xf120fc07
,
0xb60b0017
,
0x12d00614
,
0x130ef400
,
/* 0x0528: chsw_no_prev */
0xf41f23c8
,
0x31f40d0b
,
0x0232f401
,
0x07fc21f5
,
/* 0x0538: chsw_done */
0x0b0c17f1
,
0xf00614b6
,
0x12d00127
,
0x5c87f100
,
0x0499f094
,
0xf50089d0
,
/* 0x0523: main_not_ctx_switch */
0xb0ff200e
,
0x1bf401e4
,
0x02f2b90d
,
0x075b21f5
,
/* 0x0533: main_not_ctx_chan */
0xb0420ef4
,
0x1bf402e4
,
0x3c87f12e
,
0x0684b608
,
0x99f094bd
,
0x0089d004
,
0xff200ef5
,
/* 0x0558: main_not_ctx_switch */
0xf401e4b0
,
0xf2b90d1b
,
0x9021f502
,
0x420ef407
,
/* 0x0568: main_not_ctx_chan */
0xf402e4b0
,
0x87f12e1b
,
0x84b6083c
,
0x0089d007
,
0xf40132f4
,
0x21f50232
,
0x87f107c7
,
0x84b6085c
,
0xf094bd06
,
0x89d00799
,
0x0132f400
,
0xf50232f4
,
0xf107fc21
,
0xb6085c87
,
0x94bd0684
,
0xd00799f0
,
0x0ef40089
,
/* 0x0599: main_not_ctx_save */
0x10ef9411
,
0xf501f5f0
,
0xf502ec21
,
/* 0x05a7: main_done */
0xf1fed10e
,
0xb6082017
,
0x24bd0614
,
0xd01f29f0
,
0x0ef50012
,
/* 0x05ba: ih */
0x80f9febe
,
0xf90188fe
,
0xf990f980
,
0xf9b0f9a0
,
0xf9e0f9d0
,
0x800acff0
,
0xf404abc4
,
0xb7f11d0b
,
0xd7f01900
,
0x40becf08
,
0xf400bfcf
,
0xb0b70421
,
0xe7f00400
,
0x00bed001
,
/* 0x05f0: ih_no_fifo */
0x0100abe4
,
0xf00d0bf4
,
0xe7f108d7
,
0x21f44001
,
/* 0x0601: ih_no_ctxsw */
0x04b7f104
,
0xffb0bd01
,
0x0bf4b4ab
,
0x1ca7f10d
,
0x06a4b60c
,
/* 0x0617: ih_no_other */
0xd000abd0
,
0xf0fc400a
,
0xd0fce0fc
,
0xa0fcb0fc
,
0x80fc90fc
,
0xfc0088fe
,
0x0032f480
,
/* 0x0632: ctx_4170s */
0xe7f101f8
,
0xe3f04170
,
0x10f5f040
,
0xf88d21f4
,
/* 0x0641: ctx_4170w */
0x70e7f100
,
0x110ef400
,
/* 0x0564: main_not_ctx_save */
0xf010ef94
,
0x21f501f5
,
0x0ef502ec
,
/* 0x0572: main_done */
0x17f1fed1
,
0x14b60820
,
0xf024bd06
,
0x12d01f29
,
0xbe0ef500
,
/* 0x0585: ih */
0xfe80f9fe
,
0x80f90188
,
0xa0f990f9
,
0xd0f9b0f9
,
0xf0f9e0f9
,
0xc4800acf
,
0x0bf404ab
,
0x00b7f11d
,
0x10d7f019
,
0xcf40becf
,
0x21f400bf
,
0x00b0b704
,
0x01e7f004
,
/* 0x05bb: ih_no_fifo */
0xe400bed0
,
0xf40100ab
,
0xd7f00d0b
,
0x01e7f110
,
0x0421f440
,
/* 0x05cc: ih_no_ctxsw */
0x0104b7f1
,
0xabffb0bd
,
0x0d0bf4b4
,
0x0c1ca7f1
,
0xd006a4b6
,
/* 0x05e2: ih_no_other */
0x0ad000ab
,
0xfcf0fc40
,
0xfcd0fce0
,
0xfca0fcb0
,
0xfe80fc90
,
0x80fc0088
,
0xf80032f4
,
/* 0x05fd: ctx_4170s */
0x70e7f101
,
0x40e3f041
,
0xf06821f4
,
0x1bf410f4
,
/* 0x0653: ctx_redswitch */
0xf100f8f3
,
0xb60614e7
,
0xf7f106e4
,
0xefd00270
,
0x08f7f000
,
/* 0x0664: ctx_redswitch_delay */
0xf401f2b6
,
0xf7f1fd1b
,
0xefd00770
,
/* 0x0673: ctx_86c */
0xf100f800
,
0xb6086ce7
,
0xefd006e4
,
0x14e7f100
,
0x40e3f08a
,
0xf18d21f4
,
0xf0a86ce7
,
0x21f441e3
,
/* 0x0693: ctx_load */
0xf100f88d
,
0xf410f5f0
,
0x00f88d21
,
/* 0x060c: ctx_4170w */
0x4170e7f1
,
0xf440e3f0
,
0xf4f06821
,
0xf31bf410
,
/* 0x061e: ctx_redswitch */
0xe7f100f8
,
0xe4b60614
,
0x70f7f106
,
0x00efd002
,
/* 0x062f: ctx_redswitch_delay */
0xb608f7f0
,
0x1bf401f2
,
0x70f7f1fd
,
0x00efd007
,
/* 0x063e: ctx_86c */
0xe7f100f8
,
0xe4b6086c
,
0x00efd006
,
0x8a14e7f1
,
0xf440e3f0
,
0xe7f18d21
,
0xe3f0a86c
,
0x8d21f441
,
/* 0x065e: ctx_load */
0x87f100f8
,
0x84b6083c
,
0xf094bd06
,
0x89d00599
,
0x0ca7f000
,
0xf1c921f4
,
0xb60a2417
,
0x10d00614
,
0x0037f100
,
0x0634b60b
,
0xf14032d0
,
0xb60a0c17
,
0x47f00614
,
0x0012d007
,
/* 0x0697: ctx_chan_wait_0 */
0xcf4014d0
,
0x44f04014
,
0xfa1bf41f
,
0xfe0032d0
,
0x2af0000b
,
0x0424b61f
,
0xf10220b6
,
0xb6083c87
,
0x94bd0684
,
0xd00599f0
,
0xa7f00089
,
0xc921f40c
,
0x0a2417f1
,
0xd00614b6
,
0x37f10010
,
0x34b60b00
,
0x4032d006
,
0x0a0c17f1
,
0xd00899f0
,
0x17f10089
,
0x14b60a04
,
0x0012d006
,
0x0a2017f1
,
0xf00614b6
,
0x12d00747
,
0x4014d000
,
/* 0x06cc: ctx_chan_wait_0 */
0xf04014cf
,
0x1bf41f44
,
0x0032d0fa
,
0xf0000bfe
,
0x24b61f2a
,
0x0220b604
,
0x083c87f1
,
0x23f10227
,
0x12d08000
,
0x1017f000
,
0x020027f1
,
0xfa0223f0
,
0x03f80512
,
0x085c87f1
,
0xbd0684b6
,
0x0899f094
,
0xf10089d0
,
0xb60a0417
,
0x12d00614
,
0x2017f100
,
0x0614b60a
,
0xf10227f0
,
0xd0800023
,
0x17f00012
,
0x0027f110
,
0x0223f002
,
0xf80512fa
,
0x5c87f103
,
0x980089d0
,
0x14b68101
,
0x80029818
,
0xfd0825b6
,
0x01800512
,
0x3c87f116
,
0x0684b608
,
0x99f094bd
,
0x0089d008
,
0xb6810198
,
0x02981814
,
0x0825b680
,
0x800512fd
,
0x87f11601
,
0x84b6083c
,
0xf094bd06
,
0x89d00999
,
0x0427f100
,
0x0624b60a
,
0xf00021d0
,
0x17f10127
,
0x14b60a20
,
0x0012d006
,
0x010017f1
,
0xfa0613f0
,
0x03f80501
,
0x085c87f1
,
0xbd0684b6
,
0x0999f094
,
0xf10089d0
,
0x0089d009
,
0x0a0427f1
,
0xd00624b6
,
0x27f00021
,
0x2017f101
,
0x0614b60a
,
0xf10012d0
,
0xf0010017
,
0x01fa0613
,
0xf103f805
,
0xb6085c87
,
0x94bd0684
,
0xd00599f0
,
0x00f80089
,
/* 0x0790: ctx_chan */
0x069321f5
,
0xf40ca7f0
,
0x17f1c921
,
0x14b60a10
,
0x0527f006
,
/* 0x07a7: ctx_chan_wait */
0xcf0012d0
,
0x22fd0012
,
0xfa1bf405
,
/* 0x07b2: ctx_mmio_exec */
0x039800f8
,
0x0427f141
,
0x0624b60a
,
0xbd0023d0
,
/* 0x07c1: ctx_mmio_loop */
0xff34c434
,
0xf10f1bf4
,
0xf0020057
,
0x35fa0653
,
/* 0x07d3: ctx_mmio_pull */
0x9803f805
,
0x4f98804e
,
0x8d21f481
,
0xb60830b6
,
0x1bf40112
,
/* 0x07e5: ctx_mmio_done */
0x160398df
,
0x800023d0
,
0x17f14000
,
0x13f00100
,
0x0601fa06
,
0x00f803f8
,
/* 0x07fc: ctx_xfer */
0x0c00f7f1
,
0xf006f4b6
,
0xfed004e7
,
/* 0x0809: ctx_xfer_idle */
0x00fecf80
,
0x2000e4f1
,
0xf4f91bf4
,
0x02f40611
,
/* 0x0819: ctx_xfer_pre */
0x10f7f00d
,
0x067321f5
,
/* 0x0823: ctx_xfer_pre_load */
0xf01c11f4
,
0x21f502f7
,
0x21f50632
,
0x21f50641
,
0xf4bd0653
,
0x063221f5
,
0x069321f5
,
/* 0x083c: ctx_xfer_exec */
0xf1160198
,
0xb6041427
,
0x20d00624
,
0x00e7f100
,
0x41e3f0a5
,
0xf4021fb9
,
0xe0b68d21
,
0x01fcf004
,
0xb6022cf0
,
0xf2fd0124
,
0x8d21f405
,
0x4afc17f1
,
0xf00213f0
,
0x12d00c27
,
0x0721f500
,
0xfc27f102
,
0x0223f047
,
0xf00020d0
,
0x20b6012c
,
0x0012d003
,
0xf001acf0
,
0xb7f006a5
,
0x140c9800
,
0xf0150d98
,
0x21f500e7
,
0xa7f0015c
,
0x0321f508
,
0x0721f501
,
0x2201f402
,
0xf40ca7f0
,
0x17f1c921
,
0x14b60a10
,
0x0527f006
,
/* 0x08c3: ctx_xfer_post_save_wait */
0xcf0012d0
,
0x22fd0012
,
0xfa1bf405
,
/* 0x08cf: ctx_xfer_post */
0xf02e02f4
,
0x21f502f7
,
0xf4bd0632
,
0x067321f5
,
0x022621f5
,
0x064121f5
,
0x21f5f4bd
,
0x11f40632
,
0x40019810
,
0xf40511fd
,
0x21f5070b
,
/* 0x08fa: ctx_xfer_no_post_mmio */
/* 0x08fa: ctx_xfer_done */
0x00f807b2
,
0xd00999f0
,
0x87f10089
,
0x84b6085c
,
0xf094bd06
,
0x89d00599
,
/* 0x075b: ctx_chan */
0xf500f800
,
0xf0065e21
,
0x21f40ca7
,
0x1017f1c9
,
0x0614b60a
,
0xd00527f0
,
/* 0x0772: ctx_chan_wait */
0x12cf0012
,
0x0522fd00
,
0xf8fa1bf4
,
/* 0x077d: ctx_mmio_exec */
0x41039800
,
0x0a0427f1
,
0xd00624b6
,
0x34bd0023
,
/* 0x078c: ctx_mmio_loop */
0xf4ff34c4
,
0x57f10f1b
,
0x53f00200
,
0x0535fa06
,
/* 0x079e: ctx_mmio_pull */
0x4e9803f8
,
0x814f9880
,
0xb68d21f4
,
0x12b60830
,
0xdf1bf401
,
/* 0x07b0: ctx_mmio_done */
0xd0160398
,
0x00800023
,
0x0017f140
,
0x0613f001
,
0xf80601fa
,
/* 0x07c7: ctx_xfer */
0xf100f803
,
0xb60c00f7
,
0xe7f006f4
,
0x80fed004
,
/* 0x07d4: ctx_xfer_idle */
0xf100fecf
,
0xf42000e4
,
0x11f4f91b
,
0x0d02f406
,
/* 0x07e4: ctx_xfer_pre */
0xf510f7f0
,
0xf4063e21
,
/* 0x07ee: ctx_xfer_pre_load */
0xf7f01c11
,
0xfd21f502
,
0x0c21f505
,
0x1e21f506
,
0xf5f4bd06
,
0xf505fd21
,
/* 0x0807: ctx_xfer_exec */
0x98065e21
,
0x27f11601
,
0x24b60414
,
0x0020d006
,
0xa500e7f1
,
0xb941e3f0
,
0x21f4021f
,
0x04e0b68d
,
0xf001fcf0
,
0x24b6022c
,
0x05f2fd01
,
0xf18d21f4
,
0xf04afc17
,
0x27f00213
,
0x0012d00c
,
0x020721f5
,
0x47fc27f1
,
0xd00223f0
,
0x2cf00020
,
0x0320b601
,
0xf00012d0
,
0xa5f001ac
,
0x00b7f006
,
0x98000c98
,
0xe7f0010d
,
0x5c21f500
,
0x08a7f001
,
0x010321f5
,
0x020721f5
,
0xf02201f4
,
0x21f40ca7
,
0x1017f1c9
,
0x0614b60a
,
0xd00527f0
,
/* 0x088e: ctx_xfer_post_save_wait */
0x12cf0012
,
0x0522fd00
,
0xf4fa1bf4
,
/* 0x089a: ctx_xfer_post */
0xf7f02e02
,
0xfd21f502
,
0xf5f4bd05
,
0xf5063e21
,
0xf5022621
,
0xbd060c21
,
0xfd21f5f4
,
0x1011f405
,
0xfd400198
,
0x0bf40511
,
0x7d21f507
,
/* 0x08c5: ctx_xfer_no_post_mmio */
/* 0x08c5: ctx_xfer_done */
0x0000f807
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
0x00000000
,
};
drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c
View file @
a32b2ffb
...
...
@@ -764,10 +764,46 @@ nvc0_graph_init_fw(struct nvc0_graph_priv *priv, u32 fuc_base,
}
}
static
void
nvc0_graph_init_csdata
(
struct
nvc0_graph_priv
*
priv
,
struct
nvc0_graph_init
*
init
,
u32
falcon
,
u32
starstar
,
u32
base
)
{
u32
addr
=
init
->
addr
;
u32
next
=
addr
;
u32
star
,
temp
;
nv_wr32
(
priv
,
falcon
+
0x01c0
,
0x02000000
+
starstar
);
star
=
nv_rd32
(
priv
,
falcon
+
0x01c4
);
temp
=
nv_rd32
(
priv
,
falcon
+
0x01c4
);
if
(
temp
>
star
)
star
=
temp
;
nv_wr32
(
priv
,
falcon
+
0x01c0
,
0x01000000
+
star
);
do
{
if
(
init
->
addr
!=
next
)
{
while
(
addr
<
next
)
{
u32
nr
=
min
((
int
)(
next
-
addr
)
/
4
,
32
);
nv_wr32
(
priv
,
falcon
+
0x01c4
,
((
nr
-
1
)
<<
26
)
|
(
addr
-
base
));
addr
+=
nr
*
4
;
star
+=
4
;
}
addr
=
next
=
init
->
addr
;
}
next
+=
init
->
count
*
4
;
}
while
((
init
++
)
->
count
);
nv_wr32
(
priv
,
falcon
+
0x01c0
,
0x01000004
+
starstar
);
nv_wr32
(
priv
,
falcon
+
0x01c4
,
star
);
}
int
nvc0_graph_init_ctxctl
(
struct
nvc0_graph_priv
*
priv
)
{
struct
nvc0_graph_oclass
*
oclass
=
(
void
*
)
nv_object
(
priv
)
->
oclass
;
struct
nvc0_grctx_oclass
*
cclass
=
(
void
*
)
nv_engine
(
priv
)
->
cclass
;
struct
nvc0_graph_init
*
init
;
u32
r000260
;
int
i
;
...
...
@@ -874,6 +910,10 @@ nvc0_graph_init_ctxctl(struct nvc0_graph_priv *priv)
nv_wr32
(
priv
,
0x409184
,
oclass
->
fecs
.
ucode
->
code
.
data
[
i
]);
}
for
(
i
=
0
;
(
init
=
cclass
->
hub
[
i
]);
i
++
)
{
nvc0_graph_init_csdata
(
priv
,
init
,
0x409000
,
0x000
,
0x000000
);
}
/* load GPC microcode */
nv_wr32
(
priv
,
0x41a1c0
,
0x01000000
);
for
(
i
=
0
;
i
<
oclass
->
gpccs
.
ucode
->
data
.
size
/
4
;
i
++
)
...
...
@@ -887,8 +927,14 @@ nvc0_graph_init_ctxctl(struct nvc0_graph_priv *priv)
}
nv_wr32
(
priv
,
0x000260
,
r000260
);
if
((
init
=
cclass
->
gpc
[
0
]))
nvc0_graph_init_csdata
(
priv
,
init
,
0x41a000
,
0x000
,
0x418000
);
if
((
init
=
cclass
->
gpc
[
2
]))
nvc0_graph_init_csdata
(
priv
,
init
,
0x41a000
,
0x004
,
0x419800
);
if
((
init
=
cclass
->
gpc
[
3
]))
nvc0_graph_init_csdata
(
priv
,
init
,
0x41a000
,
0x008
,
0x41be00
);
/* start HUB ucode running, it'll init the GPCs */
nv_wr32
(
priv
,
0x409800
,
nv_device
(
priv
)
->
chipset
);
nv_wr32
(
priv
,
0x40910c
,
0x00000000
);
nv_wr32
(
priv
,
0x409100
,
0x00000002
);
if
(
!
nv_wait
(
priv
,
0x409800
,
0x80000000
,
0x80000000
))
{
...
...
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